Trials@uspto.gov
`571-272-7822
`
`
`Paper 39
`Entered: December 11, 2017
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`CANON INC., CANON U.S.A., INC.,
`CANON FINANCIAL SERVICES, INC., FUJIFILM CORPORATION,
`FUJIFILM HOLDINGS AMERICA CORPORATION,
`FUJIFILM NORTH AMERICA CORPORATION, JVC KENWOOD
`CORPORATION, JVCKENWOOD USA CORPORATION,
`NIKON CORPORATION, NIKON INC., OLYMPUS CORPORATION,
`OLYMPUS AMERICA INC., PANASONIC CORPORATION,
`PANASONIC CORPORATION OF NORTH AMERICA,
`SAMSUNG ELECTRONICS CO., LTD., and
`SAMSUNG ELECTRONICS AMERICA, INC.,
`Petitioner,
`
`v.
`
`PAPST LICENSING GMBH & CO., KG,
`Patent Owner.
`____________
`
`Case IPR2016-012111
`Patent 8,504,746 B2
`____________
`
`Before JONI Y. CHANG, JENNIFER S. BISK, and MIRIAM L. QUINN,
`Administrative Patent Judges.
`
`QUINN, Administrative Patent Judge.
`FINAL WRITTEN DECISION
`35 U.S.C. § 318(a) and 37 C.F.R. § 42.73
`
`1 Cases IPR2017-00678 and IPR2017-00710, filed by LG Electronics, Inc.
`and Huawei Device Co., Ltd., respectively, had been joined with this
`proceeding. Due to settlement, these entities are no longer part of this
`proceeding. Case IPR2017-1211, Papers 32, 38.
`
`

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`IPR2016-01211
`Patent 8,504,746 B2
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`
`INTRODUCTION
`I.
`In this inter partes review, instituted pursuant to 35 U.S.C. § 134,
`
`Petitioner, as listed in the caption above, challenged the patentability of
`claims 1−12, 14, 15, 17−21, 23−31, 34, and 35 of U.S. Patent No. 8,504,746
`B2 (“the ’746 patent”), owned by Papst Licensing GMBH & Co. KG. We
`have jurisdiction under 35 U.S.C. § 6(c). This Final Written Decision is
`entered pursuant to 35 U.S.C. § 318(a) and 37 C.F.R. § 42.73. For the
`reasons discussed below, we determine that Petitioner has shown by a
`preponderance of the evidence that claims 1−9, 11, 12, 15, 17−21, 23−31,
`and 34 (“the challenged claims”) of the ’746 patent are unpatentable, but has
`not shown that claims 10 and 35 are unpatentable.
`
`A. PROCEDURAL HISTORY
`The Petitioner-captioned entities filed a Petition to institute inter
`
`partes review of claims 1−12, 14, 15, 17−21, 23−31, 34, and 35 of the ’746
`patent. Paper 4 (“Pet.”). Patent Owner filed a Preliminary Response.
`Paper 10 (“Prelim. Resp.”). On December 15, 2016, we instituted inter
`partes review as to challenged claims 1−12, 15, 17−21, 23−31, 34, and 35.
`Paper 11 (“Institution Decision” or “Dec”). The Petition was denied as to
`claim 14. Id.
`
`After institution, Patent Owner filed a Patent Owner Response.
`Paper 15 (“PO Resp.”). And Petitioner filed a Reply. Paper 23 (“Reply”).
`Patent Owner, upon authorization of the Board, filed an itemized listing of
`objectionable arguments and evidence filed in Petitioner’s Reply. Paper 27
`(“PO Listing”). Petitioner responded by filing a Petitioner’s Response to the
`Itemized Listing. Paper 28 (“Pet. Response”). We heard oral arguments on
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`September 13, 2017. A transcript of the hearing has been entered into the
`record. Paper 34 (“Tr.”).
`
`B. RELATED MATTERS
`Petitioner identifies the patent-at-issue as the subject matter of many
`district court cases filed in the Northern District of California, Eastern
`District of Texas, District of D.C. and District of Delaware. Pet 64−66; PO
`Notice Paper 5 at 1−4.
`The ’746 patent also has been the subject of multiple petitions for
`inter partes review filed by various Petitioners. Paper 5 at 4. A final written
`decision in each of the following proceedings is entered concurrently with
`this decision: IPR2016-01200 and IPR2016-01213.
`
`C. JOINED PETITIONER AND REAL PARTIES-IN-INTEREST
`Further, the Petition states that the following parties are real parties-
`in-interest: Canon Inc.; Canon U.S.A., Inc.; Canon Financial Services, Inc.;
`Fujifilm Corporation; Fujifilm Holdings America Corporation; Fujifilm
`North America Corporation; JVC Kenwood Corporation; JVC Kenwood
`USA Corporation; Nikon Corporation, Nikon Inc.; Olympus Corporation;
`Olympus America Inc.; Panasonic Corporation; Panasonic Corporation of
`North America; Samsung Electronics Co., Ltd; and Samsung Electronics
`America, Inc. Pet. 63.
`
`D. THE ’746 PATENT (EX. 1201)
`The ’746 patent is titled, “Analog Data Generating and Processing
`
`Device for use With a Personal Computer.” It relates generally to the
`transfer of data, and, in particular, to interface devices for communication
`between a computer or host device and a data transmit/receive device from
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`which data is to be acquired or with which two-way communications is to
`take place. Ex. 1201, 1:20–24. Figure 1, reproduced below, illustrates a
`general block diagram of an interface device 10. Id. at 4:59−60.
`
`
`
`According to Figure 1, first connecting device 12 is attached to a host
`
`device (not shown), to digital signal processor (DSP) 13 and memory means
`14. Id. at 4:60−65. DSP 13 and memory means 14 are also connected to
`second connecting device 15. Id. at 4:64−67. The interface device
`“simulates a hard disk with a root directory whose entries are ‘virtual’ files
`which can be created for the most varied functions.” Id. at 5:11−14.
`“Regardless of which data transmit/receive device at the output line 16 is
`attached to the second connecting device, the digital signal processor 13
`informs the host device that it is communicating with a hard disk drive.”
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`Id. at 5:31−34. In one embodiment, the interface device is automatically
`detected when the host system is “booted,” resulting in the user “no longer
`[being] responsible for installing the interface device 10 on the host device
`by means of specific drivers which must also be loaded.” Id. at 7:13−20.
`
`E. REPRESENTATIVE CLAIM
`There are three independent claims in the set of challenged claims (1,
`31, 34). Claim 1 is reproduced below, and is illustrative of the subject
`matter claimed.
`1. An analog data acquisition device operatively connect
`able to a computer through a multipurpose interface of the
`computer, the computer having an operating system
`programmed so that, when the computer receives a signal
`from the device through said multipurpose interface of the
`computer indicative of a class of devices, the computer
`automatically activates a device driver corresponding to the
`class of devices for allowing the transfer of data between the
`device and the operating system of the computer, the analog
`data acquisition device comprising:
`
`a) a program memory;
`
`b) an analog signal acquisition channel for receiving a
`signal from an analog source;
`
`c) a processor operatively interfaced with the
`multipurpose interface of the computer, the program
`memory, and a data storage memory when the analog data
`acquisition device is operational;
`
`d) wherein the processor is configured and programmed
`to implement a data generation process by which analog data
`is acquired from the analog signal acquisition channel, the
`analog data is processed and digitized, and the processed
`and digitized analog data is stored in a file system of the
`data storage memory as at least one file of digitized analog
`data;
`
`e) wherein when the analog acquisition device is
`operatively interfaced with the multipurpose interface of the
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`computer, the processor executes at least one instruction set
`stored in the program memory and thereby automatically
`causes at least one parameter indicative of the class of
`devices to be sent to the computer through the multipurpose
`interface of the computer, independent of the analog source,
`wherein the analog data acquisition device is not within the
`class of devices; and
`
`f) wherein the processor is further configured and
`programmed to execute at least one other instruction set
`stored in the program memory to thereby allow the at least
`one file of digitized analog data acquired from the analog
`signal acquisition channel to be transferred to the computer
`using the device driver corresponding to said class of
`devices so that the analog data acquisition device appears to
`the computer as if it were a device of the class of devices;
`
`whereby there is no requirement for any user-loaded
`file transfer enabling software to be loaded on or installed in
`the computer in addition to the operating system.
`F. INSTITUTED GROUNDS OF UNPATENTABILITY
`
`We instituted inter partes review of claims 1−12, 15, 17−21, 23−31,
`34, and 35 and on the following grounds (Dec. 20−21):
`Reference(s)
`Basis
`Kawaguchi,2 and Matsumoto3
`§ 103
`
`Claim(s)
`1−12, 15, 17−19, 26,
`29−31, 34, and 35
`21, 24, 25, 27, and 28
`
`Kawaguchi, Matsumoto, and
`DASM-AD144
`
`§ 103
`
`
`2 JP H4-15853, Jan. 21, 1992 (Ex. 1206) (Ex. 1207, English translation,
`“Kawaguchi”). All further citations to Kawaguchi are to the English
`translation (Ex. 1207).
`3 US Patent No. 5,684,607, Nov. 4, 1997 (Ex. 1208) (“Matsumoto”).
`4 Analogic, DASM-AD14, 14-Bits, 2 MHz A-to-D SCSI Substation for the
`Most Demanding Data Acquisition Applications (1992) (Ex. 1209, “DASM-
`AD14”).
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`Kawaguchi, Matsumoto, and
`Saito5
`Kawaguchi, Matsumoto, Saito,
`and Muramatsu6
`
`§ 103
`
`§ 103
`
`20
`
`23
`
`In addition to the supporting argument for these grounds in the
`Petition, Petitioner also presents expert testimony. Ex. 1204, Declaration of
`Paul F. Reynolds, Ph.D. (“Reynolds Declaration”). Patent Owner supports
`its arguments of patentability with a Declaration of Thomas A. Gafford.
`Ex. 2008 (“Gafford Declaration”).
`
`II. ANALYSIS
`
`A. CLAIM INTERPRETATION
`In an inter partes review, claim terms in an unexpired patent are given
`
`their broadest reasonable construction in light of the specification of the
`patent in which they appear. 37 C.F.R. § 42.100(b). Under the broadest
`reasonable interpretation standard, claim terms generally are given their
`ordinary and customary meaning, as would be understood by one of ordinary
`skill in the art in the context of the entire disclosure. See In re Translogic
`Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007). Claims of an expired
`patent are given their ordinary and customary meaning similar to the
`construction standard applied by the U.S. district courts. See Phillips v.
`AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) (en banc); In re Rambus Inc.,
`694 F.3d 42, 46 (Fed. Cir. 2012); see also Black & Decker, Inc. v. Positec
`USA, Inc., 646 F. App’x. 1019, 1024 (non-precedential) (applying the U.S.
`district court standard to construe the claims of an expired patent in an inter
`
`
`5 US Patent No. 5,724,155, Mar. 3, 1998 (Ex. 1213, “Saito”).
`6 US Patent No. 5,592,256, Jan. 7, 1997 (Ex. 1212, “Muramatsu”).
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`partes review). “In many cases, the claim construction will be the same
`under [both] standards.” In re CSB-System Int’l, Inc., 832 F.3d 1335, 1341
`(Fed. Cir. 2016).
`
`In the Decision on Institution, we applied the broadest reasonable
`interpretation standard to construe a claim term. We note, however, that the
`’746 patent claims, under 35 U.S.C. § 120, the benefit of the filing date of
`U.S. Patent No. 6,470,399 (“the ’399 patent”), through a chain of continuing
`applications. Ex. 1003, [63]. After institution of trial in the present case,
`Patent Owner, in related cases involving the ’399 patent, indicated that the
`’399 patent will expire on March 3, 2018 (20 years from the ’399 patent’s
`March 3, 1998 filing date). See, e.g., Case IPR2016-01839, Ex. 1001, [22];
`Paper 14; Case IPR2017-00443, Paper 6, 7 n.1. In the institution decisions
`in those related cases involving the ’399 patent, we did not apply the
`broadest reasonable interpretation standard, and adopted the claim
`constructions set forth by the district court and affirmed by the Federal
`Circuit in In re Papst Licensing GmbH & Co. KG Litig. v. Fujifilm Corp.,
`778 F.3d 1255 (Fed. Cir. 2015) (Ex. 1011).7 See, e.g., Case IPR2017-00443,
`Papers 7−8. In the instant proceeding, neither party provides, nor can we
`discern, any reason on which the broadest reasonable interpretation standard
`would lead to a different result than the district court claim construction
`standard.
`
`We note that only those claim terms which are in controversy need to
`be construed, and only to the extent necessary to resolve the controversy.
`See Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co. Ltd., 868 F.3d
`1013, 1017 (Fed. Cir. 2017); Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc.,
`
`7 The ’746 patent and the ’399 patent share the same Specification and some
`of the claim terms are used in both patents (e.g., interface device).
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`200 F.3d 795, 803 (Fed. Cir. 1999). During the preliminary stage of the
`proceeding, the parties proposed constructions for several claim terms. Pet.
`7–9; Prelim. Resp. 16, 17, 20–28. In our Decision on Institution, we
`construed one term: analog signal acquisition channel. Dec. 7−9. We
`stated as follows:
`
`“analog signal acquisition channel”
`Independent claim 1 recites that the “analog data
`
`acquisition device” comprises “an analog signal acquisition
`channel for receiving a signal from an analog source.” Ex.
`1201, 11:59−60. Claim 1 further recites that the processor is
`configured and programmed to implement a data generation
`process by which “analog data is acquired from the analog
`signal acquisition channel.” Id. at 11:65−12:1 (emphasis
`added). In contrast, claims 31 and 34 do not recite an “analog
`signal acquisition channel.” Instead, claims 31 and 34 require
`acquiring analog data from an analog source. In claim 31, the
`analog source is operatively interfaced with the processor,
`whereas in claim 34, there is no recited relationship between the
`processor and the analog source. Notably, although analog data
`is received from the analog source, none of the independent
`claims (1, 31 and 34), require that the claimed analog (data)
`acquisition device and interface comprise an analog source.
`Petitioner does not identify any meaningful difference between
`the claims with regard to the acquisition of analog data. At this
`juncture, neither party proffers a construction for “analog signal
`acquisition channel.” We find, however, that the claim
`language differences between these independent claims warrant
`that we clarify the scope of the “analog signal acquisition
`channel” in claim 1.
`
`First, claim 1 expressly requires that the “analog signal
`acquisition channel” receive a signal from an analog source,
`which, by the plain reading of the claim, must be an analog
`signal. Second, the Specification supports this interpretation.
`In particular, we note that Figure 2, which describes in more
`detail interface device 10 shown in Figure 1, depicts 8-channel
`multiplexer 1520, described as having multiple inputs, each
`connected to a sample/hold circuit. Id. at 8:61−65. The 8-
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`channel multiplexer (1520), feeds its output signal 1525 into an
`analog/digital converter 1530 and to the DSP 1300. Id. That is,
`the Specification describes that multiplexer 1520 receives an
`analog signal, which is then sent to other parts of interface 10
`for digitization. This understanding is enforced by further
`description of Figure 2 in the Specification.
`
`For example, the Specification refers to interface device
`10 connecting (shown as line 16) to “any data transmit/receive
`device.” Id. at 9:34−37. Interface device 10 also implements
`an analog input, by “means of the blocks 1505−1535,” which
`include 8-channel multiplexer 1520. Id. at 9:34−37. The
`Specification goes on to describe the input having 8 channels,
`independently programmable, and with a sampling rate of 1.25
`MHz and quantization of 12 bits. Id. at 9:37−42. Taken
`together, this description of the 8 channels and the analog input
`to interface device 10 informs us that the recited “analog signal
`acquisition channel” of claim 1, which is claimed as part of the
`analog data acquisition device, receives an analog signal from
`an analog source. See Ex. 1201, 11:56−60 (“analog data
`acquisition device comprising: . . . b) an analog signal
`acquisition channel”).
`
`The analog signal acquisition channel, however, is
`separate and distinct from the analog source. For instance,
`claim 1 requires that the analog signal acquisition channel
`receive the analog signal from the analog source. Furthermore,
`claim 1 requires that the processor “is configured and
`programmed to implement a data generation process by which
`analog data is acquired from the analog signal acquisition
`channel.” Id. at 11:65−12:1. This claim language requires that
`the data generation process, which acquires data from the
`analog signal acquisition channel, must involve the claimed
`processor.
` This understanding
`is consistent with
`the
`Specification, which describes
`that
`the “programmable
`amplifier 1525 and the 8-channel multiplexer 1520 are
`controlled via an amplifier channel selection circuit 1540 which
`is in turn controlled by the DSP 1300.” Id. at 8:67−9:3.
`Based on the stated analysis, we determined that “analog signal
`
`acquisition channel” is part of the analog acquisition device, and its
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`processor implements the process by which analog data is received through
`the analog signal acquisition channel from the claimed analog source. Dec.
`7−9. The parties agree with the Board’s construction of this term. PO Resp.
`13; Reply 2 n.1. Accordingly, we adopt this construction in this proceeding.
`
`No other terms need be construed for us to render this Final Written
`Decision.
`
`B. OBVIOUSNESS DETERMINATION
`Petitioner asserts that the challenged claims would have been obvious
`
`over the combination of Kawaguchi and Matsumoto. See supra, Section I.E.
`A patent claim is unpatentable as obvious under 35 U.S.C. § 103(a) if the
`differences between the claimed subject matter and the prior art are such that
`the subject matter, as a whole, would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said
`subject matter pertains. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
`(2007). The question of obviousness is resolved on the basis of underlying
`factual determinations including: (1) the scope and content of the prior art;
`(2) any differences between the claimed subject matter and the prior art;
`(3) the level of ordinary skill in the art; and (4) objective evidence of
`nonobviousness.8 Graham v. John Deere Co., 383 U.S. 1, 17–18 (1966).
`1. Level of Ordinary Skill in the Art
`In our Decision on Institution, we stated,
`Dr. Reynolds testifies that a person having ordinary skill in
`the art at the time of the invention “would have had at least a
`
`8 Neither party introduced objective evidence of non-obviousness or argued
`that the existence of secondary considerations impacts this Decision’s
`obviousness analysis. Accordingly, our analysis is based upon the first three
`of the four Graham factors.
`
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`four-year degree in electrical engineering, computer science,
`or related field of study, or equivalent experience, and at
`least two [years of] experience in studying or developing
`computer interfaces or peripherals.” Ex. 1204 ¶ 39.
`Dr. Reynolds further testifies that such an artisan also would
`“be familiar with operating systems (e.g., MS-DOS,
`Windows, Unix) and their associated file systems (e.g., a
`FAT file system), device drivers for computer components
`and peripherals (e.g., mass storage device drivers), and
`communication
`interfaces
`(e.g., SCSI and PCMCIA
`interfaces).” Id. Patent Owner confirms that Petitioner’s
`statements regarding the level of ordinary skill in the art are
`mostly consistent with Patent Owner’s view, but nonetheless
`contends that an ordinarily skilled artisan would have one
`more year of experience, or, alternatively, five or more years
`of experience without a bachelor’s degree. Prelim. Resp.
`21−22. Notwithstanding the apparent differing opinions, at
`this juncture, the variance between the proffered levels of
`ordinary skill in the art does not have meaningful impact in
`our determination of whether to institute inter partes review.
`Our analysis in this Decision is supported by either level of
`skill.
`
`
`Dec. 10−11. Patent Owner in its Response reiterates the same level of
`ordinary skill that it proffered in the Preliminary Response. PO Resp. 12.
`Patent Owner presents no argument as to why Petitioner’s proposal is
`erroneous or why Patent Owner’s proposal is more appropriate for this
`proceeding. More importantly, no argument presented hinges on whether
`either party’s proposed level of ordinary skill in the art is adopted.
`
`We find Mr. Reynolds’ testimony persuasive as it is presents more
`than just the educational level of a person of ordinary skill in the art.
`Petitioner’s proposal is more helpful as it identifies the familiar objects of
`the technology used by a person of ordinary skill at the time of the
`invention: operating systems (e.g., MS-DOS, Windows, Unix) and their
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`associated file systems (e.g., a FAT file system), device drivers for computer
`components and peripherals (e.g., mass storage device drivers), and
`communication interfaces (e.g., SCSI and PCMCIA interfaces).. Ex. 1204
`§ 39. We, therefore, determine that Petitioner’s level of ordinary skill in the
`art is appropriate.
`2. Overview of Kawaguchi (Ex. 1207)
`Kawaguchi discloses a SCSI device converter for connecting a
`plurality of peripheral devices to an engineering workstation. Ex. 1207, 2.
`Figure 1 of Kawaguchi is reproduced below.
`
`As shown in Figure 1 of Kawaguchi, SCSI device converter 3
`includes: SCSI interface 7 for connecting to engineering workstation 1;
`personal computer input/output bus interfaces 8, 9 for connecting to output
`
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`device (plotter) 4 and input device (CD-ROM) 5, respectively; bi-directional
`parallel bus interface 10 for connecting to interrupt control device
`(sequencer) 6. SCSI device converter 3 can be adapted to accommodate any
`other type of device interface, including analog-to-digital converter 19 to
`receive analog data from an analog sensor 18. Id. at 5. SCSI device
`converter 3 also implements data writing unit 11, data reading unit 12,
`control data writing 13, interrupt data reading unit 14, code converting unit
`15, control unit 16, and interrupt control unit 17, by using a microcomputer,
`ROM, and RAM. Id.
`
`The engineering workstation has a SCSI interface “as standard
`equipment for connecting with the hard disk.” Id. at 5. According to
`Kawaguchi, “the SCSI device converter is able to input and output data to a
`SCSI interface of an [engineering workstation] using the same standards as
`SCSI interface for a hard disk.” Id. at 4. The SCSI driver of the engineering
`workstation is used as a driver for connecting a hard disk, performing
`operations in accordance with the SCSI standards. Id. at 7.
`Figure 2 of Kawaguchi is reproduced below.
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`As shown in Figure 2 of Kawaguchi, the processing procedure
`
`includes an initialization process which includes: “Inquiry” that represents
`reporting of attribute information of a target and logical units (identification
`code of a device type); “Start/Stop Unit” that represents start/stop of the
`logical unit; “Test Unit Ready” that represents testing whether or not the
`logical unit is available; and “Mode Sense” that represents reporting of
`various parameter values (data format and storage medium configuration).
`Id. at 7. The initialization process allows the writing and reading units of the
`SCSI device converter to be activated for the host engineering workstation.
`After the initialization process, the host engineering workstation “performs
`writing to or reading from the writing units and reading units.” Id.
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`Specifically, “Read Extended” represents “reading data from a designated
`block, i.e., the data reading unit (12) or the interrupt data reading unit (14).”
`Id. And “Write Extended” presents “writing data to a designated block, i.e.,
`the data writing unit (11) or the control data writing unit (13).” Id.
`
`1. Overview of Matsumoto (Ex. 1208)
`Matsumoto discloses a “facsimile apparatus having a scanner for
`
`reading original images, a memory for storing images, a printer for recording
`images, and a communication control section for controlling the
`transmission/reception of data with a receiving communication apparatus.”
`Ex. 1208, Abstract. An object of Matsumoto’s invention is to increase the
`speed at which data is transferred between a host computer and a facsimile
`apparatus by using a SCSI interface. Id. at 1:37–45.
`
`Figure 1 of Matsumoto, reproduced below, illustrates a block diagram
`of a facsimile apparatus.
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`As shown in Figure 1 of Matsumoto, the facsimile apparatus includes
`
`CPU 1, ROM 2, RAM 3, image memory 4, image conversion section 5,
`scanner 6, printer 7, line control section 8, interface section 9, file
`management section 10, storage device 11, and operation section 12. Id. at
`3:1–34. CPU 1 controls the entire apparatus in accordance with control
`programs stored in ROM 2. Id. Communication protocols between the
`facsimile apparatus and host computer 15 are controlled by interface
`section 9, using a SCSI interface. Id.
`3. Differences Between the Prior Art and Claimed Subject Matter
`The Petition sets forth that Kawaguchi alone teaches or suggests the
`
`claim limitations, and relies, in the alternative, on Matsumoto for the
`teachings of a file system. Petitioner also relies on DASM-AD14 for its
`teachings of specific SCSI command operations, as it pertains to certain
`dependent claims. Petitioner further relies on Saito for teachings of
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`transmission and reception of image data, concerning dependent claim 20,
`and on Muramatsu for teachings of a fast Fourier transform operation,
`concerning dependent claim 23. We evaluate the arguments and evidence
`presented on a claim-by-claim basis.
`Claim 1
`a)
`For this claim, Petitioner breaks down the claim limitations into
`
`elements as follows: a program memory as the first element (Pet. 17); the
`analog signal acquisition channel as the second element (id.); a processor,
`program memory and a data storage memory as the third element (id. at
`18−19); the data generation process where the “digitized analog data is
`stored in a file system of the data storage memory as at least one file of
`digitized analog data” as the fourth element (id. at 19−22); interfacing with
`the multipurpose interface as the fifth element (id. at 22−24); the processor
`further configured and programmed to “allow the at least one file of
`digitized analog data acquired from the analog signal acquisition channel to
`be transferred to the computer” as the sixth element, first part (id.at 25−26);
`and the “no requirement for any user-loaded file transfer enabling software”
`limitation as the sixth element, second part (id. at 26−27).
`
`We agree with the mappings set forth in the Petition (Pet. 15−27), and
`as summarized further here. For instance, with regard to the first, second,
`and third elements we are persuaded by Petitioner’s evidence that:
`a. Kawaguchi’s engineering workstation (EWS) discloses the
`recited computer (Pet. 16);
`b. Kawaguchi’s SCSI interface (7) discloses the recited
`multipurpose interface (id.);
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`c. Kawaguchi’s SCSI device converter (3) together with
`connected peripheral devices discloses the analog data
`acquisition device (id.);
`d. Kawaguchi’s SCSI device converter includes a microcomputer,
`ROM and RAM, where the ROM and RAM disclose the recited
`program memory (id. at 17), the RAM discloses data storage
`memory; and the microcomputer discloses the recited processor
`(id. at 18); and
`e. Kawaguchi’s A/D converter 19 receiving analog data from an
`analog device 18 (sensor) discloses an analog signal acquisition
`channel, as we have construed the term in Section II.A, supra
`(see id. 17−18).
`As to the fourth element, Petitioner contends that the combination of
`
`teachings in Kawaguchi and Muramatsu teaches the following:
`wherein the processor is configured and programmed to
`implement a data generation process by which analog data is
`acquired from the analog signal acquisition channel, the analog
`data is processed and digitized, and the processed and digitized
`analog data is stored in a file system of the data storage
`memory as at least one file of digitized analog data.
`
`Pet. 19−22. This is the “data generation process” limitation. Petitioner
`shows, and we agree, that Kawaguchi’s sensor 18 generates analog data that
`the A/D converter 19 receives and processes. Id. at 19−20 (citing Ex. 1207,
`p. 5−6, Figure 1; Ex. 1203 ¶¶ 103, 108−112). Because Kawaguchi discloses
`that the processor-implemented control unit controls input of data from
`peripheral devices, Petitioner contends that the Kawaguchi processor is
`configured and programmed to implement a data generation process. Id. at
`20. More particularly, Petitioner contends that Kawaguchi’s control unit,
`
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`which is implemented with the disclosed microcomputer, controls the data
`transmission between the sensor and the A/D converter, and the Kawaguchi
`code-converting unit converts the data format and stores the data in data
`storage memory as digitized analog data. Id. (citing Ex. 1204 ¶ 108). We
`agree with these contentions and find them supported in the record as cited
`in the Petition.
`
`But this is not the end of the inquiry with regard to the “data
`generation process.” At issue is whether Petitioner has shown sufficiently
`that either Kawaguchi alone or in combination with Matsumoto teaches or
`suggests that the process includes storing the digitized analog data in a file
`system of the data storage memory as at least one file of digitized analog
`data. Kawaguchi does not disclose expressly that its RAM (mapped to the
`recited “data storage memory”), which is alleged to store the digitized
`analog data, includes a file system.
`i. File System
`Petitioner presents two contentions with regard to the file system
`
`limitation. First, Petitioner contends that Kawaguchi either discloses the
`limitation or that it would have been obvious to store the analog data as at
`least one file in a file system. In particular, Petitioner argues that because
`Kawaguchi’s EWS identifies the data reading unit (of the SCSI device
`converter) as a hard disk, a person of ordinary skill in the art would
`understand that the data stored in the data storage memory of the RAM
`would be stored as at least one file. Id. at 21 (citing Ex. 1207, p.6; Ex. 1204
`¶¶ 113−114, 108−118). The RAM, according to Dr. Reynolds, would
`implement a disk structure like a file system, including a directory, names,
`and file storage information. Ex. 1204 ¶¶ 113−114.
`
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`In the alternative, Petitioner relies on Matsumoto as disclosing the file
`
`system. In particular, Matsumoto discloses a file management section in a
`fax machine that stores files. Pet. 21 (citing 1207, 3:20−22, 5:55−56). The
`Petition sets forth that it would have been obvious to use a file system as
`taught in Matsumoto with the system in Kawaguchi “to achieve the
`organization and naming benefits that can be achieved using a file system.”
`Id. at 22; Ex. 1204 ¶¶ 116−118; see also Pet. 12−13 (stating that a person of
`ordinary skill in the art would be motivated to combine the features of
`Matsumoto with Kawaguchi concerning the file system because of the
`advantages of those features, namely “organization and naming benefits can
`be achieved using a file system”).
`
`Patent Owner challenges both of Petitioner’s con