`571-272-7822
`
`
`Paper No. 46
`Entered: January 17, 2018
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
`and GLOBALFOUNDRIES U.S. INC.,
`Petitioner,
`
`v.
`
`GODO KAISHA IP BRIDGE 1,
`Patent Owner.
`____________
`
`Case IPR2016-013771
`Patent 6,197,696 B1
`____________
`
`Before JUSTIN T. ARBES, MICHAEL J. FITZPATRICK, and
`JENNIFER MEYER CHAGNON, Administrative Patent Judges.
`
`CHAGNON, Administrative Patent Judge.
`
`
`
`
`FINAL WRITTEN DECISION
`Inter Partes Review
`35 U.S.C. § 318(a) and 37 C.F.R. § 42.73
`
`
`
`
`
`
`
`1 GlobalFoundries U.S. Inc.’s motion for joinder in Case IPR2017-00922
`was granted.
`
`
`
`IPR2016-01377
`Patent 6,197,696 B1
`
`
`I.
`
`INTRODUCTION
`We have jurisdiction to hear this inter partes review under 35 U.S.C.
`§ 6. This Final Written Decision is issued pursuant to 35 U.S.C. § 318(a)
`and 37 C.F.R. § 42.73. For the reasons discussed herein, we determine that
`Petitioner has shown, by a preponderance of the evidence, that claims 10–12
`(“the challenged claims”) of U.S. Patent No. 6,197,696 B1 (Ex. 1001, “the
`’696 patent”) are unpatentable.
`
`A. Procedural History
`
`Taiwan Semiconductor Manufacturing Company, Ltd. (“Petitioner”)2
`filed a Petition for inter partes review of claims 10–12 of the ’696 patent.
`Paper 2 (“Pet.”). Petitioner provided a Declaration of Bruce W. Smith,
`Ph.D., (Ex. 1002) to support its positions. Godo Kaisha IP Bridge 1 (“Patent
`Owner”) filed a Preliminary Response to the Petition. Paper 6 (“Prelim.
`Resp.”). Pursuant to our authorization (Paper 7), Petitioner filed a Reply to
`the Preliminary Response (Paper 9) and Patent Owner filed a Sur-Reply
`(Paper 10).
`Pursuant to 35 U.S.C. § 314(a), on January 18, 2017, we instituted
`inter partes review to determine whether claims 10–12 are unpatentable
`
`
`2 On August 8, 2017, we granted a motion for joinder filed by
`GlobalFoundries U.S. Inc. (“GlobalFoundries”) in IPR2017-00922, and
`authorized GlobalFoundries to participate in this proceeding only on a
`limited basis. See Paper 29; Ex. 3003 (IPR2017-00922, Paper 10).
`Although the papers referenced herein were filed by Taiwan Semiconductor
`Manufacturing Company, Ltd., we refer to both entities as “Petitioner”
`throughout this Decision.
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`under 35 U.S.C. § 103(a) as obvious in view of Grill3 and Aoyama.4 See
`Paper 11 (“Inst. Dec.”). Subsequent to institution, Patent Owner filed a
`Patent Owner Response (Paper 19, “PO Resp.”), along with a Declaration of
`Alexander Glew, Ph.D., (Ex. 2009) to support its positions. Petitioner filed
`a Reply (Paper 26, “Reply”) to the Patent Owner Response, along with a
`second Declaration of Dr. Smith (Ex. 1050) in support thereof.
`Petitioner filed a Motion to Exclude (Paper 30, “Pet. Mot.”) certain
`evidence submitted by Patent Owner. Patent Owner filed an Opposition
`(Paper 37), and Petitioner filed a Reply (Paper 41). Patent Owner filed
`Observations on the cross-examination of Dr. Smith (Paper 34), and
`Petitioner filed a Response thereto (Paper 35). Pursuant to our authorization,
`Patent Owner also filed a listing of portions of Petitioner’s Reply that
`allegedly exceed the proper scope of a reply (Paper 36).
`A combined oral hearing for IPR2016-01376, IPR2016-01377,
`IPR2016-01378, and IPR2016-01379 was held on September 12, 2017.
`A transcript of the hearing is included in the record. Paper 45 (“Tr.”).
`
`B. Related Proceedings
`
`The parties indicate that the ’696 patent has been asserted in Godo
`Kaisha IP Bridge 1 v. Broadcom Ltd., No. 2-16-cv-00134 (E.D. Tex. 2016).
`Paper 4, 2; Pet. 84. Three additional inter partes reviews challenge claims
`of the ’696 patent. See Case IPR2016-01376; Case IPR2016-01378; Case
`IPR2016-01379; Pet. 82–83; Paper 4, 2–3.
`
`
`3 U.S. Patent No. 6,140,226, filed July 30, 1998, issued Oct. 31, 2000
`(Ex. 1005).
`4 U.S. Patent No. 5,592,024, issued Jan. 7, 1997 (Ex. 1018).
`
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`C. The ’696 Patent
`
`The ’696 patent relates to a “method for forming an interconnection
`structure in a semiconductor integrated circuit.” Ex. 1001, 1:5–7.
`According to the ’696 patent, “[a]n object of the present invention is
`providing a method for forming an interconnection structure in which an
`insulating film with a low dielectric constant can be formed by an ordinary
`resist application process.” Id. at 3:2–5.
`The ’696 patent describes various embodiments of methods of
`forming an interconnection structure. Id. at [57]. The manufacturing
`process for a modified example of the fifth embodiment is depicted in
`Figures 24(a)–(c), 25(a)–(c), and 26(a)–(d). Id. at 24:52–27:60.
`Figure 24(a) of the ’696 patent is reproduced below.
`
`
`Figure 24(a), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Ex. 1001, 9:28–31. As seen in Figure 24(a), silicon nitride film 552 is
`formed over first metal interconnects 551 (only one shown in Figure 24(a)),
`which are formed on semiconductor substrate 550. Id. at 24:60–62. First
`organic film 553, first silicon dioxide film 554, second organic film 555,
`second silicon dioxide film 556, and titanium nitride film 557 are deposited
`sequentially. Id. at 24:65–25:11.
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`Figure 24(b) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 24(b), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Id. at 9:28–31. In this step, first resist pattern 558 is formed on titanium
`nitride film 557. Id. at 25:19–21. First resist pattern 558 includes openings
`for forming wiring grooves of the interconnection structure. Id.
`Figure 24(c) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 24(c), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Ex. 1001, 9:28–31. In this step, titanium nitride film 557 is dry-etched using
`first resist pattern 558 as a mask, thereby forming mask pattern 559. Id. at
`25:21–23.
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`Figure 25(a) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 25(a), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Id. at 9:32–35. In this step, first resist pattern 558 is removed. Id. at 25:26–
`27.
`
`Figure 25(b) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 25(b), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Ex. 1001, 9:32–35. In this step, second resist pattern 560 is formed on mask
`pattern 559. Id. at 25:27–29. Second resist pattern 560 includes openings
`for forming contact holes of the interconnection structure. Id. In this
`embodiment, the openings in second resist pattern 560 are larger than the
`designed size of the contact holes “in respective directions vertical and
`parallel to [the] wiring grooves.” Id. at 25:29–34.
`
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`Figure 25(c) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 25(c), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Id. at 9:32–35. In this step, second silicon dioxide film 556 is dry-etched
`using both second resist pattern 560 and mask pattern 559 as a mask, thereby
`forming patterned second silicon dioxide film 556A. Id. at 25:36–39.
`A three-dimensional depiction of etching using both second resist
`pattern 560 and mask pattern 559 as a mask is provided in Figure 27(b) of
`the ’696 patent, which is reproduced below.
`
`
`Figure 27(b), reproduced above, is a perspective view of the partially formed
`interconnection structure of Figure 25(c). Ex. 1001, 9:40–42. As can be
`seen in Figure 27(b), patterned second silicon dioxide film 556A is etched
`only where the openings in the second resist pattern 560 and mask pattern
`559 overlap.
`
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`According to the ’696 patent, using larger openings in second resist
`pattern 560 allows “openings of the patterned second silicon dioxide film
`556A for forming contact holes [such that they are] self-aligned with the
`openings of the mask pattern 559 for forming wiring grooves,” “even if the
`openings of the second resist pattern 560 for forming contact holes have
`misaligned with the openings of the mask pattern 559 for forming wiring
`grooves.” Id. at 25:46–52. This self-alignment occurs “because the
`openings of the patterned second silicon dioxide film 556A for forming
`contact holes are formed in respective regions where the openings of the
`second resist pattern 560 for forming contact holes overlap with
`corresponding openings of the mask pattern 559 for forming wiring
`grooves.” Id. at 25:53–57.
`Figure 26(a) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 26(a), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Id. at 9:36–39. In this step, second organic film 555 is dry-etched using
`patterned second silicon dioxide film 556A as a mask, thereby forming
`patterned second organic film 555A. Id. at 25:66–26:1; see also id. at
`Fig. 28(a) (showing a perspective view of this process step).
`
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`Figure 26(b) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 26(b), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Id. at 9:36–39. In this step, patterned second silicon dioxide film 556A
`(Fig. 26(a)) is dry-etched using mask pattern 559 as a mask, and first silicon
`dioxide film 554 (Fig. 26(a)) is dry-etched using patterned second organic
`film 555A as a mask. Id. at 26:15–18; see also id. at Fig. 28(b) (showing a
`perspective view of this process step).
`Figure 26(c) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 26(c), reproduced above, is a cross-sectional view of a partially
`formed interconnection structure during a process step for forming the same.
`Ex. 1001, 9:36–39. In this step, patterned second organic film 555A
`(Fig. 26(b)) is dry-etched using mask pattern 559 and patterned second
`silicon dioxide film 556B as a mask, and first organic film 553 (Fig. 26(b))
`is dry-etched using patterned silicon dioxide film 554A as a mask. Id. at
`26:22–26; see also id. at Fig. 29(a) (showing a perspective view of this
`process step). This etching forms patterned second organic film 555B
`
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`having wiring grooves 561 and patterned first organic film 553A having
`contact holes 562. Id. at 26:26–29.
`Figure 26(d) of the ’696 patent, illustrating a subsequent step in the
`method of this embodiment, is reproduced below.
`
`
`Figure 26(d), reproduced above, is a cross-sectional view of an
`interconnection structure formed by the method of the modified fifth
`embodiment. Id. at 9:36–39. In this step, silicon nitride film 552 is
`dry-etched using patterned first silicon dioxide film 554A as a mask. Id. at
`26:30–31. This etching forms patterned silicon nitride film 552A having
`contact holes, and also exposes first metal interconnects 551 within contact
`holes 562. Id. at 26:32–34. Then, a metal film is deposited over the surface
`of the substrate to fill in contact holes 562 and wiring grooves 561, thus
`forming second metal interconnects 563 and contacts 564. Id. at 26:38–47.
`
`D. Illustrative Claim
`
`Of the challenged claims, claim 10 is independent, and claims 11 and
`12 depend therefrom. Claim 10 of the ’696 patent, reproduced below, is
`illustrative of the challenged claims:
`10. A method for forming an interconnection structure,
`comprising the steps of:
`a) forming a first insulating film over lower-level metal
`interconnects;
`
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`10
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`b) forming a second insulating film, having a different
`composition than that of the first insulating film, over the first
`insulating film;
`c) forming a third insulating film, having a different
`composition than that of the second insulating film, over the
`second insulating film;
`d) forming a fourth insulating film, having a different
`composition than that of the third insulating film, over the third
`insulating film;
`e) forming a thin film over the fourth insulating film;
`f) forming a first resist pattern on the thin film, the first
`resist pattern having openings for forming wiring grooves;
`g) etching the thin film using the first resist pattern as a
`mask, thereby forming a mask pattern out of the thin film to have
`the openings for forming wiring grooves;
`h) removing the first resist pattern and then forming a
`second resist pattern on the fourth insulating film and the mask
`pattern, the second resist pattern having openings for forming
`contact holes;
`i) dry-etching the fourth insulating film using the second
`resist pattern and the mask pattern as a mask, thereby patterning
`the fourth insulating film to have the openings for forming
`contact holes;
`j) dry-etching the third insulating film using the patterned
`fourth insulating film as a mask, thereby patterning the third
`insulating film to have the openings for forming contact holes;
`k) dry-etching the patterned fourth insulating film and the
`second insulating film using the mask pattern and the patterned
`third insulating film as respective masks, thereby forming wiring
`grooves in the patterned fourth insulating film and patterning the
`second insulating film to have the openings for forming contact
`holes;
`
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`l) dry-etching the patterned third insulating film and the
`first insulating film using the mask pattern and the patterned
`second insulating film as respective masks, thereby forming the
`wiring grooves and the contact holes in the patterned third
`insulating film and the first insulating film, respectively; and
`m) filling in the wiring grooves and the contact holes with
`a metal film, thereby forming upper-level metal interconnects
`and contacts connecting the lower- and upper-level metal
`interconnects together.
`Ex. 1001, 34:1–49.
`
`II. ANALYSIS
`A. Principles of Law
`
`To prevail in its challenges to the patentability of the claims,
`Petitioner must demonstrate by a preponderance of the evidence that the
`challenged claims are unpatentable. 35 U.S.C. § 316(e); 37 C.F.R.
`§ 42.1(d). “In an [inter partes review], the petitioner has the burden from
`the onset to show with particularity why the patent it challenges is
`unpatentable.” Harmonic Inc. v. Avid Tech., Inc., 815 F.3d 1356, 1363 (Fed.
`Cir. 2016) (citing 35 U.S.C. § 312(a)(3) (requiring inter partes review
`petitions to identify “with particularity . . . the evidence that supports the
`grounds for the challenge to each claim”)). This burden of persuasion never
`shifts to Patent Owner. See Dynamic Drinkware, LLC v. Nat’l Graphics,
`Inc., 800 F.3d 1375, 1378–79 (Fed. Cir. 2015) (citing Tech. Licensing Corp.
`v. Videotek, Inc., 545 F.3d 1316, 1326–27 (Fed. Cir. 2008)) (discussing the
`burdens of persuasion and production in inter partes review).
`A claim is unpatentable for obviousness if, to one of ordinary skill in
`the pertinent art, “the differences between the subject matter sought to be
`patented and the prior art are such that the subject matter as a whole would
`
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`have been obvious at the time the invention was made.” KSR Int’l Co. v.
`Teleflex Inc., 550 U.S. 398, 406 (2007) (quoting 35 U.S.C. § 103(a)). The
`question of obviousness is resolved on the basis of underlying factual
`determinations, including “the scope and content of the prior art are to be
`determined; differences between the prior art and the claims at issue are to
`be ascertained; and the level of ordinary skill in the pertinent art resolved.”5
`Graham v. John Deere Co., 383 U.S. 1, 17–18 (1966).
`A patent claim “is not proved obvious merely by demonstrating that
`each of its elements was, independently, known in the prior art.” KSR,
`550 U.S. at 418. An obviousness determination requires finding “both ‘that
`a skilled artisan would have been motivated to combine the teachings of the
`prior art references to achieve the claimed invention, and that the skilled
`artisan would have had a reasonable expectation of success in doing so.’”
`Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd., 821 F.3d 1359, 1367–
`68 (Fed. Cir. 2016) (citation omitted); see KSR, 550 U.S. at 418 (for an
`obviousness analysis, “it can be important to identify a reason that would
`have prompted a person of ordinary skill in the relevant field to combine the
`elements in the way the claimed new invention does”). A motivation to
`combine the teachings of two references can be “found explicitly or
`implicitly in market forces; design incentives; the ‘interrelated teachings of
`multiple patents’; ‘any need or problem known in the field of endeavor at the
`
`
`5 Additionally, secondary considerations, such as “commercial success, long
`felt but unsolved needs, failure of others, etc., might be utilized to give light
`to the circumstances surrounding the origin of the subject matter sought to
`be patented. As indicia of obviousness or nonobviousness, these inquiries
`may have relevancy.” Graham, 383 U.S. at 17–18. The record, however,
`lacks any such evidence.
`
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`time of invention and addressed by the patent’; and the background
`knowledge, creativity, and common sense of the person of ordinary skill.”
`Plantronics, Inc. v. Aliph, Inc., 724 F.3d 1343, 1354 (Fed. Cir. 2013)
`(citation omitted). Further, an assertion of obviousness “cannot be sustained
`by mere conclusory statements; instead, there must be some articulated
`reasoning with some rational underpinning to support the legal conclusion of
`obviousness.” KSR, 550 U.S. at 418 (quoting In re Kahn, 441 F.3d 977, 988
`(Fed. Cir. 2006)); In re Nuvasive, Inc., 842 F.3d 1376, 1383 (Fed. Cir. 2016)
`(a finding of a motivation to combine “must be supported by a ‘reasoned
`explanation’” (citation omitted)).
`
`B. Level of Ordinary Skill in the Art
`
`Petitioner asserts that a person of ordinary skill in the art would have
`possessed “(1) the equivalent of a Master of Science degree from an
`accredited institution in electrical engineering, materials science, physics, or
`the equivalent; (2) a working knowledge of semiconductor processing
`technologies for integrated circuits; and (3) at least two years of experience
`in related semiconductor processing analysis, design, and development.
`Additional graduate education could substitute for professional experience,
`and significant work experience could substitute for formal education.”
`Pet. 30 (citing Ex. 1002 ¶ 167) (internal citations omitted). Dr. Glew
`testifies that “a person of ordinary skill in the art would have had a
`Bachelor’s of Science degree in materials science engineering, electrical
`engineering, mechanical engineering, chemical engineering, or an equivalent
`degree, and at least two years of experience in semiconductor processing or
`equipment.” Ex. 2009 ¶ 22.
`
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`We note the parties’ proposals differ in the specific degree required
`(i.e., Master of Science vs. Bachelor’s of Science); however, neither party
`argues this distinction makes a difference in analyzing the asserted ground or
`other issues in this proceeding. For clarity of the record, we adopt
`Petitioner’s proposal regarding the level of ordinary skill in the art, as it is
`more specifically directed to the technology described in the ’696 patent. In
`addition, given the disclosures in the ’696 patent and cited prior art, we
`agree with Petitioner that a Master of Science degree (or equivalent) in the
`relevant area better reflects the level of education and training that an
`ordinarily skilled artisan would have possessed at the time than a Bachelor’s
`degree, as Patent Owner contends. Our findings and conclusions, however,
`would be the same under either party’s proposed level of ordinary skill in the
`art. The level of ordinary skill in the art in this case further is reflected by
`the prior art of record. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed.
`Cir. 2001); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995); In re
`Oelrich, 579 F.2d 86, 91 (CCPA 1978).
`
`C. Claim Construction
`
`In an inter partes review, claim terms in an unexpired patent are given
`their broadest reasonable construction in light of the specification of the
`patent in which they appear. See 37 C.F.R. § 42.100(b); Cuozzo Speed
`Techs., LLC v. Lee, 136 S. Ct. 2131, 2144–46 (2016). Pursuant to that
`standard, the claim language should be read in light of the specification, as it
`would be interpreted by one of ordinary skill in the art. See In re Suitco
`Surface, Inc., 603 F.3d 1255, 1260 (Fed. Cir. 2010). We generally give
`claim terms their ordinary and customary meaning. See In re Translogic
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`Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007) (“The ordinary and
`customary meaning ‘is the meaning that the term would have to a person of
`ordinary skill in the art in question.’” (quoting Phillips v. AWH Corp.,
`415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc))).
`The claims, however, “should always be read in light of the
`specification and teachings in the underlying patent,” and “[e]ven under the
`broadest reasonable interpretation, the Board’s construction ‘cannot be
`divorced from the specification and the record evidence.’” Microsoft Corp.
`v. Proxyconn, Inc., 789 F.3d 1292, 1298 (Fed. Cir. 2015) (quoting In re
`NTP, Inc., 654 F.3d 1279, 1288 (Fed. Cir. 2011)). In other words, “[u]nder a
`broadest reasonable interpretation, words of the claim must be given their
`plain meaning, unless such meaning is inconsistent with the specification
`and prosecution history.” TriVascular, Inc. v. Samuels, 812 F.3d 1056, 1062
`(Fed. Cir. 2016) (citing Straight Path IP Grp., Inc. v. Sipnet EU S.R.O., 806
`F.3d 1356, 1362 (Fed. Cir. 2015)). Any special definition for a claim term
`must be set forth in the specification with reasonable clarity, deliberateness,
`and precision. See In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994).
`However, limitations are not to be read from the specification into the
`claims. See In re Van Geuns, 988 F.2d 1181, 1184 (Fed. Cir. 1993).
`1. Construction of “using the [designated layer] as a mask”
`In the Institution Decision, we preliminarily construed the phrase
`“using the [designated layer] as a mask”6 as “using the [designated layer] to
`
`
`6 Claim 10 recites several steps of etching “using” various layers—for
`example, the first resist pattern [step g]/second resist pattern and the mask
`pattern [step i]/patterned fourth insulating film [step j]—“as a mask.”
`As shorthand, we refer to the various layers as “the designated layer.”
`
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`define areas for etching.”7 Inst. Dec. 11–15. We further determined that “to
`meet the limitation ‘using the [designated layer] for etching,’ the designated
`layer ‘must actually be used to define areas for etching.’” Id. at 15 (quoting
`Prelim. Resp. 6 (emphasis Patent Owner’s)). Patent Owner agrees with this
`construction—namely, that “‘using’ something ‘as a mask’ during etching
`means using it to define areas for etching.” PO Resp. 8–9. Petitioner also
`applied this construction in this proceeding. See Tr. 6:7–18; see also id. at
`19:10–16 (Petitioner’s counsel: “No, no, we did not present a construction
`and we did not contest the Board’s construction.”). The parties do not
`dispute that “using the [designated layer] as a mask” means “using the
`[designated layer] to define areas for etching,” and we discern no reason
`from the evidence presented to change this construction. We, therefore,
`maintain our preliminary construction for purposes of this Final Written
`Decision.
`2. Application of the Construction of “using the [designated layer]
`as a mask”
`In the Institution Decision, we also provided additional guidance as to
`what “using the [designated layer] to define areas for etching” encompasses.
`See Inst. Dec. 15–19. In this regard, we provided the following
`non-exhaustive examples:
`[W]e do not consider a mask pattern that is entirely within a
`surrounding resist layer to be “used as a mask” within the
`meaning of claim 10.
`Id. at 15–16.
`
`
`7 The district court construed the phrase in the same manner in an Order
`dated November 9, 2016. Ex. 3002, 20–22.
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`We . . . are not persuaded that a layer, positioned between an
`overlying layer and the layer being etched and having an edge in
`line and flush with an edge of the overlying layer, is “used as a
`mask” within the meaning of claim 10. Instead, to be “used as a
`mask,” the between layer would need to define an additional
`portion of the layer being etched that is to be shielded from
`etching.
`Id. at 18 (citing Figures 25(c) and 27(b) of the ’696 patent as an example of
`“defin[ing] an additional portion . . . to be shielded from etching”).
`Our construction does not preclude, for example, a layer
`positioned between an overlying layer and the layer being etched
`from acting as a mask, within the meaning of claim 10, in an
`instance where the overlying layer also is removed during the
`etching, and thus, the between layer acts to shield the layer being
`etched during etching.
`Id. at 18 n.7.
`Patent Owner argues, pointing to this discussion, that “the Board . . .
`incorrectly added an additional negative limitation that ‘a layer, positioned
`between an overlying layer and the layer being etched and having an edge in
`line and flush with an edge of the overlying layer’ is not ‘“used as a mask”
`within the meaning of claim 10.’” PO Resp. 9–10 (quoting Inst. Dec. 18)
`(emphasis Patent Owner’s); see also id. at 10–18. Patent Owner presents
`several arguments regarding this allegedly improper “additional negative
`limitation.”8 Because the parties’ arguments regarding the priority claim of
`
`
`8 The Institution Decision does not add any negative limitations to the claim
`construction. Our construction of “using the [designated layer] as a mask”
`was simply “using the [designated layer] to define areas for etching.” See
`Inst. Dec. 11–15. Patent Owner refers to our discussion of what the claim
`construction encompasses as an “additional negative limitation.” For
`convenience, we mirror Patent Owner’s language in discussing Patent
`Owner’s arguments. However, as noted, we do not view the discussion
`
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`the ’696 patent (see infra Section II.D.1) turn on the application of our claim
`construction, we address Patent Owner’s arguments here for convenience.
`
`Whether the “additional negative limitation impermissibly excludes
`preferred embodiments” of the ’696 Patent (PO Resp. 10)
`Patent Owner argues:
`The additional negative limitation improperly excludes three
`preferred embodiments (i.e., the third embodiment, a modified
`version of the third embodiment, and a modified version of a fifth
`embodiment) because they each require using an overlying layer
`and an intermediate layer together as a mask, where the
`intermediate layer has an edge that is in line and flush with an
`edge of the overlying layer.
`PO Resp. 10–11 (citing Ex. 1001, 10:19–20, 16:39–48, 18:59–20:49, 24:52–
`27:60; Ex. 2009 ¶¶ 50–62).
`While we agree with Patent Owner that a construction that “exclud[es]
`a preferred embodiment . . . ‘is rarely, if ever, correct’” (PO Resp. 10 (citing
`On–Line Techs. v. Bodenseewerk Perkin–Elmer GmbH, 386 F.3d 1133,
`1138 (Fed. Cir. 2004))), we note also that every claim need not cover every
`preferred embodiment (see, e.g., Cybersettle, Inc. v. Nat’l Arbitration
`Forum, Inc., 243 F. App’x 603, 608 (Fed. Cir. 2007) (nonprecedential)
`(“Although Cybersettle’s characterization of the specification is accurate, its
`argument based on the specification is flawed. That is because our
`
`
`found at pages 15 to 19 of the Institution Decision as adding a negative
`limitation, but rather as examples of factual circumstances in which a
`particular layer is or is not used to define areas for etching. In other words,
`the discussion to which Patent Owner refers as an “additional negative
`limitation,” was merely additional guidance provided to the parties as to
`what “using the [designated layer] to define areas for etching” encompasses.
`See id. at 15–19.
`
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`interpretation of claim 1 does not exclude the discussed embodiments from
`the scope of the claimed invention, but only excludes those embodiments
`from the scope of that claim. Although claim 1 does not capture the
`discussed embodiments, other claims do.”)). Further, there is no
`requirement that every feature disclosed in the specification be recited in the
`claims. See Ventana Med. Sys., Inc. v. Biogenex Labs., Inc., 473 F.3d 1173,
`1181–82 (Fed. Cir. 2006) (“Although the preferred embodiments also
`contain a ‘direct dispensing’ feature, the inventors were not required to
`claim this feature in the ’861 patent and, indeed, did not do so.”).
`In any event, we disagree that our construction, or our application
`thereof with which Patent Owner disagrees, excludes the features of the
`embodiments identified by Patent Owner. Regarding the modified fifth
`embodiment, for example, claim 10 covers this embodiment. A chart
`comparing the modified fifth embodiment to claim 10 is provided below.9
`See Ex. 1001, 24:53–26:47.
`Claim 10
`
`Figures
`Illustrating
`Modified Fifth
`Embodiment
`
`
`Fig. 24(a)
`
`A method for forming an interconnection structure,
`comprising the steps of:
`a) forming a first insulating film [553] over lower-level
`metal interconnects [551];
`
`
`9 The bracketed numbers within the claim language identify the elements of
`the corresponding figures, as recited in the claims. They correspond to the
`identifications made in the description of the modified fifth embodiment,
`correlating the specific elements in the figures to the claim language. See,
`e.g., Ex. 1001, 24:65–66 (“a first organic film 553 (first insulating film)”).
`
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`Claim 10
`
`b) forming a second insulating film [554], having a
`different composition than that of the first insulating
`film, over the first insulating film [557];
`c) forming a third insulating film [555], having a
`different composition than that of the second insulating
`film, over the second insulating film [554];
`d) forming a fourth insulating film [556], having a
`different composition than that of the third insulating
`film, over the third insulating film [555];
`e) forming a thin film [557] over the fourth insulating
`film [556];
`f) forming a first resist pattern [558] on the thin film
`[557], the first resist pattern [558] having openings for
`forming wiring grooves;
`g) etching the thin film [557] using the first resist pattern
`[558] as a mask, thereby forming a mask pattern [559]
`out of the thin film to have the openings for formi