Trials@uspto.gov
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` Paper No. 38
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` Date: January 27, 2021
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________
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`CISCO SYSTEMS, INC.,
`Petitioner,
`
`v.
`
`TQ DELTA, LLC,
`Patent Owner.
`________________
`
`IPR2016-01466
`Patent 8,611,404 B2
`_______________
`
`
`Before KALYAN K. DESHPANDE, TREVOR M. JEFFERSON, and
`GREGG I. ANDERSON, Administrative Patent Judges.
`
`JEFFERSON, Administrative Patent Judge.
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`
`FINAL WRITTEN DECISION ON REMAND
`Determining All Remaining Challenged Claims Unpatentable
`35 U.S.C. §§ 144, 318(a)
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`571-272-7822
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` Paper No. 38
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` Date: January 27, 2021
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________
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`CISCO SYSTEMS, INC.,
`Petitioner,
`
`v.
`
`TQ DELTA, LLC,
`Patent Owner.
`________________
`
`IPR2016-01466
`Patent 8,611,404 B2
`_______________
`
`
`Before KALYAN K. DESHPANDE, TREVOR M. JEFFERSON, and
`GREGG I. ANDERSON, Administrative Patent Judges.
`
`JEFFERSON, Administrative Patent Judge.
`
`
`FINAL WRITTEN DECISION ON REMAND
`Determining All Remaining Challenged Claims Unpatentable
`35 U.S.C. §§ 144, 318(a)
`
`
`
`
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`
`
`IPR2016-01466
`Patent 8,611,404 B2
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`
`I.
`INTRODUCTION
`This case arises from the U.S. Court of Appeals for the Federal
`Circuit’s decision in Cisco Sys., Inc. v. TQ Delta, LLC, vacating our claim
`construction in the Final Written Decision (Paper 34, “Final Dec.”), which
`found that Cisco Systems, Inc. (“Petitioner”) failed to show by a
`preponderance of the evidence that claims 6, 10, 11, 15, 16, and 20 of U.S.
`Patent No. 8,611,404 B2 (Ex. 1001, “the ’404 patent”), were unpatentable,
`and remanding for consideration of Petitioner’s case under the proper
`construction. Cisco Sys., Inc. v. TQ Delta, LLC, 928 F.3d 1359, 1364 (Fed.
`Cir. 2019). This decision addresses the parties’ contentions following
`remand.
`Claims 6, 11, 16, and 20 were affirmed as unpatentable in a related
`Federal Circuit decision discussed below, so they are no longer involved in
`this proceeding. TQ Delta, LLC v. Dish Network LLC, 929 F.3d 1350, 1360–
`1362 (Fed. Cir. 2019). For the reasons discussed below, Petitioner has shown
`by a preponderance of the evidence that the remaining challenged claims
`(claims 10 and 15) are unpatentable. Patent Owner’s Motion to Exclude is
`denied.
`
`A. Procedural History
`1. Proceedings Before the Board
`Petitioner filed a Petition requesting an inter partes review of claims 6,
`10, 11, 15, 16, and 20 (“the original challenged claims”) of the ’404 patent.
`Paper 1 (“Pet.”). Patent Owner filed a Preliminary Response to the Petition.
`(Paper 6, “Prelim. Resp.”). We instituted inter partes review of claims 6, 10,
`11, 15, 16, and 20 of the ’404 patent on the following ground.
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`Original Claims
`Challenged
`6, 10, 11, 15, 16, 20
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`35 U.S.C. §
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`103
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`References/Basis
`Bowie,1 Yamano,2 ANSI
`T1.413.3
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`Paper 7, 4–5, 26 (“Inst. Dec”).
`Following institution of inter partes review, Patent Owner filed a Patent
`Owner Response (Paper 11, “PO Resp.”), to which Petitioner filed a Reply
`(Paper 14, “Pet. Reply”). Pursuant to our Order (Paper 21), Patent Owner
`filed a listing of alleged statements and evidence in connection with
`Petitioner’s Reply it deemed to be beyond the proper scope of a reply. Paper
`22. Petitioner filed a response to Patent Owner’s listing. Paper 27. We held a
`hearing on November 8, 2017, and a transcript of the hearing is included in
`the record. Paper 33 (“Tr.”).
`We issued a Final Written Decision finding that Petitioner failed to
`show by a preponderance of the evidence that the original challenged claims
`of the ’404 patent, were unpatentable. Final Dec. 13–16. Petitioner appealed
`our Final Written Decision to the United States Court of Appeals for the
`Federal Circuit. Paper 35 (Notice of Appeal).
`2. Federal Circuit Decisions and the Remand Proceeding
`The ’404 patent entitled “Multicarrier Transmission System with Low
`Power Sleep Mode and Rapid-On Capability,” relates to the field of
`
`
`1 U.S. Patent No. 5,956,323; issued Sep. 21, 1999 (Ex. 1005, “Bowie”).
`2 U.S. Patent No. 6,075,814; issued June 13, 2000 (Ex. 1006, “Yamano”).
`3 Network and Customer Installation Interfaces – Asymmetric Digital
`Subscriber Line (ADSL) Metallic Interface, AMERICAN NATIONAL
`STANDARDS INSTITUTION (ANSI) T1.413-1995 STANDARD (Ex. 1007,
`“ANSI T1.413”).
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`“multicarrier transmission systems” and “establishing a power management
`sleep state in a multicarrier system.” Ex. 1001, code (54), 1:31–33. Each
`independent claim recites a “synchronization signal,” however, that term
`appears only in the claims and is not expressly discussed in the specification.
`See Ex. 1001, 10:6–12:6. Our Final Written Decision found that
`“synchronization signal” should not be construed to encompass a
`synchronization frame because the claims separately recite a “synchronization
`frame.” Final Dec. 6–10. Based on this claim construction, we found that
`Petitioner failed to show by a preponderance of the evidence that the cited art
`teaches the “synchronization signal” as recited in the original challenged
`claims. Final Dec. 13–15. In related IPR2016-01160, we applied the same
`claim construction in concluding that claims 1-20 of the ’404 patent had not
`been shown to be unpatentable based on different unpatentability grounds.
`In a decision addressing the combined appeal of our Final Written
`Decisions in this proceeding and IPR2016-01160 proceeding (Paper 35), the
`Federal Circuit vacated our decision and remanded “to consider [Petitioner’s]
`unpatentability challenge under the proper claim construction.” Cisco Sys,
`928 F.3d 1359 at 1364. “Contrary to the [our] conclusion [in the Final
`Written Decision], [the Federal Circuit] determine[d] that the broadest
`reasonable interpretation of the disputed claim term ‘synchronization signal’
`is simply ‘used to establish or maintain a timing relationship between
`transceivers between the transmitter of the signal and the receiver of the
`signal,’ meaning synchronization signal includes frame synchronization.” Id.
`Critically, for purposes of our Remand Decision, the Federal Circuit found
`that the proper claim construction for “synchronization signal” includes
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`“frame synchronization.” Id. Our prior construction of “synchronization
`signal” excluded “frame synchronization.” Final Dec. 9–10, 15.
`In IPR2016-01470 that is related to this proceeding, a different
`Petitioner, DISH Network, LLC (“the ’1470 Petitioner”), presented related
`arguments based on a similar prior art combination—Bowie, Vanzieleghem,
`and ANSI T1.413—that differed by one reference, and argued that the
`references rendered the limitations of claims 6, 11, 16, and 20 of the ’404
`obvious.4 DISH Network LLC. v. TQ Delta, LLC, IPR2016-01470, Paper 44
`at 16–17, 37 (PTAB Feb. 7, 2018) (“’1470 Final Dec.”). The Board found
`that the ’1470 Petitioner demonstrated, by a preponderance of the evidence,
`that claims 6, 11, 16, and 20 of the ’404 patent are unpatentable over Bowie,
`Vanzieleghem, and ANSI T1.413, arguing successfully that the combined
`references taught the narrower claim construction. DISH Network, IPR2016-
`01470, Paper 44 at 37.
`In the appeal of the Final Decision in IPR2016-01470, the Federal
`Circuit affirmed our Final Written Decision that claims 6, 11, 16, and 20 of
`the ’404 patent are unpatentable as obvious over a combination of prior art—
`Bowie, Vanzieleghem, and ANSI T1.413—that is closely related to the art
`Bowie and ANSI T1.413 combination asserted in IPR2016-01466. See TQ
`Delta, LLC v. Dish Network LLC, 929 F.3d 1350, 1360–1362 (Fed. Cir. 2019)
`(rejecting Patent Owner’s arguments and finding them unpersuasive).
`Critical for our present case, is that the affirmance of the unpatentability
`of claims 6, 11, 16, and 20 of the ’404 patent in IPR2016-01470 mooted
`
`4 Claims 6, 11, and 16 are independent, claim 20 depends from claim 16. See
`Ex. 1001, 10:6–12:6
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`Petitioner’s appeal of the adjudicated claims in the present case, leaving the
`remaining claims challenged in IPR2016-01466 as dependent claims 10 and
`15 of the ’404 patent. See Cisco Sys., Inc. v. TQ Delta, LLC, 928 F.3d at
`1361(stating that “[b]ecause we have already determined that claims 6, 11, 16,
`and 20 of the ’404 patent would have been obvious, [see TQ Delta, 929 F.3d
`at 1360–62], the issue of patentability of these claims is mooted”).
`Based on the forgoing, the claims at issue in this Remand Proceeding,
`are claims 10 and 15 of the ’404 patent (“the Remaining Challenged Claims”).
`Furthermore, we are guided by our Final Written Decision in IPR2016-01470,
`which presents similar arguments for the challenges to the Remaining
`Challenged Claims of the ’404 patent based on Bowie, Vanzieleghem, and
`ANSI T1.413. See DISH Network, IPR2016-01470, Paper 44 at 11–34
`(PTAB. Feb. 7, 2018) (addressing Patent Owner arguments regarding cited
`prior art); PO Resp. 22–64 (Patent Owner arguments regarding cited prior art).
`Following the remand, the parties jointly stipulated that “no additional
`briefing or argument is necessary for this matter, and that the decision on
`remand should be rendered on the existing record.” Paper 37, 1.
`
`B. Related Matters
`The parties indicate that the ’404 patent is the subject of several district
`court cases. Pet. 1; Paper 3, 2–3. The ’404 patent is also involved in
`IPR2016-01160 and IPR2016-01470.
`
`C. The ʼ404 Patent
`The ’404 patent discloses a “method and apparatus for establishing a
`power management sleep state in a multicarrier system.” Ex. 1001, 1:31‒33.
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`The ’404 patent discloses an asynchronous digital subscriber loop (ADSL)
`system having a first transceiver located at the site of a customer’s premises
`(“CPE transceiver”) and a second transceiver located at the local central
`telephone office (“CO transceiver”). Id. at 3:62‒67. The transceivers include
`a transmitter section for transmitting data over a digital subscriber line and a
`receiver section for receiving data from the line. Id. at 4:14‒17. The
`transceivers further include a clock, controller, frame counter, and a state
`memory. Id. at 4:58‒5:15. Typically, data is communicated in the form of a
`sequence of data frames, sixty-eight frames for ADSL, followed by a
`synchronization frame. Id. The sixty-nine frames comprise a “superframe.”
`Id.
`
`The power down operation of the CPE transceiver begins on receipt of
`a power-down indication. Id. at 6:27‒30. The CPE transceiver responds to
`the power down indication by transmitting to the CO transceiver an “Intend to
`Enter Sleep Mode” notification. Id. at 6:39‒42. The CO transceiver responds
`by transmitting an “Acknowledge Sleep Mode” notification to the CPE
`transceiver, and the CPE transceiver transmits an “Entering Sleep Mode”
`notification to the CO transceiver. Id. at 6:52‒65. The CO transceiver detects
`the notification and transmits its own “Entering Sleep Mode” notification. Id.
`at 6:65‒67. The CO transceiver stores its state in its own state memory
`corresponding to the state memory of the CPE transceiver. Id. at 6:67‒7:2.
`“The CO transceiver continues to advance the frame count and the superframe
`count during the period of power-down in order to ensure synchrony with the
`remote CPE transceiver when communications are resumed.” Id. at 7:9‒12.
`The CO transceiver further continues to monitor the subscriber line for an
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`“Exiting Sleep Mode” notification, and the CPE transceiver transmits this
`signal when it receives an “Awaken” indication. Id. at 7:57‒64. In response
`to the “Awaken” signal, the CPE transceiver retrieves its stored state from
`state memory and restores full power to its circuitry. Id. at 7:64‒66. The CO
`Transmitter detects “Exit Sleep Mode” notification and restores its state and
`power. Id. at 8:1‒4.
`
`
`D. Illustrative Claim
`Petitioner originally challenges claims 6, 10, 11, 15, 16, 20 of the ’404
`patent (Pet. 29–58). Claims 6 and 11 are independent claims, and claims 10
`and 15 depend therefrom. We identify claims 6 and 10 as illustrative of the
`Remaining Challenged Claims (claims 10 and 15) at issue.5 Claims 6 and 10
`are reproduced below:
`6.
`An apparatus comprising a transceiver operable to:
`receive, in a full power mode, a plurality of superframes,
`wherein the superframe comprises a plurality of data frames
`followed by a synchronization frame;
`receive, in the full power mode, a synchronization
`signal; transmit a message to enter into a low power mode;
`store, in a low power mode, at least one parameter
`associated with the full power mode operation wherein the
`
`5 The Parties do not challenge our selection of independent claim 6, and do
`not separately address the patentability of the Remaining Challenged Claims.
`See generally PO Resp.; see also TQ Delta, 929 F.3d at 1353; Cisco Sys., 928
`F.3d at 1361 n.1. Although no longer a part of this proceeding as an
`independent claim, claim 6 was identified as illustrative in the Final Decision
`and claim 10 depends from independent claim 6. See Final Dec. 4–5. As
`noted, the Parties’ respective arguments are directed only to claim 6. We
`determine that claim 6 is illustrative of the Remaining Challenged Claims for
`purposes of this Final Written Decision.
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`at least one parameter comprises at least one of a fine gain
`parameter and a bit allocation parameter;
`receive, in the low power mode, a synchronization
`signal; and
`exit from the low power and restore the full power
`mode by using the at least one parameter and without
`needing to reinitialize the transceiver.
`10. The apparatus of claim 6, wherein the apparatus is a
`customer premises equipment that is capable of transmitting
`internet and video data.
`Ex. 1001, 10:29–43; 10:51–53.
`
`II. ANALYSIS
`A. Claim Interpretation
`We interpret claims of an unexpired patent using the broadest
`reasonable construction in light of the specification of the patent in which they
`appear. See 37 C.F.R. § 42.100(b) (2016); see Cuozzo Speed Techs., LLC v.
`Lee, 136 S. Ct. 2131, 2142–46 (2016).6
`Applying that standard and the Federal Circuit claim constructions
`applicable to ’404 patent, we construe the terms as follows in accordance with
`the Federal Circuit decisions in Cisco Sys., 928 F.3d at 1364 (Fed. Cir. 2019)
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`6 Patent claims challenged in district court are construed according to the
`standard enunciated in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005)
`(en banc). A rule change that makes applicable the Phillips standard in all trial
`proceedings before the Board does not apply here, because the Petition was
`filed before November 13, 2018. See Changes to the Claim Construction
`Standard for Interpreting Claims in Trial Proceedings Before the Patent Trial
`and Appeal Board, 83 Fed. Reg. 51,340 (Oct. 11, 2018) (amending 37 C.F.R.
`§ 42.100(b), effective November 13, 2018) (now codified at 37 C.F.R.
`§ 42.100(b) (2019)).
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`(construing “synchronization signal”) and our Final Written Decisions in
`IPR2016-01466 (Final Dec. 5–6 (store/storing, in a/the low power mode), 10
`(parameter associated with the full power mode)) and IPR2016-01470 (’1470
`Final Dec. 5–10 (construing ’404 patent terms). See also TQ Delta, 929 F.3d
`at 1356–1358. In our prior Decisions, we construed “store/storing in a/the low
`power mode” to mean “maintaining in memory while in a reduced power
`consumption mode.” Final Dec. 5–6. We also determined that no express
`construction of “parameter associated with the full power mode operation”
`was necessary in order to resolve the parties’ dispute. Id. at 10.
`As stated above, the Federal Circuit determined “that the broadest
`reasonable interpretation of the . . . claim term ‘synchronization signal’ is
`simply ‘used to establish or maintain a timing relationship between
`transceivers between the transmitter of the signal and the receiver of the
`signal,’ meaning synchronization signal includes frame synchronization.”
`Cisco Sys., 928 F.3d at 1364 (emphasis added). We apply this proper
`construction below.
`B. Level of Ordinary Skill in the Art
`Petitioner contends that a hypothetical person of ordinary skill in the
`art, with respect to and at the time of the’404 patent, “would have (i) a
`Master’s degree in Electrical and/or Computer Engineering, or equivalent
`training, and (ii) approximately five years of experience working in digital
`telecommunications.” Pet. 13.
`Patent Owner contends that such a person would have had “a bachelor’s
`degree in electrical engineering (or a similar technical degree or equivalent
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`work experience) and at least 3 years of experience working with such
`multicarrier communication systems.” PO Resp. 17.
`We determine that no express finding on a specific corresponding level
`of technical education and experience is necessary as our conclusion would be
`the same under either party’s definition. Here, the level of ordinary skill in the
`art is reflected by the prior art of record. See Okajima v. Bourdeau, 261 F.3d
`1350, 1355 (Fed. Cir. 2001); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir.
`1995); In re Oelrich, 579 F.2d 86, 91 (CCPA 1978).
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`C. The Parties’ Post-Institution Arguments
`With the complete record before us and in light of the Federal Circuit’s
`claim construction of the “synchronization limitation,” we have reviewed
`Petitioner’s arguments and evidence in support its unpatentability contentions
`for limitations that Patent Owner chose not to address in its Patent Owner
`Response. We determine that the record contains persuasive, unrebutted
`arguments and evidence presented by Petitioner (Pet. 13–62; Reply 8–27);
`regarding the manner in which the asserted prior art teaches the uncontested
`limitations of the claims against which that prior art is asserted.7 Based on the
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`7 Our Order instructed Patent Owner that “any arguments for patentability not
`raised in the [Patent Owner Response] will be deemed waived.” Paper 8, 5–6;
`see also 37 C.F.R. § 42.23(a) (“Any material fact not specifically denied may
`be considered admitted.”); In re Nuvasive, Inc., 842 F.3d 1376, 1379–1382
`(Fed. Cir. 2016) (holding Patent Owner waived an argument addressed in
`Preliminary Response by not raising the same argument in the Patent Owner
`Response); see also Office Patent Trial Practice Guide, 77 Fed. Reg. 48,756,
`48,766 (Aug. 14, 2012).
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`totality of the evidence before us, we conclude that the prior art identified by
`Petitioner teaches or suggests all uncontested limitations of the reviewed
`claims by a preponderance of the evidence. The limitations that Patent Owner
`contests in the Patent Owner Response are addressed below.
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`D. Obviousness over Bowie, Yamano, and ANSI T1.
`Petitioner contends that the original challenged claims of the ’404
`patent are unpatentable under 35 U.S.C. § 103(a) as obvious over Bowie,
`Yamano, and ANSI T1.413. Pet. 13–61.
`1. Principles of Law
`A claim is unpatentable under § 103(a) if the differences between the
`claimed subject matter and the prior art are such that the subject matter, as a
`whole, “would have been obvious at the time the invention was made to a
`person having ordinary skill in the art to which said subject matter pertains.”
`KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007). The question of
`obviousness is resolved on the basis of underlying factual determinations,
`including (1) the scope and content of the prior art; (2) any differences
`between the claimed subject matter and the prior art; (3) the level of skill in
`the art; and (4) when in evidence, objective indicia of non-obviousness (i.e.,
`secondary considerations). Graham v. John Deere Co., 383 U.S. 1, 17–18
`(1966). We analyze this asserted ground based on obviousness with the
`principles identified above in mind.
`2. Bowie (Ex. 1005)
`Bowie discloses a “power conservation system for transmission systems
`in which data is modulated over a communications loop from a central office
`location to a customer premise.” Ex. 1005, 1:4‒8. Bowie discloses that to
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`provision ADSL service, ADSL units are located at each end of a wire loop, a
`first ADSL unit at the customer premises (CPE) and a second ADSL unit at
`the telephone company central office (COT). Id. at 3:51‒58.
`ADSL units enter a low power mode to reduce power requirements. Id.
`at 5:6‒8. CPE unit initiates low power mode by sending a “shut-down” signal
`to the COT unit. Id. at 5:8‒10. Both the CPE unit and COT unit may store
`loop characteristics that enable rapid resumption of user data transmission
`when units return to full power mode. Id. at 5:18‒25. Each unit then enters
`low power mode by shutting off the now unnecessary sections of the signal
`processing, transmitting, and receiving circuitry, including “signal processing
`111, transmitting 112, and receiving 113 circuitry. Id. at 5:26‒28. After
`shutdown, the loop is in an inactive state. Id. at 5:28‒29. During low power
`operation, circuitry 115 remains capable of detecting the resume signal. Id. at
`5:28–29. “This resume signal may be detected by the COT unit using a 16
`kHz AC signal detector 115 that employs conventional frequency detection
`techniques” and remains operative when the COT unit is in low-power mode.
`Id. at 5:52–56. The units return to full power mode after the CPE unit
`transmits to the COT unit a resume signal. Id. at 5:48‒59. The stored loop
`characteristics are used to restore the loop parameters. Id. at 5:60‒66.
`3. Yamano (Ex. 1006)
`Yamano discloses a method for the reduction of the required amount of
`signal processing in a modulator and demodulator transferring packet based
`data. Ex. 1006, 1:9‒13. Yamano discloses an embodiment where a
`transmitter circuit transmits a predetermined non-idle state signal to indicate
`that packet data is about to be transmitted prior to the transmission of packet
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`data. Id. at 13:56‒59. If the non-idle state signal is not transmitted, the
`transmitter does not transmit any signals on the communication channel, and,
`therefore, the transmitter does not transmit any idle information. Id. at 13:59‒
`63. Upon detection of the predetermined non-idle state signal, the receiver
`enters full processing mode and performs full demodulation of the incoming
`signal. Id. at 14:25‒29. After the packet data has been received, the receiver
`detects the absence of the predetermined non-idle state signal and the receiver
`enters a reduced processing mode by disabling several components of the
`receiver. Id. at 14:29‒42.
`4. ANSI T1.413 (Ex. 1007)
`ANSI T1.413 discloses electrical characteristics of Asymmetric Digital
`Subscriber Line (ADSL) signals appearing at a network interface. Ex. 1007,
`Abstract. ADSL allows for the provision of Plain Old Telephone Service
`(POTS) and a variety of digital channels. Id. at 17. Digital channels consist
`of full duplex low-speed channels and simplex high-speed channels in the
`direction from the network to the customer premises, and low-speed channels
`in the opposite direction. Id.
`5. Petitioner’s Contentions
`We are persuaded that the record establishes Petitioner’s contentions for
`the unpatentability of the Remaining Challenged Claims. Pet. 13–62. We
`find the underlying evidence credible and persuasive. Thus, we adopt
`Petitioner’s contentions discussed below as our own.
`Claim 6 recites “[a]n apparatus comprising a transceiver.” Petitioner
`argues that Bowie discloses this limitation. Petitioner argues that Bowie
`discloses a modulated data transmitting and receiving unit, and circuitry to
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`transmit and receive modulated data signal that includes Asymmetric Digital
`Subscriber Line (ADSL) circuitry. Pet. 29‒31 (citing Ex. 1005, 2:30‒37,
`2:41‒43, 3:33‒41, 3:51‒58, Fig. 1; Ex. 1003, 40‒41).
`Claim 6 further recites “receive, in a full power mode, a plurality of
`superframes, wherein the superframe comprises a plurality of data frames
`followed by a synchronization frame.” Petitioner argues that the combination
`of Bowie and ANSI T1.413 discloses this limitation. Petitioner argues that
`Bowie discloses single processing, transmitting, and receiving circuitry “can
`be placed in a low power state when inactive, and then re-energized to resume
`full power operation as needed.” Pet. 31 (quoting Ex. 1005, 3:2‒5) (emphasis
`omitted). Petitioner specifically argues that Bowie discloses that “[i]n the full
`power state, Bowie’s ADSL unit receives . . . modulated data signals in high
`frequency ranges” that require substantial amounts of power. Id. at 31‒32
`(citing Ex. 1003, 41‒42; Ex. 1005, 2:1‒4). Petitioner further argues that
`Bowie discloses that “[d]ata to be transmitted by an ADSL unit is arranged in
`a structure known as a ‘frame’ prior to be transmitted.” Id. at 32 (quoting Ex.
`1005, 3:66‒67). Petitioner argues that ANSI T1.413 discloses that data
`streams are organized into superframes and “[e]ach superframe is composed
`of 68 ADSL data frames, numbered from 0 [‒] 67, which shall be encoded and
`modulated into DMT symbols, followed by a synchronization symbol.” Id. at
`32‒33 (quoting Ex. 1007, 42) (emphasis omitted). Petitioner argues that a
`person with ordinary skill in the art would have combined Bowie’s frames
`with ANSI T1.413’s organization of frames into superframes including a
`synchronization symbol because ANSI T1.413 discloses the ADSL
`communication standard that Bowie implements, thereby allowing Bowie’s
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`ADSL units to interoperate with ADSL models of other manufacturers. Id. at
`34 (citing Ex. 1003, 46).
`Claim 6 also recites “receiv[ing], in the full power mode, a
`synchronization signal.” Petitioner argues that the combination of Bowie and
`ANSI T1.413 discloses this limitation. Petitioner argues that, as discussed
`above, Bowie discloses ADSL units that transmit and receive data in frames in
`full-power mode and ANSI T1.413 discloses “that a synchronization symbol
`is included in the frames transmitted and received by ADSL units.” Id. at 34‒
`35 (citing Ex. 1003, 46‒47; Ex. 1007, 42, 64, Fig. 5). Petitioner explains that
`ANSI T1.413 uses a synchronization symbol in order to maintain timing by
`correcting timing errors in communication between DSL transceivers. Id.
`(citing Ex. 1007, 64). Petitioner argues that a person with ordinary skill in the
`art would have combined Bowie’s frames with ANSI T1.413’s superframes,
`which include a synchronization symbol, in order to correct timing errors. Id.
`at 36 (citing Ex. 1003, 48‒49).
`Claim 6 additionally recites “transmit[ting] a message to enter into a
`low power mode.” Petitioner argues that Bowie discloses this limitation.
`Specifically, Petitioner argues that Bowie discloses that the ADSL unit
`initiates the low-power state by sending a shutdown signal, and a person with
`ordinary skill in the art would have understood that such a signal includes
`data, thereby making it a message. Pet. 36‒38 (citing Ex. 1005, 5:6‒13; Ex.
`1003, 51). As such, a person with ordinary skill in the art would have
`understood Bowie to disclose transmitting a message to enter a low power
`mode. Id.
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`Claim 6 also recites “stor[ing], in a low power mode, at least one
`parameter associated with the full power mode operation.” Petitioner argues
`that Bowie discloses this limitation. Petitioner argues that Bowie discloses
`that the COT and CPE units store “loop characteristic parameters” upon
`receipt of a shutdown signal. Pet. 38‒39 (citing Ex. 1005, 5:17‒27; Ex. 1003,
`51). Petitioner further argues that Bowie discloses that the storing of loop
`characteristic parameters “enables rapid resumption of data transmission when
`the units are returned to full power mode.” Id. (quoting Ex. 1005, 17‒27;
`citing Ex. 1005, 60‒66).
`Claim 6 additionally recites “wherein the at least one parameter
`comprises at least one of a fine gain parameter and a bit allocation parameter.”
`Petitioner argues that the combination of Bowie and ANSI T1.413 discloses
`this limitation. Petitioner argues that, as discussed above, Bowie discloses
`storing loop characteristic parameters before entering a low power mode.
`Pet. 39 (citing Ex. 1003, 53). Petitioner further argues that ANSI T1.413
`discloses that “fine gain (e.g., power level for each subcarrier) and bit
`allocation (e.g., number of bits for each sub-carrier) are parameters of the
`communication loop that are determined upon initialization.” Id. at 40 (citing
`Ex. 1003, 53). Petitioner asserts that ANSI T1.413 discloses that “each
`receiver communicates to its far-end transmitter the number of bits and
`relative power levels to be used on each DMT sub[]carrier, as well as any
`messages and final data rate information.” Id. (quoting Ex. 1007, 103;8 citing
`
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`8 Petitioner cites to page 105. See Pet. 40. However, Petitioner quotes a
`passage from page 103. See id. We understand this to be a typographical
`error.
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`Ex. 1003, 54) (emphasis omitted). Petitioner further argues that a person with
`ordinary skill in the art “would understand that the relative power levels per
`DMT subcarrier are fine gain parameters and the number of bits to be used on
`each DMT sub-carrier are bit allocation parameters,” and “these parameters
`are determined in order to initialize the DSL communication loop.” Id. (citing
`Ex. 1003, 54). Petitioner concludes that a person with ordinary skill in the art
`would have found it obvious to include these parameters in Bowie’s “loop
`characteristics” in order to “allow the DSL unit to more quickly retrain the
`units when returned to full power mode rather than having to reinitialize the
`units.” Id. (citing Ex. 1003, 54).
`Claims 6 further recites “receive, in the low power mode, a
`synchronization signal.” Petitioner argues that the combination of Bowie and
`Yamano discloses this limitation. Petitioner argues that Yamano discloses a
`low-power mode, where a receiving circuit of a modem operates in either a
`full-power mode or standby mode depending on whether data is being
`received. Pet. 41 (citing Ex. 1006, 14:25‒33; Ex. 1003, 54). In particular,
`Petitioner argues that Yamano discloses that the receiving circuit reduces
`power by disabling components when a “RECEIVE” signal is not transmitted.
`Id. (citing Ex. 1006, 14:25‒33, 14:40‒42, 15:54‒55). Petitioner argues that
`Yamano further discloses that the receive unit receives “an easily detected
`signal, such as a pure tone” that “can be used to signal the presence of packet
`data,” and upon received of such a signal the receiver enters full processing
`mode. Id. at 42 (quoting Ex. 1006, 14:20‒24; citing Ex. 1006, 14:25‒29).
`Petitioner argues that Yamano discloses this signal periodically in order to
`maintain synchronization of the time intervals between the receiver and
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`transmitter units. Id. (citing Ex. 1006, 15:26–32). Petitioner asserts that a
`person with ordinary skill in the art would have understood a periodic or
`timing signal used to maintain synchronization between the receiver and
`transmitter units is a synchronization signal. Id. at 42‒43 (citing Ex. 1003,
`56‒57). Petitioner concludes that a person with ordinary skill in the art would
`have combined these elements of Yamano with Bowie in order to achieve
`more efficient power usage. Id. at 43 (citing Ex. 1003, 57).
`Claim 6 also recites “exit from the low power and restore the full power
`mode by using the at least one parameter and without needing to reinitialize
`the transceiver.” Petitioner argues that Bowie discloses this limitation.
`Petitioner argues that Bowie discloses that “[u]pon receipt of the resume
`signal, the receiving ADSL unit returns the signal processing, transmitting,
`and receiving circuitry to full power mode.” Pet. 43 (quoting Ex. 1005, 5:60‒
`62) (reference numerals omitted). Petitioner argues that
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