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` Paper 80
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` Entered: July 31, 2018
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`Trials@uspto.gov
`571-272-7822
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`INTEL CORPORATION,
`Petitioner,
`v.
`R2 SEMICONDUCTOR, INC.,
`Patent Owner.
`____________
`
`Case IPR2017-00707
`Case IPR2017-00708
`Case IPR2017-01124
`Patent 8,233,250 B2
`
`
`
`
`
`
`
`
`
`Before JAMESON LEE, JEAN R. HOMERE, and JENNIFER S. BISK,
`Administrative Patent Judges.
`
`HOMERE, Administrative Patent Judge.
`
`
`
`
`
`FINAL WRITTEN DECISION
`Inter Partes Review
`35 U.S.C. § 318(a) and 37 C.F.R. § 42.73
`
`
`

`

`Case IPR2017-00707
`Case IPR2017-00708
`Case IPR2017-01124
`Patent 8,233,250 B2
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`
`INTRODUCTION
`I.
`Intel Corporation (“Petitioner”) filed three petitions requesting inter
`partes review of U.S. Patent No. 8,233,250 B2 (Ex. 1201, “the ’250
`patent”). IPR2017-00707, Paper 4 (“Pet.”); IPR2017-00708, Paper 4 (“’708
`Pet.”); IPR2017-01124, Paper 4 (“’1124 Pet.”). In each case we instituted a
`trial on all challenged claims resulting in review of all claims, 1–31, of the
`’250 patent.1 IPR2017-00707, Paper 10 (“’Inst. Dec.”); IPR2017-00708,
`Paper 10 (“’708 Inst. Dec.”); IPR2017-01124, Paper 10 (“’1124 Inst. Dec.”).
`Patent Owner filed a Patent Owner Response in each case. IPR2017-
`00707, Paper 34 (“PO Resp.”); IPR2017-00708, Paper 34 (“’708 PO
`Resp.”); IPR2017-01124, Paper 34 (“’1124 PO Resp.”). Similarly,
`Petitioner filed a Reply in each case. IPR2017-00707, Paper 60 (“Reply”);
`IPR2017-00708, Paper 58 (“’708 Reply”); IPR2017-01124, Paper 58
`(“’1124 Reply”).2
`
`
`1 Claims 1–4, 7–9, 13–17, 20–22, and 29 were reviewed in IPR2017-00707,
`claims 10–12, 23–26, 28, and 31 were reviewed in IPR2017-00708, and
`claims 5, 6, 18, 19, 27, and 30 were reviewed in IPR2017-01124.
`2 Both parties also filed in each case a Motion to Exclude Evidence, each of
`which was fully briefed. IPR2017-00707, Papers 67, 69, 72, 74; IPR2017-
`00708, Papers 66, 68, 71, 73; IPR2017-01124, Papers 66, 68, 71, 73.
`Subsequently, the parties withdrew each of these motions. IPR2017-00707,
`Paper 78; IPR2017-00708, Paper 77; IPR2017-01124, Paper 78.
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`Patent 8,233,250 B2
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`
`In each case, Patent Owner filed a Contingent Motion to Amend, each
`of which was fully briefed.3 IPR2017-00707, Papers 30, 48, 57, 69;
`IPR2017-00708, Papers 30, 46, 55, 61, 71; IPR2017-01124, Papers 30, 46,
`55, 64.
`A transcript of the consolidated oral hearing held on May 1, 2018, has
`been entered into the record as Paper 794 (“Tr.”).
`Because of the substantial overlap in substance, we exercise our
`discretion and consolidate pursuant to 35 U.S.C. § 315(d), for purposes of
`this Final Written Decision only, the three proceedings.5 For the reasons
`that follow, Petitioner has demonstrated by a preponderance of the evidence
`that claims 1–31 of the ’250 patent are unpatentable.
`
`A. Related Matters
`The parties indicate that the ’250 patent is involved in R2
`Semiconductor, Inc. v. Intel Corp. et al., Civil Action No. 2:16-cv-01011
`
`3 Upon authorization, Patent Owner filed a corrected motion to amend in
`IPR2017-00708 and Petitioner filed a surreply in all three cases.
`4 For purposes of this Decision, unless otherwise indicated, a citation to
`“Paper XX” or “Ex. XXXX” will refer to documents filed in IPR2017-
`00707. Similarly, “’708 Paper XX” or “’708 Ex. XXXX” will refer to
`documents filed in IPR2017-00708 and “’1124 Paper XX” or “’1124 Ex.
`XXXX” will refer to documents filed in IPR2017-01124. Moreover, for
`efficiency and clarity, unless there is a relevant difference between the cases,
`we will cite only to documents in IPR2017-00707.
`5 Should the parties decide to file a rehearing request in response this
`Decision, they are likewise authorize to file a consolidated request.
`
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`(E.D. Tex.) and Certain Integrated Circuits with Voltage Regulators and
`Products Containing Same, Investigation No. 337-TA-1024 (USITC). Pet.
`3; Paper 7, 1–2. Petitioner has also challenged the ’250 patent in 3
`additional petitions (IPR2017-00705, -00706, and -01123). Pet. 3; Paper 7,
`1–2.
`
`B. The ’250 Patent
`The ’250 patent, titled “Over Voltage Protection of Switching
`Converter,” issued July 31, 2012, from U.S. Patent Application
`No. 12/646,451. Ex. 1201 at [54], [45], [21]. The ’250 patent generally
`relates to a switched voltage regulator containing regulator circuitry coupled
`to a voltage spike protection circuitry including a dissipative element and a
`charge storage circuit such that the spike protection circuitry is able to
`protect the regulator circuitry against voltage spikes. Id. at Abstract. A
`conventional switched voltage regulator, as described in the ’250 patent, is
`shown in Figure 2 below:
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`Figure 2 depicts a conventional switched mode regulator having transistor
`Qseries and transistor Qshunt connected at common switching node Vsw.
`As shown in Figure 2 above, the ’250 patent explains that the
`transistors are alternately turned on and off such that current Iout flows from
`source terminal Vin, through operating transistor Qseries/Qshunt, and through
`inductor Lout to charge up capacitor Cout. Id. at 2:2–36.6 According to the
`’250 patent, the intermittent switching of the transistors causes rapid
`switching in the capacitive load and “voltage spikes will occur in any
`converter that has fast switching transitions” caused by physical inductances
`present in any realistic packaged device, including the parasitic inductance
`of the various components of the circuit. Id. at 15:42–65, 16:31–37. In
`addition, according to the Specification, “most switched mode regulators
`require large valued (and physically large and thick) external inductors and
`capacitors to operate.” Id. at 1:62–64.
`
`
`6 The ’250 patent explains that “[w]hen the series switch 301 is rapidly
`turned off, this parasitic inductor tries to maintain the same output current,
`causing the voltage Vhi to increase rapidly in the absence of any preventive
`measures . . . the parasitic inductance may interact with parasitic
`capacitances to form a high-frequency resonant circuit, which will create a
`persistent ringing condition as a result of the initial rapid voltage transition.”
`Ex. 1201, 16:5–13.
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`
`The ’250 patent describes “a need for a DC-DC converter that is
`simultaneously compact (including optimally fabrication of all active and
`passive components on a single semiconductor die), low in cost, and highly
`efficient even at small ratios of output to supply voltage and low output
`current.” Id. at 6:66–7:3. In addition, according to the ’250 patent, “it is
`desirable to provide spike protection circuitry for the . . . elements of any
`DC-DC converter employing fast switching transitions.” Id. at 16:43–46.
`To this end, the ’250 patent describes coupling spike protection
`circuitry to the regulator circuitry (e.g. DC to DC converter) such that the
`spike protection circuit protects “switching elements of a converter from
`transient voltages to allow fast low-loss switching operations without
`degradation of reliability.” Id. at 6:66–67, 7:4–7. The voltage regulator
`with the protection circuit, is shown in Figure 19 below:
`
`
`Figure 19 shows a voltage regulator including a spike protection circuitry.
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`
`As depicted in Figure 19, the ’250 patent describes a
`regulator/switching circuitry wired to generate a regulated voltage from
`power supply Vhi to power supply Vloc, both connected to common node Vsw.
`Id. at 7: 11–13. In addition, spike protection circuitry 1910 including
`resistor Rsp and capacitor Csp is coupled to the regulator circuitry as a way
`to absorb voltage spikes and ringing caused by parasitic inductances Lint,
`Lpar, pk and Lpar, bd. Id. at 18:10–12.7 Thus, according to the Specification,
`the optimal resistance value typically matches closely the characteristic
`impedance of a lumped-element approximation to a transmission line
`containing a charge-storage circuit and a parasitic inductance associated the
`regulator circuit. Id. at 17:53–67. The ’250 patent states that dissipative
`element Rsp can be realized as polysilicon transistors, thin film metallic
`resistors, or any other convenient resistive element. Id. at 18:59–61.
`
`C. Illustrative Claim
`Of the challenged claims, claims 1, 13, 26, 27, 28, 29, 30, and 31 are
`independent. Claim 1 is illustrative and is reproduced below with disputed
`limitations emphasized:
`
`
`7 According to the ’250 patent, “[t]he ringing might also cause a loss in
`efficiency if the ringing is poorly timed with the opening or closing of one of
`the switches. It is[,] therefore, important to incorporate a dissipative element
`in the spike protection impedance, represented schematically by Rsp to
`minimize undesired ringing in the spike protection circuit.” Ex. 1201,
`17:24–29.
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`Case IPR2017-01124
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`
`1. A voltage regulator, comprising:
`regulator circuitry generating a regulated voltage from a first
`power supply and a second power supply;
`voltage_spike protection circuitry for voltage-spike-protecting
`the regulator circuitry, comprising a dissipative element
`and a charge-storage circuit; wherein
`a value of resistance of the dissipative element is based on a
`characteristic
`impedance
`of
`a
`lumped-element
`approximation of a transmission line, wherein the
`transmission line comprises the charge-storage circuit and
`a parasitic inductance associated with the regulator
`circuitry.
`Ex. 1201, 20:31–42.
`D. Asserted Grounds of Unpatentability
`Petitioner asserts that (1) claims 1–4, 7–9, 13–17, 20–22, and 29 are
`unpatentable under § 103(a)8 over the combination of Shekhawat9 and
`McMurray,10 (2) claims 10–12, and 23–26 are unpatentable over the
`
`
`8 Because the claims at issue have a filing date prior to March 16, 2013, the
`effective date of the Leahy-Smith America Invents Act, Pub. L. No. 112-29,
`125 Stat. 284 (2011) (“AIA”), we apply the pre-AIA version of 35 U.S.C.
`§§ 102, 103, and 112 in this Decision.
`9 U.S. Patent No. 7,834,597 B1 (“Shekhawat”). IPR2017-00707, Ex. 1206.
`10 McMurray, “Optimum Snubbers for Power Semiconductors,” IEEE
`Transactions on Industry Applications 593, Vol. IA-8, No. 5 (Sept./Oct.
`1972) (“McMurray”). Ex. 1203.
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`combination of Shekhawat, McMurray, and Ozawa11, (3) claims 28 and 31
`are unpatentable over the combination of Shekhawat and Ozawa, and (4)
`claims 5, 6, 18, 19, 27, and 30 are unpatentable over the combination of
`Shekhawat, McMurray, and Wong .12 Pet. 27–72; ’708 Pet. 28–73; ’1124
`Pet. 35–75.
`
`II. DISCUSSION
`Claim Construction
`A.
`In an inter partes review, a claim in an unexpired patent shall be given
`its broadest reasonable construction in light of the specification of the patent
`in which it appears. 37 C.F.R. § 42.100(b). Under the broadest reasonable
`construction standard, claim terms are given their ordinary and customary
`meaning, as would be understood by one of ordinary skill in the art in the
`context of the entire disclosure. In re Translogic Tech., Inc., 504 F.3d 1249,
`1257 (Fed. Cir. 2007). Only terms that are in controversy need to be
`construed, and then only to the extent necessary to resolve the controversy.
`Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir.
`1999).
`
`
`
`
`
`11 JP. Patent Application No. H10-42573 (“Ozawa”). IPR2017-00708. Ex.
`1329.
`12 U.S. Patent No. 5,485,292 (“Wong”) (issued Jan. 16, 1996). IPR2017-
`01124, Ex. 1530.
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`
`“dissipative element”
`1.
`During the pre-institution stage of these proceedings, the parties
`disagreed regarding the broadest reasonable interpretation of the term
`“dissipative element.” Pet. 21–27; Prelim. Resp. 21–32. For purposes of the
`Institution Decision, we agreed with Petitioner and found the term
`“dissipative element” to be written in means-plus-function format with a
`function of dissipating energy13 and a corresponding structure of a resistor.
`Inst. Dec. 8–12. For purposes of analyzing patentability of the challenged
`claims, Patent Owner does not challenge this construction. PO Resp. 16.
`We, therefore, persuaded by the analysis and construction of the term
`“dissipative element” from the Institution Decision. Inst. Dec. 8–12.
`
`“voltage spike protection circuitry”
`2.
`Patent Owner asserts that the terms “voltage spike protection circuitry
`for voltage-spike protecting the regulator circuitry”14 and “voltage-spike-
`protecting the regulator circuitry with voltage spike protection circuitry”15
`
`
`13 Both Petitioner and Patent Owner agree that, if construed as requiring
`means-plus-function treatment, the function of “dissipative element” would
`be to dissipate energy. Pet. 22, Prelim. Resp. 22.
`14 As recited by independent claims 1 and 27. Ex. 1201, 20:34–35, 22:31–
`32. Claim 29, similarly recites “voltage spike protection circuitry . . . for
`voltage-spike-protecting the regulatory circuitry.” Id. at 22:63–65.
`15 As recited by independent claims 13, 26, and 30. Ex. 1201, 21:19–20,
`22:17–19, 23:11–12.
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`“do not have a plain and ordinary meaning.” PO Resp. 17–18; Tr. 33:14–
`39:23. Accordingly, Patent Owner proposes that to properly capture the
`scope of the claims as reflected in the Specification, these terms should be
`construed “to require that the voltage-spike protecting circuitry is on the
`same integrated circuit as the switches they protect.” PO Resp. 17 n.6.
`Arguing that Patent Owner’s narrower construction would
`“improperly limit the claims to certain embodiments,” Petitioner notes that
`the claims explicitly define “voltage spike protection circuitry” simply as
`“circuitry that protects the regulator circuitry from [voltage] spikes.” Reply
`3 (citing Ex. 1201, claims 1, 13, 26, 28, 29, and 31). Petitioner adds that
`none of the claims includes language requiring that voltage spike protection
`circuitry to be “located on the same integrated circuit” as the regulator
`circuitry. Id. Petitioner, therefore, asserts that the broadest reasonable
`construction of the term “voltage spike protection circuitry” is coextensive
`with the definition in the claims—“circuitry that protects the regulator
`circuitry from [voltage] spikes.” Id.
`We do not agree with Patent Owner that the broadest reasonable
`construction of the voltage spike protection circuitry terms, as used in the
`’250 patent, limits the voltage spike protection circuitry to the same chip or
`integrated circuit as the regulator circuitry it is designed to protect.
`Patent Owner notes that every disclosed embodiment in the ’250
`patent shows both the protection circuitry and the regulator circuitry on the
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`same integrated circuit. PO Resp. 18–23. Specifically, Patent Owner points
`to the embodiments shown in Figures 12, 18, 19, 20, and 22. Id. (citing Ex.
`1201, Figs. 12, 19, 20, 22, 10:43–46, 16:55–56). Petitioner does not dispute
`that all the embodiments discussed in the Specification include the voltage
`spike protection circuitry on the same chip or integrated circuit as the
`regulator circuitry that it protects. See Reply 3–4. Petitioner, however,
`points out that each of these embodiments is identified as an “example” or
`an “embodiment.” Id. (citing Ex. 1201, 10:42; 16:52, 18:15–16, 19:35,
`19:47–48). Based on this language, Petitioner argues that “[i]t is improper
`to read limitations from the embodiments in the specification into the
`claims.” Id. at 3 (citing Hill-Rom Servs. v. Stryker Corp., 755 F.3d 1367,
`1371 (Fed. Cir. 2014)). We agree with Petitioner that it would be improper
`to read this limitation from the Specification into the claims.
`Further, Patent Owner asserts that because the Specification employs
`very fast switching times using small transistors in the integrated circuits,
`the circuitries must be located on the same integrated circuit. PO Resp. 18–
`20, 23–24. Specifically, Patent Owner points to the Specification’s
`acknowledgement that the consumer market demands creation of the
`“thinnest and smallest devices possible.” Id. at 18 (quoting Ex. 1201, 3:38–
`40). Patent Owner further notes the disclosure that increased switching
`frequency and the resulting benefit of lower-valued inductors and capacitors
`allows for “use of planar geometries that can be integrated on printed-circuit
`
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`boards or fabricated in integrated circuits.” Id. at 18–19 (citing Ex. 1201,
`3:58–65). According to Patent Owner, it is this act of achieving very fast
`switching times using advanced transistors on integrated circuits that causes
`the problem of voltage spiking that the ’250 patent addresses. Id. at 19
`(citing Ex. 1201, 5:49–50, 5:60–63, 6:56–65). Petitioner does not dispute
`that the ’250 patent teaches the benefits of small devices and fast switching
`times, but argues that “these passages say nothing about the location of the
`spike protection circuitry.” Reply 4.
`We agree with Patent Owner that the ’250 patent describes the
`specific problem it is trying to solve in terms that imply single chip
`implementation. For example, the Specification states that “there exists a
`need for a DC-DC converter that is simultaneously compact (including
`optimally fabrication of all active and passive components on a single
`semiconductor die), low in cost, and highly efficient” that is protected from
`voltage spikes. Ex. 1201, 6:66–7:7. Dr. Pedram supports this understanding
`of the ’250 patent, explaining that “[b]y moving the switching transistors on-
`chip, one can [] ‘reduce[] the overall size of the voltage regulator’—that is,
`the size of the inductors and capacitors thereon.” Ex. 2208 ¶ 34 (citing Ex.
`1201, 6:66–7:3, 1:62–64). We are, nonetheless, not persuaded that such
`description is sufficient to require Patent Owner’s proposed claim
`construction of the cited term. The claims are broader and do not recite the
`specific problem to be solved or the need to be satisfied.
`
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`
`Additionally, Patent Owner notes that “in the only section dedicated
`to voltage spike protection,” the two circuits are placed on the same
`integrated circuit. PO Resp. 19 (quoting Ex. 1201, 15:51–57 (describing
`“several physical inductances present in any realistic packaged device,
`including . . . the parasitic inductance of the traces and/or wirebonds
`connecting the supply leads or bumps to the contact pads on the integrated
`circuit containing the converter”)). Similarly, Patent Owner asserts that the
`’250 patent “disclaims voltage spike protection circuits that are not on the
`same integrated circuit as the regulatory circuitry.” PO Resp. 24 (quoting
`Ex. 1201, 16:29–30). Petitioner argues that this is not a disavowal of non-
`integrated-circuit implementation, but instead that it “suggests a potential
`disadvantage.” Reply 4–5 (citing Epistar Corp. v. Int’l Trade Comm’n., 566
`F.3d 1321, 1335 (Fed. Cir. 2009)). Petitioner adds that “in full context, the
`passage refers only to a specific ‘example,’ not all voltage spike protection
`circuits.” Id. at 4 (citing Ex. 1201, 16:13–30; Ex. 1245 ¶¶ 17–18). We
`agree with Petitioner that, although it may suggest a potential disadvantage
`of a non-integrated circuit implementation, this language does not arise to
`disavowel of non-integrated circuits.
` We read the Specification, as a whole, as touting the benefit of
`voltage spike protection circuitry as being more effective in affecting
`voltage spikes when implemented on the same chip as the regulator
`circuitry. Ex. 1201, 16:29–30 (“It should be noted that inclusion of an off-
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`chip capacitor does not appreciably affect the size of the spikes.”).
`Petitioner’s arguments are not inconsistent with this understanding. Reply 4
`(“At most, this passage suggests a potential disadvantage associated with
`non-integration.”). However, the claims are not limited to the most effective
`implementation of the voltage spike protection circuitry. Therefore, this
`particular benefit does not limit the broadest reasonable interpretation of the
`claims.
`In summary, the ’250 patent (1) discloses that the problem to be
`solved with voltage spiking occurs on compact, fast-switching converters,
`(2) suggests that implementing the voltage spike protection circuitry on a
`separate chip would be less effective, and (3) describes multiple
`embodiments showing only single chip implementation. Although the
`Specification touts the implementation of the voltage spike protection
`circuitry and the regulator circuitry on a same chip as being more effective
`than the implementation on different chips, it does not require a particular
`implementation. It is not inconsistent with the Specification for the claim
`term to read on both implementations. Accordingly, we agree with
`Petitioner that the broadest reasonable interpretation of the voltage spike
`protection circuitry would encompass its implementation with the regulator
`circuitry on the same chip, and alternatively on different chips. See Smith,
`871 F.3d at 1383.
`
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`
`Level of Ordinary Skill in the Art
`B.
`In determining the level of ordinary skill in the art, various factors
`may be considered, including the “type of problems encountered in the art;
`prior art solutions to those problems; rapidity with which innovations are
`made; sophistication of the technology; and educational level of active
`workers in the field.” In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995)
`(internal quotation and citation omitted).
`Petitioner’s Declarant, Dr. Steven B. Leeb, contends that a person
`having ordinary skill in the art at the time of the invention would have had
`(1) a Bachelor of Science degree in Electrical Engineering, and (2) two years
`of graduate work or experience working in the field of power electronics
`circuit design and chip design or equivalent experience. Ex. 1202 ¶ 57.
`Further, Patent Owner’s Declarant, Dr. Massoud Pedram, asserts that a
`person of ordinary skill in the art would have had a Bachelor of Science
`degree in electrical engineering, and three years of work or research
`experience in the fields of power electronics or high-speed mixed-signal IC
`design, or a Master’s degree in electrical engineering and two years of work
`or research experience in the fields of power electronics or high-speed
`mixed-signal IC design. Ex. 2001 ¶ 92. Because we do not observe a
`meaningful difference between the parties’ assessments, and find either
`assessment to be “consistent with the level of ordinary skill in the art at the
`time of the invention as reflected in the prior art, we adopt Patent Owner’s
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`proposed level. This definition is consistent with the level of ordinary skill
`reflected in the prior art references of record. See Okajima v. Bourdeau,
`261 F.3d 1350, 1355 (Fed. Cir. 2001) (the prior art itself may reflect an
`appropriate level of skill in the art). In re GPAC Inc., 57 F.3d 1573, 1579
`(Fed. Cir. 1995); In re Oelrich, 579 F.2d 86, 91 (CCPA 1978). For purposes
`of this decision, we therefore adopt the Patent Owner’s proposed level of
`ordinary skill in the art.
`C. Obviousness over Shekhawat and McMurray
`Petitioner contends that claims 1–4, 7–9, 13–17, 20–22, and 29 are
`unpatentable under 35 U.S.C. § 103(a) over the combination of Shekhawat
`and McMurray. Pet. 29–72. Patent Owner opposes. PO Resp. 26–50. As
`discussed below, Petitioner has made an adequate showing as to this
`assertion.
`
`Principles of Law
`1.
`A claim is unpatentable under § 103(a) if the differences between the
`claimed subject matter and the prior art are such that the subject matter, as a
`whole, would have been obvious at the time the invention was made to a
`person having ordinary skill in the art to which said subject matter pertains.
`KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007). The question of
`obviousness is resolved on the basis of underlying factual determinations,
`including (1) the scope and content of the prior art; (2) any differences
`between the claimed subject matter and the prior art; (3) the level of skill in
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`the art; and (4) when in evidence, objective indicia of non-obviousness
`(i.e., secondary considerations). Graham v. John Deere Co., 383 U.S. 1, 17–
`18 (1966). We analyze this asserted ground based on obviousness with the
`principles identified above in mind.
`
`Overview of Shekhawat
`2.
`Shekhawat describes a power converter system for converting an AC
`input voltage at an input terminal to an AC output voltage at an output
`terminal. Ex. 1206, 1:60–63. Figure 1 of Shekhawat is reproduced below.
`
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`18
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`Figure 1 shows a power converter system with an AC/AC chopper circuit.
`Figure 1 depicts voltage regulator/power converter 410 containing a
`snubber circuit16 (including capacitor 416 and resistor 444) and AC to AC
`chopper circuit 412. In particular, upon receiving at power terminal 406 an
`AC input power from a power source, power converter system 410 utilizes
`chopper 412 coupled to a snubber circuit to reduce voltage spike in the
`
`
`16 The function of a snubber circuit is analogous to that of a voltage spike
`protection circuit. See Ex. 1206, 4:3–6.
`
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`signal, and to subsequently deliver a controlled AC output power to a load at
`an output terminal 408. Ex. 1206 at 3:55–4:5.
`3.
`Overview of McMurray
`McMurray discloses a design procedure for selecting the capacitance
`and optimum resistance in an RC snubber circuit to limit the peak voltage
`across a power rectifier or thyristor to absorb energy associated with the
`recovery current of the device. Ex. 1203, 593–96. An equivalent snubber
`circuit, as shown in McMurray Figure 1, is depicted below:
`
`
`
`Fig. 1 shows an equivalent snubber circuit.
`Figure 1 of McMurray shows “[a] voltage E, applied to a series RCL
`circuit” where “[t]he voltage e across the snubber resistance and capacitance
`in series appears as recovery voltage on the semiconductor source.” Id. at
`593. McMurray also discloses equation 58 for calculating the optimum
`resistor value based on the damping factor and characteristics of the circuit
`in which the snubber is to be used such as to limit the resulting voltage spike
`and rate of rise dv/dt. Id. at 594. Equation 58 is reproduced below:
`
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`20
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`Id. at 594–96. Equation 58, above, shows the value “R” necessary to
`achieve a particular damping factor, such as 1. Id. at 596.
`
`4. McMurray Qualifies as Prior Art
` Patent Owner argues that “Petitioner and Dr. Leeb provide absolutely no
`support for their bare conclusory statements that McMurray was published
`in 1972,” thus, not meeting their burden to show that was publicly available
`before the critical date. PO Resp. 25–26 (citing Pet. 5; Ex. 1202 ¶ 78).
`We do not agree with Patent Owner that Petitioner has not sufficiently
`shown that McMurray was publicly available before December 23, 2009 (the
`filing date of the ’250 patent) (“critical date”). McMurray, on its face,
`indicates that it is an article published in the “September/October 1972”
`issue of “IEEE Transactions on Industry Applications, Vol. 1A-8, No. 5.”
`Ex. 1203. Moreover, in the lower left corner of the first page, McMurray
`notes that it was “approved by the Power Semiconductor Committee of the
`IEEE Industry Applications Society for presentation at the 1971 IEEE
`Industry and General Applications Group Annual Meeting, Cleveland, Ohio,
`October 18–21” and was “released for publication February 23, 1972.” Id.
`We credit the publication information on the face of McMurray as
`evidence of its date of publication and public accessibility. As noted in
`
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`previous proceedings, “IEEE is a well-known, reputable compiler and
`publisher of scientific and technical publications.” Ericsson Inc. v.
`Intellectual Ventures I LLC, IPR2014-00527, Paper 41 at 10–11 (PTAB May
`18, 2015). Petitioner also points to several other publications that cited
`McMurray before the critical date. Petitioner also points to several other
`publications that cited McMurray before the critical date. Reply 15 (citing
`Ex. 1207; Ex. 1211). For example, Kassakian, published in 1992 describes
`McMurray as the “classic” snubber reference. Ex. 1207, 3. Finally,
`Petitioner provides a declaration of Gerard Grenier, Senior Director of IEEE,
`which confirms that McMurray was published “on or before September
`1972.” Ex. 1251 ¶ 10.
`Taken together, the record contains sufficient evidence to show that
`McMurray was publicly available prior to the ’250 patent’s priority date and,
`thus, qualifies as prior art. See Giora George Angres, Ltd. v. Tinny Beauty
`& Figure, Inc., 1997 WL 355479, at *7 (Fed. Cir. June 26, 1997)
`(unpublished) (finding “no reason to suspect that [a reference published by
`an established publisher] was not publicly available, including to one skilled
`in the art” when “no evidence was presented that it was not”) (citing In re
`Hall, 781 F.2d 897, 899 (Fed. Cir. 1986)).
`Obviousness Analysis
`5.
`Petitioner asserts that the combination of Shekhawat and McMurray
`discloses the elements of claims 1–4, 7–9, 13–17, 20–22, and 29. Pet. 27–
`
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`71. We begin our analysis with claim 1. We have reviewed the Petition,
`Patent Owner Response, and Petitioner’s Reply, as well as the relevant
`evidence discussed in those papers and other record papers. We are
`persuaded that the record sufficiently establishes Petitioner’s contentions for
`claims 1–4, 7–9, 13–17, 20–22, and 29.
`Petitioner’s Positions
`With respect to claim 1, Petitioner relies upon Shekhawat’s “power
`converter system 410/510” as teaching “a voltage regulator.” Pet. 29–30
`(citing Ex. 1206, 1:25–27, 2:62–64, Ex. 1202 ¶¶ 88–90). In particular,
`Petitioner relies upon Shekhawat’s disclosure of “power converter 410…
`that ‘receives an AC input power …and delivers a controlled AC output
`power to a load at an output terminal”’ as teaching “the regulator circuitry
`generating a regulated voltage from a first power supply and a second power
`supply.” Id. at 30 (citing Ex. 1206, 2:62–3:2, 4:41–49, Ex. 1202 ¶ 91).
`According to Petitioner, Shekhawat’s node above capacitor 416/516 teaches
`the first power supply Vhi, and the node beneath resistor 444/544 teaches the
`second power supply Vloc. Id. at 31 (citing Ex. 1201, 9:10–16). We are
`persuaded by Petitioner’s showing and find that Shekhawat’s power
`converter system 410/510 teaches a voltage regulator.
`Further, Petitioner relies upon Shekhawat’s “snu

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