`571-272-7822
`
`Paper 11
`Entered: June 11, 2021
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.,
`Petitioner,
`
`v.
`
`ARBOR GLOBAL STRATEGIES LLC,
`Patent Owner.
`____________
`
`IPR2021-00735
`Patent 7,126,214 B2
`____________
`
`
`
`Before KARL D. EASTHOM, BARBARA A. BENOIT, and
`SHARON FENICK, Administrative Patent Judges.
`
`BENOIT, Administrative Patent Judge.
`
`
`
`DECISION
`Granting Institution of Inter Partes Review
`35 U.S.C. § 314
`Granting Motion for Joinder
`35 U.S.C. § 315(c); 37 C.F.R. § 42.122
`
`
`
`
`
`
`
`
`
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`
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`IPR2021-00735
`Patent 7,126,214 B2
`
`On April 5, 2021, Taiwan Semiconductor Manufacturing Co. Ltd.
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`(“Petitioner”) filed a Petition (Paper 1) seeking inter partes review of
`
`claims 1–6 and 26–31 (the “challenged claims”) of U.S. Patent
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`No. 7,126,214 B2 (Ex. 1001, “the ’214 patent”). With the Petition,
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`Petitioner filed a Motion for Joinder (Paper 3, “Motion” or “Mot.”) with
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`Xilinx, Inc. v. Arbor Global Strategies LLC, IPR2020-01567 (“Xilinx IPR”).
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`Subsequently, during a conference call held on May 20, 2021, counsel for
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`Patent Owner, Arbor Global Strategies LLC, confirmed that it does not
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`oppose joinder and will not file a preliminary response to the Petition in
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`view of representations that Petitioner made in its Motion. See Paper 10
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`(Order documenting the conference call).
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`The Board has authority to determine whether to institute an inter
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`partes review. See 35 U.S.C. § 314(b); 37 C.F.R. § 42.4(a) (2020). Under
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`35 U.S.C. § 314(a), an inter partes review may not be authorized unless the
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`information in the Petition and the Preliminary Response “shows that there
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`is a reasonable likelihood that the petitioner would prevail with respect to at
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`least 1 of the claims challenged in the petition.”
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`For the reasons that follow, we institute an inter partes review as to
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`the challenged claims of the ’214 patent on all grounds of unpatentability
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`presented. We also grant Petitioner’s Motion.
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`I. BACKGROUND
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`A. Real Parties-in-Interest
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`Petitioner identifies Taiwan Semiconductor Manufacturing
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`Company Ltd. and TSMC North America as real parties-in-interest. Paper 5
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`2
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`IPR2021-00735
`Patent 7,126,214 B2
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`(“Petition” or “Pet.”),1 47–48. Patent Owner identifies Arbor Global
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`Strategies LLC as a real party-in-interest. Paper 8, 1.
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`B. Related Proceedings
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`The parties identify Arbor Global Strategies LLC v. Xilinx, Inc., 1:19-
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`cv-1986-MN (D. Del.) (filed October 18, 2019) as a related proceeding. See
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`Pet. 48; Paper 8, 1. Concurrent with the instant Petition, Petitioner filed
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`petitions challenging claims in three related patents, specifically IPR2021-
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`00736 challenging U.S. Patent No. 7,282,951, IPR2021-00737 challenging
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`RE42,035, and IPR2021-00738 challenging U.S. Patent No. 6,781,226.
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`Pet. 48.
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`C. The ’214 Patent
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`The ’214 patent describes a stack of integrated circuit (“IC”) die
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`elements including a field programmable gate array (FPGA) on a die, a
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`memory on a die, and a microprocessor on a die. Ex. 1001, code (57),
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`Fig. 4. Multiple contacts traverse the thickness of the die elements of the
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`stack to connect the gate array, memory, and microprocessor. Ex. 1001,
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`code (57), Fig. 4. According to the ’214 patent, this arrangement “allows for
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`a significant acceleration in the sharing of data between the microprocessor
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`and the FPGA element while advantageously increasing final assembly yield
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`and concomitantly reducing final assembly cost.” Ex. 1001, code (57),
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`Fig. 4.
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`1 The petition (Paper 1) filed on April 5, 2021 was replaced by a corrected
`petition (Paper 5), which was accepted by the Board (Paper 7). See also
`Paper 4 (Notice of Filing Date Accorded to Petition).
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`3
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`IPR2021-00735
`Patent 7,126,214 B2
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`Figure 4 follows:
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`
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`The ’214 patent explains that an FPGA provides known advantages as
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`part of a “reconfigurable processor.” See Ex. 1001, 1:23–39. Reconfiguring
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`the FPGA gates alters the “hardware” of the combined “reconfigurable
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`processor” (e.g., the processor and FPGA) making the processor faster than
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`one that simply accesses memory (i.e., “the conventional ‘load/store’
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`paradigm”) to run applications. See Ex. 1001, 1:23–39. A “reconfigurable
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`processor” provides a known benefit of flexibly providing the specific
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`functional units needed for applications to be executed. See Ex. 1001, 1:23–
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`39.
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`D. Illustrative Claims 1, 2, 26, and 27
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`The Petition challenges claims 1–6 and 26–31, of which claims 1, 2,
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`26, and 27 are independent claims. Each of the challenged claims are
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`directed toward a programmable array module. See, e.g., Ex. 1001, 7:56
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`(independent claim 1), 8:2 (independent claim 2), 9:41 (independent claim
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`4
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`IPR2021-00735
`Patent 7,126,214 B2
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`26), 9:52. Claim 1 reproduced below illustrates the challenged claims at
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`issue.
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`1. A programmable array module comprising:
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`[1.1] at least a first integrated circuit functional element
`including a field programmable gate array; and
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`[1.2] at least a second integrated circuit functional element
`including a memory array stacked with and electrically
`coupled to said field programmable gate array of said
`first integrated circuit functional element
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`[1.3] wherein said field programmable gate array is
`programmable as a processing element, and
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`[1.4] wherein said memory array is functional to accelerate
`reconfiguration of said field programmable gate array as
`a processing element.
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`
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`Ex. 1001, 7:56–67 (information added by Board to conform to Petitioner’s
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`nomenclature); see Pet. 22–30 (addressing claim 1).
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`Among the differences recited by the independent claims, independent
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`claims 2 and 27 recite “said first and second integrated circuit functional
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`elements being coupled by a number of contact points distributed throughout
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`the surfaces of said functional elements.” Ex. 1001, 8:1–15, 9:58–61.
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`Independent claims 26 and 27 recite “wherein said memory array is
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`functional to accelerate external memory references to said processing
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`element.” Ex. 1001, 9:49–51, 10:2–4.
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`E. The Asserted Grounds
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`Petitioner challenges claims 1–6 and 26–31 of the ’214 patent on the
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`following grounds (Pet. 3):
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`5
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`IPR2021-00735
`Patent 7,126,214 B2
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`Claims Challenged
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`35 U.S.C.
`§
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`1, 2, 4, 6, 26, 27, 29, 31 1032
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`3, 28
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`5, 30
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`103
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`103
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`Reference(s)/Basis
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`Zavracky3, Chiricescu4,
`Akasaka5
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`Zavracky, Chiricescu,
`Akasaka, Satoh6
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`Zavracky, Chiricescu,
`Akasaka, Alexander7
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`Petitioner contends that each of the asserted references is prior art to each of
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`the challenged claims. Pet. 2. Petitioner additionally relies on the
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`Declaration of Paul Franzon, Ph.D. (Ex. 1002) in support of its contentions.
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`2 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112-29, 125
`Stat. 284, 287–88 (2011), amended 35 U.S.C. § 103. For purposes of
`institution, the ’214 patent contains a claim with an effective filing date
`before March 16, 2013 (the effective date of the relevant amendment), so the
`pre-AIA version of § 103 applies.
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`3 Zavracky, US 5,656,548, issued Aug. 12, 1997 (Ex. 1003).
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`4 Silviu M. S. A. Chiricescu and M. Michael Vai, A Three-Dimensional
`FPGA with an Integrated Memory for In-Application Reconfiguration Data,
`Proceedings of the 1998 IEEE International Symposium on Circuits and
`Systems, May 1998, ISBN 0-7803-4455-3/98 (Ex. 1004).
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`5 Yoici Akasaka, Three-Dimensional IC Trends, Proceedings of the IEEE,
`Vol. 74, Issue 12, pp. 1703–14, Dec. 1986, ISSN 0018-9219 (Ex. 1005).
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`6 Satoh, PCT App. Pub. No. WO00/62339, published Oct. 19, 2000.
`(Ex. 1008 (English translation)).
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`7 Michael J. Alexander et al., Three-Dimensional Field-Programmable Gate
`Arrays, Proceedings of Eighth International Application Specific Integrated
`Circuits Conference, Sept. 1995 (Ex. 1009).
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`6
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`IPR2021-00735
`Patent 7,126,214 B2
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`II. ANALYSIS
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`A. Institution of Inter Partes Review
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`We instituted an inter partes review in the Xilinx IPR on all
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`challenged claims and all asserted grounds of unpatentability. Xilinx IPR,
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`Paper 13. Petitioner here challenges the same claims and asserts the same
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`grounds of unpatentability as those on which we instituted the Xilinx IPR.
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`Mot. 1 (“The Petition was based on the identical grounds that form the basis
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`for the pending inter partes review initiated by Xilinx, Inc. . . concerning the
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`same patent, Case No. IPR2020-01567.”). Petitioner also relies on the same
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`declarant as did the petition in the Xilinx IPR. Mot. 4 (“The Petition asserts
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`only grounds that the Board already instituted in the Xilinx ’214 IPR,
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`supported by the same technical expert and the same testimony.”); compare
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`Ex. 1002, with Xilinx IPR Ex. 1002 (Declaration of Dr. Paul
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`Franzon, Ph.D.).
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`Because the grounds of unpatentability in the instant Petition are
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`identical to those in the Xilinx IPR, and for the same reasons stated in our
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`Decision to Institute in the Xilinx IPR, we institute inter partes review in
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`this proceeding on the grounds presented in the Petition. See Xilinx IPR
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`Paper 13, 15–36 (Analysis of challenges in Petition).
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`B. Motion for Joinder
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`Joinder in an inter partes review is subject to the provisions of
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`35 U.S.C. § 315(c):
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`(c) JOINDER.—If the Director institutes an inter partes review,
`the Director, in his or her discretion, may join as a party to that
`inter partes review any person who properly files a petition
`under section 311 that the Director, after receiving a
`preliminary response under section 313 or the expiration of the
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`IPR2021-00735
`Patent 7,126,214 B2
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`time for filing such a response, determines warrants the
`institution of an inter partes review under section 314.
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`To join Petitioner to the instituted Xilinx IPR, we must first determine
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`whether the Petition “warrants” institution under § 314. See Facebook, Inc.
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`v. Windy City Innovations, LLC, 973 F.3d 1321, 1332 (Fed. Cir. 2020). We
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`have done so as noted above.
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`We turn to the second determination that must be made when
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`considering joinder: whether to exercise “discretion to decide whether to
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`‘join as a party’ the joinder applicant,” who is the Petitioner in this
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`proceeding. Id. Petitioner timely filed its Motion for Joinder on April 5,
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`2021, which was no later than one month after the institution of the Xilinx
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`IPR on March 5, 2021. 37 C.F.R. § 42.122(b); see Mot. 1.
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`As moving party, Petitioner bears the burden of proving that it is
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`entitled to the requested relief. 37 C.F.R. § 42.20(c). A motion for joinder
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`should (1) set forth the reasons joinder is appropriate; (2) identify any new
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`grounds of unpatentability asserted in the petition; and (3) explain what
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`impact (if any) joinder would have on the trial schedule for the existing
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`review. See Kyocera Corp. v. SoftView, LLC, IPR2013-00004, Paper 15 at 4
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`(PTAB Apr. 24, 2013).
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`We determine that Petitioner has met its burden of showing that
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`joinder is appropriate because, as set forth above, the Petition here: (1) is
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`substantially identical to the petition in the Xilinx IPR, (2) contains the same
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`grounds based on the same evidence, and (3) relies on the same declaration
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`of Paul Franzon, Ph.D. (Ex. 1002). Mot. 1, 4; see, e.g., Mot. 4 (“The
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`Petition asserts only grounds that the Board already instituted in the
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`Xilinx ’214 IPR, supported by the same technical expert and same
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`testimony. There are no new arguments for the Board to consider.
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`IPR2021-00735
`Patent 7,126,214 B2
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`Likewise, the Petition relies on the same exhibits.”). Petitioner also
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`represents that joinder will not impact the Xilinx IPR schedule. Mot. 1, 4–5;
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`see, e.g., Mot. 5 (“Without any new issues present, there is no reason to
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`delay or alter the trial schedule already present in the Xilinx IPR, and
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`Petitioner explicitly consents to the existing schedule.”).
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`Additionally, Petitioner represents that it is willing to accept a limited,
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`“understudy role” to Xilinx (the original petitioner in the Xilinx IPR) such
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`that Petitioner will only assume “an active role in the event that Xilinx no
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`longer is a party to these proceedings.” Mot. 1. Specifically, Petitioner
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`represents that in its understudy role, it agrees that the following conditions
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`will apply:
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`(a) all filings by Petitioner in the joined proceeding [shall] be
`consolidated with the filings of Xilinx, unless a filing solely
`concerns issues that do not involve Xilinx;
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`(b) Petitioner shall not be permitted to raise any new grounds
`not already instituted by the Board, or introduce any argument
`or discovery not already introduced by Xilinx;
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`(c) Petitioner shall be bound by any agreement between Patent
`Owner and Xilinx concerning discovery and/or depositions; . . .
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`(d) Petitioner at deposition shall not receive any direct, cross
`examination or redirect time beyond that permitted for Xilinx in
`this proceeding alone under either 37 C.F.R. § 42.53 or any
`agreement between Patent Owner and Xilinx; and
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`(e) [i]f an oral hearing is requested and scheduled, Xilinx in the
`joined proceeding will designate attorney(s) to present a
`consolidated argument at the oral hearing.
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`Mot. 5–6.
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`Petitioner further represents that Xilinx does not oppose Petitioner’s
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`motion to join the Xilinx IPR. Mot. 1.
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`IPR2021-00735
`Patent 7,126,214 B2
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`We determined above that the Petition warrants the institution of an
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`inter partes review. Under these circumstances, we agree with Petitioner
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`that joinder is appropriate and will not unduly impact the ongoing trial in the
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`Xilinx IPR. We limit Petitioner’s participation in the Xilinx IPR proceeding,
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`as follows: (1) Xilinx alone is responsible for all petitioner filings in the
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`proceeding until such time that it is no longer an entity in the proceeding,
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`and (2) Petitioner is bound by all filings by Xilinx in the proceeding, except
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`for (a) filings regarding termination or settlement, and (b) filings where
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`Petitioner receives permission to file an independent paper. Petitioner must
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`obtain prior Board authorization to file any paper or take any action on its
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`own in the proceeding, so long as Xilinx remains as a non-terminated
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`petitioner in the proceeding. This arrangement promotes the just and
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`efficient administration of the ongoing trial in the Xilinx IPR, and protects
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`the interests of Xilinx as original petitioner in IPR2020-01567 and of Patent
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`Owner.
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` III. CONCLUSION
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`For the foregoing reasons, we institute inter partes review of the
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`challenged claims of the ’214 patent based on the grounds of unpatentability
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`set forth in the Petition. We grant Petitioner’s Motion for Joinder and join
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`Petitioner to IPR2020-01567, with the limitations set forth herein.
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`10
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`IPR2021-00735
`Patent 7,126,214 B2
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`Accordingly, it is
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`IV. ORDER
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`ORDERED that pursuant to 35 U.S.C. § 314, inter partes review is
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`instituted as to the challenged claims of the ’214 patent with respect to all
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`grounds of unpatentability presented in the Petition;
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`FURTHER ORDERED that, pursuant to 35 U.S.C. § 315(c) and 37
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`C.F.R. § 42.122, Petitioner’s Motion for Joinder (Paper 3) is granted, and
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`Petitioner is joined as a petitioner in IPR2020-01567, subject to the above-
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`described limitations on Petitioner’s participation in that proceeding;
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`FURTHER ORDERED that the asserted grounds of unpatentability on
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`which the Board instituted inter partes review in IPR2020-01567 are
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`unchanged and remain the only instituted grounds;
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`FURTHER ORDERED that the Scheduling Order in IPR2020-01567,
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`and any modifications thereto, shall govern the schedule of the proceeding;
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`FURTHER ORDERED that all further filings are to be made in
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`IPR2020-01567;
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`FURTHER ORDERED that the case caption in IPR2020-01567 for all
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`further submissions shall be modified to add Taiwan Semiconductor
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`Manufacturing Co. Ltd. as a named Petitioner, and to indicate by footnote
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`the joinder of Petitioner to that proceeding, as indicated in the attached
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`sample case caption; and
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`FURTHER ORDERED that a copy of this Decision shall be entered
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`into the record in IPR2020-01567.
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`11
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`IPR2021-00735
`Patent 7,126,214 B2
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`PETITIONER:
`
`James M. Glass
`Ziyong Li
`QUINN EMANUEL URQUHART & SULLIVAN LLP
`jimglass@quinnemanuel.com
`seanli@quinnemanuel.com
`
`
`PATENT OWNER:
`
`Jonathan S. Caplan
`James Hannah
`Jeffrey H. Price
`KRAMER LEVIN NAFTALIS & FRANKEL LLP
`jcaplan@kramerlevin.com
`jhannah@kramerlevin.com
`jprice@kramerlevin.com
`
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`12
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`IPR2021-00735
`Patent 7,126,214 B2
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`Sample Case Caption
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`XILINX, INC. and
`TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.,
`Petitioner,
`
`v.
`
`ARBOR GLOBAL STRATEGIES, LLC,
`Patent Owner.
`____________
`
`IPR2020-015671
`Patent 7,126,214 B2
`____________
`
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`1 Taiwan Semiconductor Manufacturing Co. Ltd. filed a petition in
`IPR2021-00735 and has been joined as a party to this proceeding.
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`13
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