`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`
`VLSI TECHNOLOGY LLC,
`Plaintiff,
`
`v.
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`INTEL CORPORATION,
`Defendant.
`
`
`
`
`
`
`C.A. No. 18-966-CFC
`
`FILED UNDER SEAL
`
`
`
`REPLY BRIEF IN SUPPORT OF
`PLAINTIFF VLSI TECHNOLOGY LLC'S SECOND MOTION
`TO REINTRODUCE CERTAIN ASSERTED PATENT CLAIMS, OR TO
`SEVER SUCH CLAIMS INTO A SEPARATE ACTION TO BE STAYED
`
`
`
`
`Dated: March 20, 2020
`
`Brian E. Farnan (Bar No. 4089)
`Michael J. Farnan (Bar No. 5165)
`FARNAN LLP
`919 N. Market St., 12th Floor
`Wilmington, DE 19801
`Telephone : (302) 777-0300
`Fax : (302) 777-0301
`bfarnan@farnanlaw.com
`mfarnan@farnanlaw.com
`
`Morgan Chu (admitted pro hac vice)
`Benjamin Hattenbach (admitted pro hac vice)
`Iian D. Jablon (admitted pro hac vice)
`Christopher Abernethy (admitted pro hac vice)
`Amy E. Proctor (admitted pro hac vice)
`Dominik Slusarczyk (admitted pro hac vice)
`S. Adina Stohl (admitted pro hac vice)
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`
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`10815877
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 2 of 16 PageID #: 20851
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`Charlotte J. Wen (admitted pro hac vice)
`Brian M. Weissenberg (admitted pro hac vice)
`IRELL & MANELLA LLP
`1800 Avenue of the Stars, Suite 900
`Los Angeles, California 90067
`Telephone: (310) 277-1010
`mchu@irell.com
`bhattenbach@irell.com
`ijablon@irell.com
`cabernethy@irell.com
`aproctor@irell.com
`dslusarczyk@irell.com
`astohl@irell.com
`cwen@irell.com
`bweissenberg@irell.com
`
`Attorneys for Plaintiff
`VLSI Technology LLC
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`10815877.
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 3 of 16 PageID #: 20852
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`TABLE OF CONTENTS
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`Page
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`I.
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`II.
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`III.
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`IV.
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`There Is No Dispute The Reintroduced Claims Present Unique Issues
`of Validity and Infringement, Implicating Due Process ............................... 1
`A.
`Intel Admits The Katz Standard Is Satisfied ......................................... 1
`B.
`Intel's "General Arguments" Are Mere Attempts At Misdirection ...... 1
`C.
`Intel Fails To Refute Any of VLSI's Claim-By-Claim Arguments ...... 3
`1.
`The '331 Patent ............................................................................ 3
`2.
`The '026 Patent ............................................................................ 4
`3.
`The '633 Patent ............................................................................ 5
`4.
`The '552 Patent ............................................................................ 6
`VLSI Has Provided "A Showing of Good Cause That Includes A
`Demonstration that [Reintroduction] Is Necessary To Vindicate
`[VLSI's] Due Process Rights" ...................................................................... 6
`A.
`Intel Misstates Both This Court's Order and The Law ......................... 6
`B.
`Intel's Suggestion That VLSI's Motion Is "Untimely" Is Meritless ..... 8
`Intel's Suggestion That Upholding Due Process Would Be Disruptive
`and Prejudicial Is Misguided ........................................................................ 9
`If Not Reintroduced, The Claims At Issue Must Be Severed And
`Stayed .......................................................................................................... 10
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 4 of 16 PageID #: 20853
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`TABLE OF AUTHORITIES
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` Page(s)
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`Cases
`In re Katz Interactive Call Processing Patent Litig., Inc.,
`639 F.3d 1303 (Fed. Cir. 2011) ...................................................................passim
`Other Authorities
`Fed. R. Civ. P. 11 ....................................................................................................... 2
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`* Unless noted, all emphasis is added.
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 5 of 16 PageID #: 20854
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`I.
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`There Is No Dispute The Reintroduced Claims Present Unique Issues of
`Validity and Infringement, Implicating Due Process
`Intel Admits The Katz Standard Is Satisfied
`Intel admits that "the limitations of each unelected claim are … different from
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`A.
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`the limitations of each elected claim" and that "the unelected claims omit certain
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`limitations that form the basis for Intel's noninfringement defenses for certain elected
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`claims." D.I. 591 ("Intel Op.") at 2, 12. This aligns perfectly with the Katz standard—
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`i.e., a "defense raised by [the] defendant [] to a currently asserted claim does not
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`apply in substantially the same manner to a newly asserted claim." In re Katz
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`Interactive Call Processing Patent Litig., Inc., 639 F.3d 1303, 1313 (Fed. Cir. 2011).
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`Because Intel admits that the claims VLSI seeks to reintroduce present unique
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`issues of infringement and validity, there is no meaningful dispute that they
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`implicate VLSI's due process rights. The Court could end its analysis here.
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`B.
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`Intel's "General Arguments" Are Mere Attempts At Misdirection
`Having admitted the Katz standard is satisfied, Intel resorts to misdirection.
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`First, Intel argues it is not enough that "the unelected claims contain certain
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`limitations not present in certain elected claims." Intel Op. at 12. This is a strawman.
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`VLSI agrees, as does the Federal Circuit, that "[w]hile different claims are presumed
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`to be of different scope, that does not mean that they necessarily present different
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`questions of validity or infringement." Katz, 639 F.3d at 1313. There must be a
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`difference that actually matters, whereby a "defense raised by [the] defendant [] to a
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 6 of 16 PageID #: 20855
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`currently asserted claim does not apply in substantially the same manner to a newly
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`asserted claim." Id. That is precisely what VLSI has shown and Intel admits—e.g.,
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`"the unelected claims omit certain limitations that form the basis for Intel's
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`noninfringement defenses for certain elected claims." Intel Op. at 12.
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`Second, Intel suggests Katz should be disregarded because any defendant who
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`disputes infringement necessarily "denies infringement based on limitations recited
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`in the claims." Intel Op. at 13. This is a non-sequitur. Defendants do not always, or
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`even typically, dispute infringement based on every limitation. Indeed, per Rule 11,
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`a defendant should only dispute infringement based on the limitations for which it
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`has a good-faith argument. Intel itself does not dispute every limitation.
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`Third, Intel contends the analysis must consider "limitations that are common
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`to both elected and unelected claims." Intel Op. at 14. But Intel has it backwards.
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`The Katz analysis hinges on the differences between claims—not their similarities—
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`because it requires that a "defense … to a currently asserted claim does not apply in
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`substantially the same manner to a newly asserted claim." Katz, 639 F.3d at 1313.
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`That can only occur if a difference between two claims makes a defense applicable
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`to one claim but not the other. And if such a difference exists, extraneous similarities
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`will not change that the defense still only applies to one claim and not the other.
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`C.
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`Intel Fails To Refute Any of VLSI's Claim-By-Claim Arguments
`1.
`The '331 Patent
`VLSI has shown Claim 2 of the '331 Patent presents unique questions of both
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`validity and infringement. See D.I. 581 ("VLSI Br.") at 6-8.
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`Rather than address VLSI's validity arguments, Intel turns to misdirection,
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`stating the obvious: "claim 2 depends from claim 1 and therefore contains all
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`limitations recited in claim 1," so "defenses with respect to the many limitations in
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`common apply to both claims." Intel Op. at 15. But Intel again has it backwards.
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`What matters is the differences—not commonalities—and how they impact Intel's
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`defenses. Intel concedes "claim 2 requires … 'the cache memory is switchable to a
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`locked state,' which claim 1 does not recite." Id. Intel further concedes this unique
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`limitation leads to "differences in Intel's anticipation challenges" for Claims 1 and
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`2. Id. For example, Intel does not deny that it contends "Claim 1 is purportedly
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`anticipated by the Irie reference and, separately, by the Irie '277 reference," but
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`"does not contend that either of Irie or Irie '277 anticipates dependent Claim 2." VLSI
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`Br. at 7. Intel does not dispute that these "same defense[s] do[] not affect [Claim 2]
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`in substantially the same way." Katz, 639 F.3d at 1313.
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`VLSI has also shown Claim 2 presents unique questions of infringement. See
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`VLSI Br. at 7-8. Intel's Opposition ignores this.
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 8 of 16 PageID #: 20857
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`2.
`The '026 Patent
`VLSI has shown Claim 17 of the '026 Patent presents unique questions of both
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`validity and infringement. See VLSI Br. at 9-10.
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`Intel ignores VLSI's arguments. Without addressing VLSI's discussion of the
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`"non-overlapping limitation[s]," Intel contends "the more relevant comparison is
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`between claim 17 and elected claim 4." Intel Op. at 16. But Intel ignores VLSI's
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`entire discussion comparing precisely those claims, including specific Claim 4
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`limitations not included in Claim 17—e.g., "mode indicator generator," "leakage
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`indicator generator," and a "control circuit, connected to the mode indicator
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`generator and the leakage indicator generator." VLSI Br. at 10. Intel merely
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`provides bare assertions that these limitations allegedly do not "raise new issues of
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`noninfringement or invalidity" and that "Intel's noninfringement arguments for those
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`claims substantially overlap." Intel Op. at 16. But tellingly, Intel does not dispute
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`that it "alleges non-infringement of … Claim 4 based on these limitations, but those
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`defenses are inapplicable to … Claim 17." VLSI Br. at 10.
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`Nor does Intel dispute that Claim 4 (which depends on Claim 1) and Claim 17
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`(which depends on Claim 13) raise different validity issues. For example, "Intel
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`alleges that Claim 13 is anticipated by Kim, but does not allege that Kim anticipates
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`Claim 1." VLSI Br. at 10. Intel confusingly responds that, "[i]f the narrower claim
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`is invalid, so is the broader one." Intel Op. at 16. But Intel's obfuscation aside, the
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 9 of 16 PageID #: 20858
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`issue is quite simple: Intel asserts non-infringement defenses against Claim 4 that do
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`not apply to Claim 17, and it asserts invalidity defenses against Claim 17 that do not
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`apply to Claim 4. VLSI accordingly has a due process right to assert both claims.
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`3.
`The '633 Patent
`Dropping Claims 1 and 13 in the second narrowing left VLSI with no asserted
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`claims of the '633 Patent. Intel does not deny that, "[w]ithout reintroducing these
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`claims, VLSI will be denied of its due process rights in the '633 Patent entirely."
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`VLSI Br. at 11. Yet, through tortured logic, that is precisely what Intel advocates.
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`Intel says non-elected claims should not be compared to a "null set of claims."
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`Intel Op. at 14. That makes no sense. Claims 1 and 13 implicate VLSI's due process
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`rights because they raise unique issues both (a) relative to every elected claim, and
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`(b) relative to each other.
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`First, Intel does not dispute that "the '633 Patent and its claims are wholly
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`unrelated to all of the other asserted patents." VLSI Br. at 11. It is accordingly
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`undisputed that Claims 1 and 13 "raise unique issues vis-à-vis the elected claims."
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`Intel Br. at 14. VLSI thus indisputably has a due process right to assert at least one
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`'633 Patent claim in this litigation.
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`Second, VLSI has due process rights in both Claims 1 and 13—as opposed to
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`only one of them—because they "present unique questions of both infringement and
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`validity relative to each other." VLSI Br. at 11. Intel's assertion that "distinguish[ing]
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`one unelected claim from another has no bearing" on the Katz analysis is nonsensical
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`(Intel Op. at 14), as a patentee would not have a due process right to reintroduce
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`multiple claims that raise identical issues. For the same reason, Intel's assertion that
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`granting VLSI's motion would allow patentees to "drop all claims of asserted patents
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`and then freely re-assert them" is unsupportable (id.), because patentees must
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`show—as VLSI has done—that each reintroduced claim raises unique issues not
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`only relative to the elected claims, but also relative to each other.
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`4.
`The '552 Patent
`VLSI has shown Claim 11 of the '552 Patent presents unique infringement
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`issues. See VLSI Br. at 13-14. In response, Intel merely says it believes Claim 11
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`"substantially overlap[s]" with Claims 2 and 20. Intel Br. at 15. Notably, Intel does
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`not dispute that "Intel asserts non-infringement defenses for Claims 2 and 20 based
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`on … limitations … Claim 11 does not include." VLSI Br. at 13.
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`II. VLSI Has Provided "A Showing of Good Cause That Includes A
`Demonstration that [Reintroduction] Is Necessary To Vindicate [VLSI's]
`Due Process Rights"
`Intel Misstates Both This Court's Order and The Law
`The Court's Order requires "a showing of good cause that includes a
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`A.
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`demonstration that [reintroduction] is necessary to vindicate [VLSI's] due process
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`rights." D.I. 136 at 2 n.1. Yet, Intel argues that "a showing that the added claims
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`implicate VLSI's due process rights is necessary to establish good cause under the
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`Case Narrowing Order, but is not sufficient standing alone." Intel Op. at 9. Intel says
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 11 of 16 PageID #: 20860
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`the Court's words "showing of good cause that includes" require this. Id. But the
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`Court was plainly just describing what the "showing of good cause" required—i.e.,
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`a demonstration of due process rights, consistent with Katz.
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`Intel suggests Katz should be ignored because the Federal Circuit "affirmed a
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`district court's decision not to sever and stay." Intel Op. at 9. But Intel ignores that
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`"Katz did not file a motion to add claims with the requisite showing." Katz, 639 F.3d
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`at 1312. "Katz could have sought to demonstrate that some of its unselected claims
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`presented unique issues as to liability or damages. If, notwithstanding such a
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`showing, the court had refused to permit Katz to add those specified claims, that
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`decision would be subject to review and reversal." Id. at 1312-13. Because "Katz
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`made no effort to make such a showing," the Federal Circuit affirmed. Id. Here,
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`VLSI filed has made the requisite showing.
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`Intel nevertheless contends—without authority—that in addition to a Katz due
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`process showing, VLSI must identify "new evidence (e.g., source code) to which
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`VLSI did not previously have access that justifies adding the claims to the case now."
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`Intel Op. at 11; see also id. at 8 (arguing VLSI must show, "based on new evidence,
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`that it has a cognizable basis to assert [the] claims"). This argument lacks merit.
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`VLSI does not seek to assert new claims; it seeks to vindicate due process rights in
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`claims already asserted. VLSI asserted every claim at issue in its initial infringement
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`contentions, identifying ample evidence supporting its allegations. D.I. 278, Ex. 1.
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 12 of 16 PageID #: 20861
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`What Intel suggests is that, after a defendant produces documents and the plaintiff
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`discloses its asserted claims and infringement contentions based on that production,
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`the plaintiff could be forced to drop asserted claims that raise unique issues if the
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`plaintiff does not show new evidence "that post-date[s] the Case Narrowing Order."
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`Intel Br. at 11. That is illogical. A plaintiff who timely asserts claims in which it has
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`due process rights—based on evidence produced in the case—cannot reasonably be
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`forced to then dig up new evidence to avoid being stripped of its due process rights.
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`B.
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`Intel's Suggestion That VLSI's Motion Is "Untimely" Is Meritless
`Without meaningful explanation, Intel suggests VLSI's motion is "untimely."
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`Intel Op. at 10-11. Intel's arguments are unsupportable.
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`Waiver requires knowing relinquishment. VLSI has consistently emphasized
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`the opposite: that VLSI would not be giving up its due process rights. See D.I. 318,
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`VLSI Br. at 7-8. Recognizing this, the Court's Case Narrowing Order allowed VLSI
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`to move to reintroduce claims if necessary for due process. See D.I. 136 at 2 n.1.
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`Intel says "VLSI's true objection appears to be the Court's case narrowing"
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`(Intel Op. at 10), and it suggests VLSI should have "sought reconsideration of the
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`Case Narrowing Order" instead of filing this motion. Id. at 6. This makes no sense.
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`VLSI is not challenging the Case Narrowing Order, as the Court appropriately
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`provided that "Plaintiff may seek to add at a later date asserted claims … upon a
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`showing of good cause that includes a demonstration that the addition of the
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 13 of 16 PageID #: 20862
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`proposed new claims … is necessary to vindicate [its] due process rights." D.I. 136
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`at 2 n.1. VLSI filed this motion following the procedure the Court ordered.
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` Intel's suggestion VLSI should have filed this motion sooner also lacks merit.
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`Intel Op. at 11. The Court's Order required VLSI to make its second claim election
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`"30 days after the Court's issuance of a Claim Construction Order." D.I. 136 at 1.
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`That deadline was later extended to 15 days after an Amended Claim Construction
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`Order (VLSI Br. at 5 n.2), which the Court entered on December 19, 2019. D.I. 483.
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`VLSI thereafter timely served its second election, dropping the claims at issue while
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`expressly objecting to doing so, on January 3, 2020. D.I. 582, Ex. 1. VLSI then
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`promptly filed this motion on February 27, 2020. D.I. 581.
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`III.
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`Intel's Suggestion That Upholding Due Process Would Be Disruptive and
`Prejudicial Is Misguided
`Intel contends that reintroducing claims of the '633 Patent would only waste
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`resources because, in Intel's view, "VLSI's infringement theory is no longer viable
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`under the Court's claim construction." Intel Op. at 17. This argument is misguided.
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`First, Intel's Opposition is not a summary judgment motion. Second, the merits of an
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`infringement claim have no bearing on VLSI's due process right to have its claim
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`litigated on the merits, even if that were to mean resolution on summary judgment.
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`Notably, VLSI "reserves the right to appeal any and all matters decided by the Court"
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`(VLSI Br. at 5), including the construction of "serial communications interface."
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 14 of 16 PageID #: 20863
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`Intel Op. at 17. VLSI has a right to have its claim litigated on the merits under the
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`Court's construction, including to ensure that the issues are ripe for appeal if needed.
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`Intel's "disruptive impact" argument is also unsupportable. Intel Br. at 17.
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`Intel argues that discovery has proceeded for "fifteen months" and that, "[w]ith the
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`elected claims in mind, … Intel served interrogatories, requests for production, and
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`more than a dozen subpoenas." Id. But the five claims at issue were all in the case
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`until VLSI's second election on January 3, 2020. D.I. 582, Ex. 1. Intel has served no
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`discovery requests since, nor does it identify anything meaningful that has changed.
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`IV.
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`If Not Reintroduced, The Claims At Issue Must Be Severed And Stayed
`VLSI has shown the claims at issue "present[] unique issues as to liability."
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`Katz, 639 F.3d at 1312. Thus, "due process requires [VLSI] be allowed to litigate
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`the unselected claims either in this case or in subsequent actions." Id. at 1310.
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`If not reintroduced, the claims must be severed and stayed to preserve VLSI's
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`due process rights. Intel concedes this is the "usual practice" in the Eastern District
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`of Texas and that this Court has also recognized the procedure. Intel Op. at 20 n.8.
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`Intel wants to bar VLSI from litigating unique claims, yet still adjudicate them with
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`prejudice. That would be unfair to VLSI and antithetical to due process.
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`Dated: March 20, 2020
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`Respectfully submitted,
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`/s/ Michael J. Farnan
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 15 of 16 PageID #: 20864
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`Brian E. Farnan (Bar No. 4089)
`Michael J. Farnan (Bar No. 5165)
`FARNAN LLP
`919 N. Market St., 12th Floor
`Wilmington, DE 19801
`Telephone : (302) 777-0300
`Fax : (302) 777-0301
`bfarnan@farnanlaw.com
`mfarnan@farnanlaw.com
`
`Morgan Chu (admitted pro hac vice)
`Benjamin Hattenbach (admitted pro hac vice)
`Iian D. Jablon (admitted pro hac vice)
`Christopher Abernethy (admitted pro hac vice)
`Amy E. Proctor (admitted pro hac vice)
`Dominik Slusarczyk (admitted pro hac vice)
`S. Adina Stohl (admitted pro hac vice)
`Leah Johannesson (admitted pro hac vice)
`Charlotte J. Wen (admitted pro hac vice)
`Brian M. Weissenberg (admitted pro hac vice)
`IRELL & MANELLA LLP
`1800 Avenue of the Stars, Suite 900
`Los Angeles, California 90067
`Telephone: (310) 277-1010
`Facsimile: (310) 203-7199
`mchu@irell.com
`bhattenbach@irell.com
`ijablon@irell.com
`cabernethy@irell.com
`aproctor@irell.com
`dslusarczyk@irell.com
`astohl@irell.com
`ljohannesson@irell.com
`cwen@irell.com
`bweissenberg@irell.com
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`Attorneys for Plaintiff
`VLSI Technology LLC
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`Case 1:18-cv-00966-CFC-CJB Document 602 Filed 03/27/20 Page 16 of 16 PageID #: 20865
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`CERTIFICATE OF COMPLIANCE
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`In accordance with the Court’s November 6, 2019 Standing Order Regarding
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`Briefing in all Cases, I, Michael J. Farnan, hereby certify that the following is true
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`and correct as to the foregoing document, titled "REPLY BRIEF IN SUPPORT OF
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`PLAINTIFF VLSI TECHNOLOGY LLC'S SECOND MOTION TO
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`REINTRODUCE CERTAIN ASSERTED PATENT CLAIMS, OR TO SEVER
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`SUCH CLAIMS
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`INTO A SEPARATE ACTION TO BE STAYED"
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`("VLSI's Reply Brief"):
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`VLSI's Reply Brief is set forth in 14-point, Times New Roman font. VLSI’s
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`Reply Brief includes 2,498 words.
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`Dated: March 20, 2020
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`/s/ Michael J. Farnan
` Michael J. Farnan
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