The Newton and the Hare»
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`Negative reviews are bad enough. but
`when your company's new product is ridi-
`culed for a whole week in Doonesbury, you
`know you've got a public~relations disaster.
`Most products wouldn‘t survive such a
`withering blast. But Apple keeps plugging
`away with the Newton MessagePad keep
`ing a low profile while building for a hope
`fully brighter future.
`‘Peopleask me what it's like to work
`on the Newton,” says Steve Capps, an Ap
`ple Fellow (senior scientist). “l tell them
`l'm thick-skinned but not thickheaded.
`
`Weve got to stick with the Newton but be
`wise about it.”
`
`Although the Newton MessagePad has
`not lived up to its early promises, it has
`quietly moved to the forefront of the em-
`bryonic market for PDAs (personal digital
`ssistants). Rivals such as the E0 (owned
`by AT&T) have dropped out, and other com-
`petitors postponed their plans when they
`
`comparable ClSC processors, so they cost
`less to make.
`
`Furthermore. say RISC proponents. the
`price/perfomiance gap between CISC and
`RISC is widening. They claim that CISC
`in general. and the l6-ycar-old x86 archi-
`tecture in particular. is on a flattening curve
`that will not keep pace with RISC. Apple
`says its first Power Macs with PowerPC
`Wand 620 chips—which are planned for
`1995 and l996—will blow away the ln-
`tel-based boxes and make this fork in the
`road crystal—clear to even the most loyal
`PC devotee.
`.
`The truth is not quite so clear-cut. how—
`ever. For one thing, the manufacturing
`costs of microprocessors are determined
`by volume as well as die size. and nobody
`approaches Intel's volumes. Dataquest says
`lntel holds 74 percent of the worldwide
`microprocessor market, followed by Mo-
`torola. which has 8 percent. Part of the
`reason why Pcntiums cost
`
`ing vertical marketsto subsidize the de-
`velopers. applications licensees, verticat- _
`market users and experience.
`velopment of trueconstimer PDAs NevIrton
`The Newton“ 5 greatest strength is its
`’MessagePadsare being uSed bv soybean .
`operating system: perhaps the most ad—
`' farmerslto manage crops, by teleph
`.
`vanced on any personal computing device.
`technicians to communicate with central 0 -
`'lt's CPUindependent and programs that .
`flees, by medical workers to record patient
`p are run on it don‘t have to be recompiled
`data. and by real estate salespeople to
`for different processor architectures. lt’ s 2
`retrieve listings.
`_
`PDAs will lnevitably succeed and be-
`oriented around the task, not the applica :-
`. come as widespreadas calculators and
`tion so users can switch seamlessly among
`programs. its persistent object database 1"
`{Walkmans are now; the only question is
`_ eliminates the hassles of file management ’
`Whether Apple'scommitment (or. indeed,
`and incompatible rIle fortnats. And its user
`Apple) Will last that long Capps thinks
`interface is deceptively'powerful. while .
`it will. “[Apple CEO Michael] Spindler re-"
`shielding users from consting hardware ,
`ally gets it, says Capps. “He Understands
`details. in fact, the NeWton gives us a peek
`that you have to think. long-term about
`at the kind of operating systems we ll see
`the Newton. You have to be very Japan-
`ese about this, thinking'long-term while
`on future desktops.
`_
`the product matures."
`Without much fanfare. Apple is leverag-
`
`
`
`saw what happened to the Newton. That's '
`giving Apple an opportunity'to retrench and 1
`build a solid foundation of software de-
`
`A
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`‘
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`more than RISC chips may be that Intel’
`is simply amortizing its expensive chip
`factories more quickly. At Si billion per
`factory. that‘s no small factor.
`What‘s even more important is the fact
`that the architectural differences between
`CISC and RISC are becoming rather fuz-
`zy. The newest x86-compatiblc chip is the
`K5 from Advanced Micro Devices (Sun-
`nyvale. CA). it's virtually a pure RISC dc--
`sign: quad-issue superscalar pipelines, five
`' parallel functional units. dynamic branch
`prediction. speculative execution. out-of»
`order execution. an expanded register file.
`and large primary caches. To feed this
`core. the K5 has an ingenious decoder that
`reduces complex x86 instructions to RISC-
`like operations that issue in parallel (see
`“AMD vs. Supennan.“‘Novcmber BYTE).
`The latest x86 chips from Cyrix (Richard-
`son TX) and Nechn (Milpitas. CA) are
`similar CISC/RISC hybrids.
`-
`CPU design
`
`is so wide open that there is no architec-’
`tural technique used in RISC processors
`that doesn’t find its way into CISC chips.
`The only real difference goes back to the
`original definitions of CISC and RISC,
`which stated the relative complexity of
`the instruction sets. CISC chips still must
`devote more cycles and transistors to de-
`coding complcx, variable-length instruc—
`tions. But even that distinction is mini-
`
`mized by modern compilers which generate
`most of their code using a subset of faster
`simpler instructions.
`If CISCisntdying. RISC fans counter,
`then why did lntel recently form a part-
`nership with Hewlett-Packard to develop
`a new microprocessor based on HP‘s Pre- ‘
`cision Architecture RISC technology?
`Again this question dodges the basicissue
`which isn ‘t really RISC versus CISC at
`all. For one thing, the jointly
`developed Intel/HP chip may
`‘not fall‘neatly into
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`BANA/P C1020 '
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