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`In re Patent of: Al Petrick
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`U.S. Patent No.: 5,712,870
`Case No.:
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`IPR2014-00548
`Issue Date:
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`January 27, 1998
`Appl. Serial No.: 09/509,462
`Filing Date:
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`July 31, 1995
`Title: PACKET HEADER GENERATION AND DETECTION CIRCUITRY
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`REPLY DECLARATION OF PROF. ZHI DING
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`1.
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`I have reviewed the “Patent Owner Response” and “Declaration of
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`Ghobad Heidari, Ph.D.” filed on March 3, 2015. Applying the standards and legal
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`principles that I applied when drafting the declaration entitled “Declaration of Prof.
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`Zhi Ding” dated March 27, 2014, which were outlined in paragraphs 4, 14, 91-94
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`of that document, for example, I found various inaccurate and/or misleading
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`statements in both the Patent Owner’s Response and Dr. Heidari’s March 3, 2015
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`Declaration. Below, I address some of these statements.
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`I.
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`2.
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`Fischer’s Coherent Demodulator 114 Converts Spread Spectrum
`Modulated Signals from Analog to Digital
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`Patent Owner’s Response states that “there is no disclosure that the
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`alleged analog-to-digital converters (i.e., the comparators) are acting on . . . spread
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`spectrum modulated analog signals, as opposed to other analog signals (e.g.,
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`despread analog signals or other types of analog signals).” See Resp. at 13. This
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`argument presumes facts that are untrue. For instance, this argument presumes that
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`Page 1 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`Fischer’s demodulator 114 does not convert a DSSS format signal from analog to
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`digital. However, at lines 56-63 of column 16 and lines 58-60 of column 17,
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`Fischer describes conversion by its coherent demodulator 114 of DSSS messages
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`received by RF modem 96 into digital I and Q data, and subsequent de-spreading
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`of those converted signals by spread spectrum correlator and decoder 130 of spread
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`spectrum controller 116. See Ex. 1004, 16:58-63, 17:58-60.
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`3.
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`In greater detail, Fischer discloses that “[t]he communicators
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`preferably transmit and receive messages over a wireless physical layer provided
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`by a direct-sequence, spread spectrum (DSSS) radio data link.” Ex. 1004, 14:24-
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`27. These DSSS messages “are transmitted to and received by the communicators
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`at the RF modem 96,” which “preferably has at least two antennas 100 and 102.”
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`Ex. 1004, Fig. 4 and 15:4-6. As shown in FIG. 5, the signals received by antennas
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`100 and 102 are input to coherent demodulator 114 after passing through switch
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`103, conventional RF filter 104, switch 106, low noise amplifier 108, filter 110,
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`and radio device 112. See Ex. 1004, FIG. 5, 16:20-42. Based on the description in
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`Fischer, one of ordinary skill in the art would have understood that none of these
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`components are configured to de-spread the analog signal received by antennas
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`100/102. See id.
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`4.
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`Rather, these components simply process the incoming signals,
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`leaving the data signals received by coherent demodulator 114 in their DSSS
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`Page 2 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`baseband form consisting of I and Q components. In fact, Fischer explicitly
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`describes de-spreading the received DSSS modulated signals only after they are
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`output as digital I and Q data by the coherent demodulator 114. See Ex. 1004,
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`17:58-60. In particular, comparators within the coherent demodulator 114
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`“establish digital waveforms and provide in-phase and quadrature phase data
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`outputs in a form compatible with the other digital components of the
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`communicator.” Ex. 1004, 16:60-63. The still-spread output from coherent
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`demodulator 114 is received and despread by a decoder that is aptly named the
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`spread spectrum correlator and decoder 130 within spread spectrum controller 116,
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`which despreads the signals. See Ex. 1004, 17:58-60 (“spread spectrum correlator
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`and decoder 130 handles the demodulator 114 output to regenerate the unspread
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`data.”) (emphasis added). Fischer further discloses a specific embodiment of
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`spread spectrum correlator and decoder 130, and, in that embodiment, the signal is
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`demodulated by a circuit (106) before being despread. See Ex. 1004, 17:62-65
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`(“The spread spectrum correlator and decoder 130 preferably employs the
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`technology described in U.S. Pat. No. 4,649,549.”). That is, in this embodiment, a
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`demodulator and chip rate clock extractor 106 functions as the coherent
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`demodulator 114 of Fischer, and circuit 106 does not despread the DSSS signal
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`that it demodulates.
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`Page 3 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`In seeing that Fischer does not de-spread the digitized in-phase and
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`5.
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`quadrature phase data until after it is processed and output by the coherent
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`demodulator 114 and the spread spectrum correlator and decoder 130, a person of
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`ordinary skill would have understood that the signal passing through the
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`comparators contained in the coherent demodulator 114 necessarily remains in
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`spread spectrum baseband form. In fact, properly considering the full disclosure of
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`Fischer, a person of ordinary skill would have understood Fischer to describe that
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`the demodulator 114 converts the analog DSSS modulated RF signals received by
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`antennas 100/102 to digital signals and outputs these digital DSSS signals in I and
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`Q format to spread spectrum correlator and decoder 130.
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`II.
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`Nakamura’s Switch Transfer Mechanism Is Suitable For Timing
`A Transition Between BPSK Demodulation And QPSK
`Demodulation
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`6.
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`In his declaration, Dr. Heidari states that a “person of ordinary skill
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`would understand that the switch transfer mechanism (including timer 34, band-
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`pass filter 31, comparator 32, and threshold generator 34 [sic] in Nakamura) is too
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`imprecise for transitioning a demodulator from BPSK demodulation to QPSK
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`demodulation.” Ex. 2006, ¶ 77. However, considering the processing performed
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`by Fischer’s RF modem 96 and the noise suppression techniques described by
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`Nakamura, a person of ordinary skill in the art would have expected the timing
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`Page 4 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`mechanism described by Nakamura to time a transition with sufficient precision
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`under most, if not all, channel conditions.
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`7.
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`Importantly, Dr. Heidari’s analysis of Nakamura’s switching
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`mechanism does not take into account its use within the proposed combination
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`with Fischer. As set forth in my March 27 declaration, a person of ordinary skill in
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`the art would have modified Fischer’s coherent demodulator 114 to include
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`Nakamura’s PLL. See Ex. 1003, ¶¶ 60-61. One of skill would understand that
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`such integration retains various components of Fischer’s RF modem 96, including
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`those responsible for processing signals to be received at the receiving terminal 1
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`of Nakamura’s PLL. See Ex. 1004, FIG. 5.
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`8.
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`For example, Fischer describes processing received signals with an
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`RF filter 104, a low noise amplifier 108, a filter 110, and a radio device 112, which
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`amplifies the received signals. See Ex. 1004, 16:34-41. In conjunction with the
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`band-pass filter 31 of Nakamura, the resulting circuit would sufficiently mitigate
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`noise and adverse channel effects, if those characteristics were present in a
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`received DSSS signal. To this point, Nakamura describes that its “comparator 32
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`and threshold generator 33 are provided for the sake of preventing an erroneous
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`operation due to noise signals and the like, and the output threshold of the
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`threshold generator 33 is set to a predetermined level in accordance with a noise
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`level.” Ex. 1005, 6:25-30.
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`Page 5 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`Accordingly, one skilled in the art would recognize that the circuit
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`9.
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`resulting from the combination of Fischer’s coherent demodulator and Nakamura’s
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`PLL would reduce noise and adverse channel effects to such a degree that the
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`combined circuit would be readily able to detect a transition between BPSK
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`demodulation and QPSK demodulation.
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`III. Proper Combination of Fischer and Nakamura
`10. The Patent Owner Response states that “Fischer nowhere suggests
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`that any particular implementation of its RF modem 96 supports both BPSK and
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`QPSK, as required by each of claims 1, 10, and 17.” Resp., p. 2. This is factually
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`inaccurate. Fischer discloses “internal program registers 124 [that] allow settings
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`to be recorded therein through the interface 122 to configure functionality of the
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`spread spectrum controller 116 in many respects, for example, . . . selecting the
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`type of modulation . . . .” See, e.g., Ex. 1004, 16:43-45, 17:35-43. Accordingly,
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`although Fischer describes using “either” BPSK or QPSK, it would be apparent to
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`one of ordinary skill in the art that Fischer’s RF modem 96 is capable of processing
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`BPSK and QPSK, as it would be nonsensical for the spread spectrum controller
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`116 to be selectable between these modulation modes without the other
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`components of the RF modem 96 being capable of operating in both. Moreover,
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`by disclosing selection among types of modulation, Fischer demonstrates that a
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`Page 6 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`person of ordinary skill in the art knew how to configure the RF modem 96 to
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`demodulate each of BPSK and QPSK. See Ex. 1004, 16:4-19.
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`IV. Dr. Heidari’s Proposed Use of Nakamura’s PLL Necessarily
`Includes Redundancies a Person of Ordinary Skill Often Seeks to
`Avoid
`11. On page 25 of his declaration, Dr. Heidari introduces an illustration he
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`asserts “shows where a person of ordinary skill would use Nakamura’s carrier
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`recovery PLL circuit, as shown in Fig. 4, in a receiver chain.” Ex. 2006, ¶ 53.
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`This drawing is misleading to the extent that it suggests that Nakamura’s PLL
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`would necessarily be limited to only providing carrier recovery to a down
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`converter in the analog RF front-end of a receiver.
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`12.
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`In particular, Dr. Heidari’s drawing overlooks that Nakamura’s PLL
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`performs functions that can be used in—or even replace—various components in
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`the receiver chain he has illustrated. A person of ordinary skill in the art would
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`understand that using Nakamura’s PLL in the limited fashion Dr. Heidari proposes
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`would create unnecessary redundancies within the receiver circuit chain. To
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`illustrate this point below, I highlight circuits of Nakamura’s PLL that would
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`replace (or be positioned within) receiver chain components shown by Dr.
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`Heidari’s drawing (i.e., the analog RF front-end, the analog baseband, and the
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`digital back-end).
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`Page 7 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
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`13. Mixers 2/4 and low-pass filters 4/5 of Nakamura output a down-
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`converted baseband signal, thus serving the function attributed by Dr. Heidari to
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`mixers that are separately illustrated in his drawing. That is, Dr. Heidari asserts
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`that the down converter (“e.g., mixers”) of his drawing “use[] the output of the
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`VCO 16 to down convert the analog modulated RF signal into an analog baseband
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`modulation waveform.” Ex. 2006, ¶ 54. However, this function is already
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`performed by Nakarmura’s mixers 2 and 4 and low-pass filters 4 and 5, which
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`output the down-converted baseband signal. With an appreciation that Nakamura’s
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`mixers and filters would perform the functions attributed by Dr. Heidari to the
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`down converter depicted by its drawing, a person of ordinary skill would not limit
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`the application of Nakamura’s circuit to only provide a reference RF carrier at the
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`receiver for frequency down converting, as suggested by Dr. Heidari.
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`Page 8 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`14. Similarly, Dr. Heidari asserts that the analog baseband section
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`performs “one or more of, for example, filtering, signal conditioning, and
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`amplifying.” Ex. 2006, ¶ 54. However, this function is performed by Nakarmura’s
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`low pass filters 4 and 5. As with the down converter described above, a person of
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`ordinary skill would not be inclined to introduce redundant circuitry to serve as an
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`analog baseband section; rather, they would be led to leverage the filters of
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`Nakamura for at least the purposes of filtering that are attributed by Dr. Heidari to
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`the analog baseband section shown in his drawing.
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`15. During his deposition, Dr. Heidari stated that low pass filter in the
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`analog baseband component “must be structural different to do a different task”
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`than the low pass filter in the down converter. Ex. 1012, 159:12 to 160:5. This is
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`not accurate. Rather, while enabling down conversion, a person of ordinary skill
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`would understand that these low-pass filters 4 and 5 also perform the filtering Dr.
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`Heidari describes with regard to the analog baseband. Furthermore, it is not
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`required that the signal pass through two separate low-pass filters.
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`16.
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`In yet another example, Dr. Haidari asserts that “resultant baseband
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`signal then arrives at the digital baseband section, which may be configured to
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`perform one or more functions, including, for example, A/D conversion,
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`demodulation, de-scrambling, and decoding.” Ex. 2006, ¶ 54. This function also
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`is performed by a component of Nakarmura’s PLL, namely its A/D converters 41
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`Page 9 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`and 42. If Nakamura’s PLL were used in the manner suggested by Dr. Heidari’s
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`drawing, the signal would have to be down converted into I and Q data and
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`converted to digital format twice, first time by A/D converters 41/42 of
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`Nakamura’s PLL and second time by the downstream digital baseband section of
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`Dr. Heidari’s drawing. Persons of ordinary skill would understand that this (and
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`the other mentioned configurations) would result from Dr. Heidari’s drawing,
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`leading to unnecessary redundancies in the circuit. In circumstances where
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`hardware cost, complexity, and power consumption are important design
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`considerations, a person of ordinary skill would seek to avoid the redundancies
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`inherent Dr. Heidari’s proposed use of Nakamura’s PLL.
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`V.
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`Nakamura’s Detection of Repetitive Duration in the Preamble is a
`Form of Bit Pattern Detection
`17. Dr. Heidari states that “a person of ordinary skill would not equate
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`“detecting the repetitive duration of the preamble,” as referenced by Nakamura,
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`with “bit pattern detection.” Ex. 2006, ¶ 69. However, Dr. Heidari’s attempt to
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`distinguish between detection of a pattern in demodulated digital form and
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`modulated analog form is semantic, as both forms represent an underlying pattern
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`of bits. In particular, Nakamura describes a “repetitive duration in which ‘0’ and
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`‘1’ are repeated.” Ex. 1005, 2:23-24. Since ‘0’ and ‘1’ (in this context) are the
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`values of the bits within the transmitted data stream and the repetition of these bits
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`creates a pattern, Nakamura’s repetitive duration is indeed a bit pattern, regardless
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`Page 10 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`of modulation or format. Furthermore, by “detecting the repetitive duration of the
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`preamble,” Nakamura’s circuit necessarily detects the bit pattern represented by
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`the repetitive duration. As such, Nakamura detects the repetitive duration and
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`describes such detection as useful in transferring switch 14.
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`VI. The Digital Baseband Processor 80 Determines the Best Antenna
`for Reception
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`18.
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`In his declaration, Dr. Heidari states that the “invention of the ’870
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`patent also has benefits directed to its antenna diversity scheme.” Ex. 2006, ¶ 20.
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`Citing to claim 7, Dr. Heidari indicates that “the efficiencies of integration allow
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`for each antenna to use a portion of the preamble of a message for determining the
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`best antenna for reception and then to use the best antenna for the rest of the data
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`signal of the same message.” Id. However, a person of ordinary skill would know
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`that an antenna itself would not “determin[e] the best antenna for reception.”
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`Rather, “to evaluate during the header portion of the message the signals received
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`from plural antennae and to select one of said antennae for use during the receipt of
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`the data portion of the same message,” as recited in claim 7, would be performed
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`by a structure other than the antenna itself, as described by the ‘870 patent, which
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`describes the DSSS baseband processor 80 performing this selection function.
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`VII. Correction of Typographical Error in March 27 Declaration
`19.
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`It has come to my attention that there is a typographical error in
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`paragraph 93 of my original declaration. For purposes of my analysis in my
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`Page 11 of 12
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`Attorney Docket No.: 27410-0023IP1
`U.S. Patent No. 5,712,870
`original declaration and this declaration, I applied a date of July 31, 1995, not the
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`date of October 4, 1996.
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`VIII. Conclusion
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`I hereby declare that all statements made herein of my own knowledge are
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`true and that all statements made on information and belief are believed to be true;
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`and further that these statements were made with the knowledge that willful false
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`statements and the like so made are punishable by fine or imprisonment, or both,
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`under Section 1001 of Title 18 of the United States Code.
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`Signature: _/Zhi Ding /___________ Date: ___June 16, 2015______
` Zhi Ding, PhD
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`Page 12 of 12
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