IPR2015-01094, Paper No. 47
`October 4, 2016
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`trials@uspto.gov
`571-272-7822
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`RECORD OF ORAL HEARING
`UNITED STATES PATENT AND TRADEMARK OFFICE
`- - - - - -
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`AMERICAN MEGATRENDS, INC., MICRO-STAR
`INTERNATIONAL, CO., LTD., MSI COMPUTER CORP.,
`GIGA-BYTE TECHNOLOGY CO., LTD., and G.B.T., INC.
`Petitioners
`vs.
`KINGLITE HOLDINGS INC.
`Patent Owner
`- - - - - -
`Case IPR2015-01094
`Patent 6,401,202
`Technology Center 2100
`- - - - - -
`Oral Hearing Held: August 1, 2016
`
`Before: TREVOR M. JEFFERSON, BRIAN J.
`McNAMARA, and JOHN LEE, Administrative Patent Judges
`The above-entitled matter came on for hearing on Monday,
`August 1, 2016 at the U.S. Patent and Trademark Office, 600 Dulany Street,
`Alexandria, Virginia in Courtroom A, at 1:00 p.m.
`REPORTED BY: KAREN BRYNTESON, RMR, CRR,
`
`FAPR
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`October 4, 2016
`
`trials@uspto.gov
`571-272-7822
`
`
`
`RECORD OF ORAL HEARING
`UNITED STATES PATENT AND TRADEMARK OFFICE
`- - - - - -
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`- - - - - -
`AMERICAN MEGATRENDS, INC., MICRO-STAR
`INTERNATIONAL, CO., LTD., MSI COMPUTER CORP.,
`GIGA-BYTE TECHNOLOGY CO., LTD., and G.B.T., INC.
`Petitioners
`vs.
`KINGLITE HOLDINGS INC.
`Patent Owner
`- - - - - -
`Case IPR2015-01094
`Patent 6,401,202
`Technology Center 2100
`- - - - - -
`Oral Hearing Held: August 1, 2016
`
`Before: TREVOR M. JEFFERSON, BRIAN J.
`McNAMARA, and JOHN LEE, Administrative Patent Judges
`The above-entitled matter came on for hearing on Monday,
`August 1, 2016 at the U.S. Patent and Trademark Office, 600 Dulany Street,
`Alexandria, Virginia in Courtroom A, at 1:00 p.m.
`REPORTED BY: KAREN BRYNTESON, RMR, CRR,
`
`FAPR
`
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`ON BEHALF OF THE PETITIONERS:
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`VIVEK GANTI, ESQ.
`STEVEN G. HILL, ESQ.
`Hill, Kertscher & Wharton LLP
`3350 Riverwood Parkway, Suite 800
`Atlanta, Georgia 30339
`770-953-9995
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`ON BEHALF OF THE PATENT OWNER:
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`APPEARANCES:
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`CHRISTOPHER FRERKING, ESQ.
`174 Rumford Street
`Concord, NH 03301
`603-706-3127
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`GEORGE C. SUMMERFIELD, ESQ.
`Stadheim & Grear, Ltd.
`400 N Michigan Avenue, Suite 2200
`Chicago, IL 60611
`312-755-4400
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`P R O C E E D I N G S
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`(1:00 p.m.)
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`JUDGE JEFFERSON: Please be seated.
`We're on the record. Good afternoon, judge
`Jefferson, McNamara, and Lee presiding. May I get
`appearances from counsel for Petitioner?
`MR. HILL: Yes, Steve Hill.
`MR. GANTI: Vivek Ganti.
`JUDGE JEFFERSON: And for Patent Owner?
`MR. SUMMERFIELD: George Summerfield,
`backup counsel.
`MR. FRERKING: Chris Frerking.
`JUDGE JEFFERSON: Thank you.
`We are here for IPR2015-01094 for U.S. Patent
`6,401,202. We have given 45 minutes per side for the party --
`each party. Petitioner, bearing the burden, will go first, on the
`grounds of Institution and any motion to exclude that you want
`to discuss. You may reserve time for rebuttal.
`The Patent Owner will follow with response to the
`challenges, substantive challenges, motion to exclude and
`motion to amend. You also may reserve time for rebuttal, only
`as to those issues in which you have grounds for movement.
`Petitioner will follow with any reply -- I'm sorry -- rebuttal on
`the grounds and response to the motion to amend and the
`response to any of the responses to your motion to exclude,
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`should you choose to make them. And, likewise, Patent Owner
`then has rebuttal time only as to motions to the motion to
`exclude.
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`We're going to go ahead and get started on the
`record and Petitioner, you are up first. Would you like to
`reserve some time for rebuttal?
`MR. HILL: Yes, I will reserve 20 minutes for
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`rebuttal.
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`JUDGE JEFFERSON: With your indulgence, give
`me time to work the magic. We try to keep track both ways.
`But obviously the lights give you a warning down to red. With
`that, we will go on the record and get started.
`MR. HILL: Thank you. Does everyone have the
`Petitioner's demonstrative exhibit? I will refer to the slides of
`that exhibit by the PDF page number on the file.
`The '202 patent in broad terms seeks a monopoly
`on the use of a timer-based task that is capable of interrupting
`a preexisting operation of a computer.
`And for the reasons set forth in the petition and in
`the Board's Institution decision, the broadest claims of the
`'202 patent are subject to cancellation.
`We presented multiple grounds for this. I am
`going to begin by looking first at the independent claims of
`the '202 patent itself. Then I'm going to talk about ground 1,
`which relates to the AMIBIOS reference and how it anticipates
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`these claims. And, finally, time permitting, I will briefly talk
`about the Pearce reference and the one issue that remains
`relating to the Pearce reference in ground 2.
`First, if you would look at slide 2 of our
`demonstrative exhibits, it shows a side-by-side depiction of
`the four independent claims of the '202 patent. Now, right off
`the bat, I want to address the argument in the Patent Owner's
`response about the fact that the multi- tasking of these claims
`needs to be performed by a processor.
`That limitation is met by both AMIBIOS and
`Pearce. However, it is important to note that the limitation by
`a processor in relation to multi- tasking really only has
`patentable weight in claims 11 and 21. In claims 1 and 31, it
`is either in the preamble of the claim or it is not in the claim
`at all, as in the case of claim 31.
`But let's not have any misunderstanding about what
`BIOS does as it relates to both the prior art references that we
`claim are anticipatory. BIOS code includes code which is
`executed by the processor for initializing hardware, including
`the initialization of the programmable interval timer. It
`includes code for setting up the vector table that consists of
`the interrupt service routines that are run during the BIOS.
`And those routines are essentially software, so they too are
`executed by the processor when an interrupt calls them.
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`And, lastly, the BIOS code includes code for
`causing the processor to perform the power on self-test, all the
`way through the loading of the operating system, a process
`that we commonly refer to as boot-up or BIOS boot-up.
`So the BIOS code is, in fact, executed by the
`processor at every step of the way. And if we look at slide 3,
`we see that in each of the independent claims at issue, there
`are essentially three basic limitations that are being -- that are
`being patented.
`The first is enabling interrupt signals at a
`predetermined time, which is met when you initialize a
`programmable interval timer, such that the timer sends a signal
`to the processor at predetermined intervals that are either
`programmed by default within the timer or reprogrammed by
`the processor during BIOS.
`Second, performing a task in response to an
`interrupt signal. In other words, the hardware timer sends a
`signal on a predetermined interval to the processor. The
`processor reads the hardware line, IRQ0, from that system
`timer and goes to the vector table where it sees that it is to run
`the interrupt service routine that is commonly referred to as
`INT 08h.
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`That is a service routine that is comprised of a
`series of tasks, all of which are then performed by the
`processor.
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`Finally, the claim recites performing a second task
`in between the successive interrupt times, so if the
`programmable interval timer is sending a signal to the
`processor at 18.2 times per second, every time the processes
`that are run by INT 08h in response to that system timer
`expire, the computer then resumes its normal operations.
`And in the preferred embodiment, that is, in fact,
`the POST through loading of the operating system or what we
`would refer to as normal uninterrupted BIOS operation.
`So the evidence here shows that AMIBIOS
`initializes the hardware timer, programs it, or permits it to use
`the default timing mechanism, which the Intel 8254 was known
`in the art to send a timer signal pulse to the processor 18.2
`times per second, and then provide the interrupt service
`routine in response to each one of those timed signals that is
`commonly known as INT 08H.
`That is a software routine that matches literally to
`element 540 of figure 5 of the preferred embodiment of the
`'202 patent, which describes an interval- based interrupt
`service routine. And it further provides access to user
`routines through an associated task that is called INT 1Ch,
`which is commonly called the timer tick program, but also is
`used in practical application by programmers to hook in
`additional routines that are tied to the timer.
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`JUDGE JEFFERSON: Counsel, while we're here,
`thinking about these basic claim limitations, with respect to at
`least claims 1, 11, and 21, are all the steps in the claims
`required to be performed in BIOS or only in BIOS?
`MR. HILL: No.
`JUDGE JEFFERSON: Why not?
`MR. HILL: We don't believe that's true. First of
`all, we don't -- we don't take the position that claim 1 is
`entitled to patentable weight and the -- it was not
`demonstrated in the Patent Owner's response any reason why
`the preamble of claim 1 should have patentable weight.
`The question of what "in BIOS" is something that
`we should discuss. In the context of AMIBIOS, I don't think
`that it can be -- I don't think it can be questioned what is
`happening. And their technical expert that I will show through
`slides representing his deposition testimony testified that the
`activities that AMIBIOS was describing, both in terms of the
`POST and in terms of the system level tasks that are executed
`in response to the INT 08h ISR, they are all in BIOS during
`the course of loading the operating system.
`In Pearce, you have a more complicated system
`that's being described because you are no longer talking about
`pre- OS. You are now talking about something that can run in
`run time.
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`The application that is described, there are two
`components in Pearce, as you know. You have the application
`and you also have SMM, system management mode. Now, it is
`commonly known in the art that system management mode is
`operated by the BIOS. That is a part of BIOS code.
`So that would be in BIOS without question. The
`application, I don't believe that it specifically says that the
`application is a BIOS application or an application that is --
`that is running through the operating system, but in either
`way, the call that is being made by the application is not an
`operating system functionality, but is instead an extensible
`BIOS call or XBIOS as it is commonly known.
`In fact, it is actually described in column 1 of the
`'202 patent, that a part of BIOS includes what are called
`run-time services, meaning that just because you have the
`operating system and you have an application running doesn't
`mean that you are not in BIOS.
`You are still in BIOS. You are in BIOS run- time.
`So, for example, if I could just give you an easy illustration of
`this, let's say you are using Microsoft Word. You are pressing
`key strokes, right? Every one of these key strokes is invoking
`BIOS because the BIOS is what communicates to the hard --
`between the hardware and the actual -- and the actual
`processor to get the key strokes on to the screen. So you are
`never really out of BIOS in Pearce.
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`JUDGE JEFFERSON: So without turning to the
`prior art, specifically, although I understand your argument,
`and I thank you for that, does claims 11 and 21 then, do those
`two claims require that all the steps be performed in BIOS?
`MR. HILL: They require that there be
`multi-tasking in the context of BIOS. However --
`JUDGE JEFFERSON: What does that mean?
`MR. HILL: Well, I think what it means is exactly
`what column 1 describes, which is that the multi-task, since
`BIOS is known to cover both booting of the operating system
`and the run- time services during the application, as long as
`you are talking about something that involves a BIOS service,
`you are in -- you are in BIOS, essentially, as opposed to
`something that would be -- something that would be happening
`at the application layer that would not be invoking a BIOS
`call.
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`XBIOS calls are made through the application of
`Pearce. And that is in BIOS. So with -- if I could turn back to
`the AMIBIOS in ground 1, the last element, performing a
`second task in between the successive interrupt times at a high
`level, this is met by the AMIBIOS teaching of POST and the
`loading of the operating system, which is what is known as
`INT 19. It is also described in its own chapter within
`AMIBIOS.
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`When we -- one of the things that was argued by
`the Patent Owner is that from a claim construction standpoint,
`the multi- tasking isn't satisfied by either the Pearce or
`AMIBIOS references because multi-tasking has to occur
`concurrently, meaning that you have got to literally have two
`tasks going on at the same time.
`Now, our expert, Mr. Sartori, disagreed with that,
`because unless you have multiple processors, that's actually
`technically impossible, but what wraps it up and confirms that
`the Institution decision was correct in rejecting that argument
`is slide 4.
`In slide 4, you see the Patent Owner's expert
`testimony clarifying that you do not have to have multiple
`concurrent tasks in order to satisfy multi-tasking where it
`appears as a limitation of the claims.
`So the reason why this is important is because in
`an AMIBIOS, of course, everything occurs in sequence. If the
`processes relating to INT 08h are being performed, the normal
`booting routine through POST is being suspended until that --
`until those subroutines are carried to their conclusion and
`control is then returned to normal BIOS operations.
`If we look at -- I am now going to go inside the
`AMIBIOS reference itself, starting with slide 7. Slide 7 is an
`important slide because it confirms that the, in the diagram, it
`confirms that the nature of the interrupt from the system timer
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`to the Intel processor depicted in the center of the diagram is
`what's called IRQ0. This is the hardware line where the
`hardware signal occurs.
`It is confused in the Patent Owner's response with
`INT 08h. And, in fact, the Patent Owner has argued that the
`08h interrupt is generated by hardware devices. That's
`actually false. That's not what occurs in AMIBIOS.
`The hardware device, the system timer, generates a
`signal that is the IRQ0 signal. It triggers an interrupt service
`routine that is known as INT 08h, and that is software. And
`that is software that has to be executed by the processor,
`something that I will explain in greater detail as we go through
`the remaining slides.
`08h is actually executed by the processor and,
`therefore, satisfies that portion of the independent claims in
`contravention to the Patent Owner's response. If we look at
`slide 8, we can see that Dr. Nazarian, the Patent Owner's
`expert, conceded during his deposition that the first element of
`each of the independent claims relating to enabling the
`programmable interval timer is actually met by AMIBIOS. 4.
`He was asked that question specifically. And he
`said at the end, after the discussion, that he would give me
`that, he would give me that that element was actually practiced
`by the AMIBIOS.
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`If you look at slide 11, which is a few slides
`forward in the presentation, you see additional testimony from
`Dr. Nazarian confirming that point, where I suggested to him
`that the 18.2 ticks per second in the Intel timer are occurring
`from the moment that it is initialized and programmed during
`POST. And he agreed that that was an accurate depiction.
`So the processor enables the programmable interval
`timer as a part of the normal POST. And as soon as that timer
`is initiated, it then begins sending signals, depending upon
`how it is programmed. And the signals that are specifically
`described in AMIBIOS are occurring once every 18.2 seconds
`or, I'm sorry, 18.2 times every second.
`Looking at slide 9, this is another very important
`piece of the AMIBIOS reference. What is being shown here is
`the element, the second element, performing the first task in
`response to the interrupt signal.
`At the beginning of the description of the INT 08
`timer, interrupt ISR or interrupt service routine, it states
`specifically that the INT 08h can be used to measure time
`increments independent of the system clock and it is called
`approximately 18.2 times per second.
`It then goes on to recite multiple system-level
`tasks that are performed in BIOS prior to the boot-up of the
`operating system. These include incrementing the timer,
`incrementing the counter and decrementing the floppy disk
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`motor count. And when that motor count reaches zero,
`actually, turning the floppy disk drive motor off, in addition,
`another sub- routine within the ISR checks that software
`interrupt 1Ch to see whether or not it is supposed to return to
`normal BIOS operation or whether or not the user has hooked
`in an additional routine that also needs to execute before
`normal BIOS operations can resume.
`This is confessed -- this element was confessed
`explicitly by the Patent Owner's expert, if you look at slide 10
`on page 183 of his deposition, when I asked him: "So you
`agree that even during BIOS boot-up, AMIBIOS teaches
`performing a first level system task, first system level task in
`response to interrupt signals that occur on IRQ0 18.2 times per
`second?
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`"Answer: Yes."
`So we can check that second element of the claim
`off. And if you look at the slide 12, you will see an even more
`in- depth testimony by the Patent Owner's expert, explaining
`that INT 08h is a software routine that is triggered by the
`hardware signal that comes from the programmable interval
`timer, the Intel 8254, and it triggers multiple task
`responsibilities that occur in system BIOS.
`And, finally, I asked him: "It was known in the art
`that even in the pre-OS BIOS, there was this INT 08 that had
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`these three system level responsibilities?" And he said "yes,"
`he agreed with that.
`So one of the major responsibilities of the INT 08
`software routine is shown on slide 13. And that is that it
`hooks to software interrupt 1Ch to see whether or not there is
`an additional user supplied routine that needs to run. This is
`described explicitly on page 340 of the AMIBIOS reference
`and visible on the left- hand side of the slide, where it says
`that the system timer, which is calling across the IRQ0 line,
`calls the INT 08h, which is the call to the interrupt software
`routine on a timed interval basis. Each call to that routine
`causes INT 1Ch to be called to prevent access by any
`application program.
`You can see that we have embedded a couple of
`call-out boxes on this slide. Exhibit 1004 in the lower
`left-hand column is the Jurgens reference, which teaches the
`creation of a user routine that is hooked by INT 1Ch for doing,
`among other things, pop- up utilities and animated graphics
`updates, which just happens to correlate to the preferred
`embodiment of the '202 patent.
`And you will see that on the right- hand side in the
`lower right- hand column, Dr. Nazarian also agreed that any
`kind of a program would meet the definition of a task in his
`mind. He also said elsewhere that subroutines within larger
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`programs can constitute the definition of a task within the
`meaning of the '202 as he saw it.
`So then when we turn to slide 14, this deals with
`the third and final element of these broad claims, performing a
`second task in between the successive interrupt times. This,
`as I alluded to earlier, refers to the fact that the timer-based
`tasks have now been completed and the control is passed back
`to normal BIOS operations, such as POST or INT 19, to load
`the operating system.
`Here we see that the Patent Owner's expert agreed
`in deposition that the second task, according to the
`specification, is normally going to be code to perform normal
`BIOS operations. And I asked him: "Can we agree that POST
`is a normal BIOS operation which is what the specification
`describes as being the second task?" And he said "yes."
`So then I said: "And POST is always prior to
`BIOS boot- up of the operating system?" And, again, he said
`"yes." So when we look at slide 15, you can see expressly
`where POST is taught in AMIBIOS. It is described as a key
`part of system ROM BIOS on page 9 of the AMIBIOS
`reference.
`And Dr. Nazarian was asked if he was aware that
`AMIBIOS does describe the commonly understood process of
`POST through INT 19, which is the interrupt that loads the
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`operating system. And he said "I am," on page 146 of his
`deposition.
`Slide 16 is a kind of a wrap- it- up that kind of ties
`the operation of the two tasks together in normal BIOS where
`Dr. Nazarian agreed that it was accurate to say that if the INT
`08h service routine is carried out pre-OS, it is going to be
`carried out by the processor, suspending whatever it is doing
`during POST, until the interrupt 8h system level tasks are
`performed. Again, he said, "yes."
`So this ties it up. AMIBIOS teaches the system
`timer that has to be programmed before it can send signals on
`the IRQ0 line. It teaches the system level tasks that the INT
`08h software routine feeds to the processor to be performed
`every time the timer interval is read.
`And, finally, it teaches returning to the normal task
`that was interrupted by the system timer interrupt and the INT
`08h ISR that is caused in response thereto.
`Slides 17 and 18 are merely for your convenience.
`They are exemplary quotes from the Patent Owner's expert tied
`to each of the elements of each of the claims that are at issue
`here. And they further show anticipation as a concession by
`the Patent Owner's own expert.
`So why are we here, if the Patent Owner's expert is
`basically laying out on an element-by-element basis the
`presence of every single element of these claims in AMIBIOS
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`and elsewhere? The reason is because the Patent Owner's
`expert has taken the position that there is an implied limitation
`in all of these claims that he called a BIOS boot- up limitation
`during the deposition.
`And it starts on slide 19. On slide 19 he -- we
`were talking about claim 31. And I pointed out to him that
`claim 31 didn't specifically -- or he pointed out to me that
`claim 31 didn't specifically mention the BIOS boot-up but that
`he thought the patent was all about BIOS boot-up.
`And so it had these -- these claims had to be read
`implicitly as occurring -- the multi-tasking had to be occurring
`while the computer is in the BIOS boot-up stage.
`On slide 20, I continued to explore this with him.
`And I said: "So what I'm hearing you say is that to preserve
`the validity of claim 31, you really have to implicitly limit the
`scope of the claim to occurrences that are during BIOS
`boot- up?" And his answer was: "Because that's the whole
`invention."
`And so then I restated to make sure that I was
`correctly understanding his view that for claim 31, it was
`accurate that he was suggesting an implicit limitation, and he
`said yes, he was.
`And then I asked him -- and this is reflected in his
`testimony as reproduced on slide 21 -- I said: "So when you
`are construing the claims, you are construing them in light of
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`the prior art in a way that to your way of thinking, makes them
`valid, given what the state of the prior art was, right?
`"And because you know that if the claims are read
`with an implicit limitation during BIOS boot-up, they would
`be valid but you know that if that's not there, then they are
`invalid?"
`
`And he said: "I agree that these claims would not
`have been valid if they were done POST-OS," which is a tacit
`admission that if there is no BIOS boot-up limitation, then the
`claims are invalid.
`And, in fact, slides 8 and 11 demonstrate that
`earlier in the deposition he said the first element of the claim
`was in the BIOS boot- up because it was the initialization of
`the program timer. Slides 10, 12, 13 and 16 show that during
`BIOS boot- up, you are performing the system level tasks in
`response to the timer interrupt.
`And slides 14, 15, and 16 show where Dr. Nazarian
`earlier in the deposition had admitted that the normal POST,
`which is the final element of the claim, is also occurring
`during the BIOS boot-up stage. So we submit that even with
`Dr. Nazarian's rather tortured claim construction analysis here,
`he still admitted that AMIBIOS anticipates the claims.
`The only issue regarding ground 2 and the Pearce
`reference is the reference -- is the issue that Your Honor
`raised relating to whether or not those XBIOS calls can really
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`be construed as in BIOS or not. And we -- we submit that
`based on the answer that I gave and the Board's analysis in the
`Institution decision, the Board hit the nail right on the head.
`JUDGE JEFFERSON: You have gone over a
`couple minutes. We will deduct that from your next time.
`Counsel, before we get started, did you want to
`reserve time for rebuttal?
`MR. SUMMERFIELD: No time for rebuttal, Your
`
`Honor.
`
`JUDGE JEFFERSON: Understood.
`MR. SUMMERFIELD: Good afternoon. The
`reason we're here to answer Mr. Hill's questions is because the
`expert didn't, in fact, acknowledge that the claims were
`anticipated. In fact, the only way you come to that conclusion
`is if you simply ignore certain of the claims of the -- certain
`of the limitations of the challenged claims.
`And I want to start in that regard with reference to
`claim 1, which is the method claim that Mr. Hill discussed as
`far as the preamble is concerned. Now, he said we didn't show
`how the preamble imparts patentable weight to the claim.
`In fact, if you look at our response at page 4, we
`cite the MPEP Section 2111.02I that says that the preamble is
`limiting because it imparts structure, which it does. It talks
`about BIOS. It talks about a processor. So it imparts
`structure, and that's why it is limiting.
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`Now, in response to that, which is the Petitioner's
`reply at 3, they say: Assuming the preamble is limiting.
`That's it. There is no argument as to why that assumption
`would be incorrect. There is no discussion of the case law that
`we cite. There is no discussion as to why notwithstanding the
`preamble's inclusion of structure, that it shouldn't be limiting.
`JUDGE LEE: Counsel, let me interrupt you
`briefly. Now, you point out claim 1 and you mention that the
`preamble recites certain structures. But none of those
`structures are recited again in the claim, right?
`So based on that, why is it that the preamble
`breathes life and meaning into the claim?
`MR. SUMMERFIELD: Well, Your Honor, two
`things. One, it is certainly an independent ground for
`imparting patentable weight to a preamble, if there are
`antecedents in there. But that's not the only basis.
`There is no rule that requires that the structure
`imparted in the preamble needs to be repeated down below.
`Otherwise, it wouldn't impart structure at that point. That
`structure would already be in the body of the claim.
`So the case law that says that where the preamble
`imparts structure infers that it need not be repeated down
`below. Again, otherwise, it wouldn't impart structure. It
`would be redundant of the structure repeated in the claim
`limitations.
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`And, again, there is no requirement that it be -- the
`structure be an antecedent for later limitations.
`JUDGE McNAMARA: Counsel, assuming that is
`true, the claim says we have a multi-tasking and a basic
`input/output system, a BIOS. Is it -- and that's what it says in
`the preamble.
`Is it your position that any preamble that recites a
`structure is -- imparts some kind of structure into the claim?
`MR. SUMMERFIELD: I don't know if it is any
`claim, Your Honor, but certainly in this instance it does.
`JUDGE McNAMARA: Why this one?
`MR. SUMMERFIELD: Because if you read the
`preamble out, all you have left is an interrupt and two tasks,
`which is old as the hills, as the Petitioner points out.
`So you need those limitations to understand what
`the patentable invention is all about. It is as Dr. Nazarian
`said, what the invention is. Again, otherwise you are left with
`something that is not only novel -- but it is not only not novel,
`but it has been around for decades.
`JUDGE McNAMARA: All right. So basically then
`the distinguishing feature is that the interrupt and tasks are
`performed in a BIOS; is that right?
`MR. SUMMERFIELD: By the processor.
`JUDGE McNAMARA: By the processor in BIOS.
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`Okay.
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`MR. SUMMERFIELD: So that's the reason the
`preamble, if you will, breathes meaning into the claim.
`JUDGE LEE: Isn't that really the nub of the issue
`here? This would be maybe a simpler, a simpler case for you
`if that was not in the preamble but was actually in the body of
`the claim, but it is not, at least for claim 1. It is for claims 11
`and 21.
`
`So isn't that really the difference between these
`claims, that claim 1 perhaps has a broader scope because those
`are in the preamble; whereas in other claims they are not?
`MR. SUMMERFIELD: No, Your Honor. I think
`the more natural way to write a claim like this since it is
`directed to a method, is to set forth the method steps in the
`body without reciting necessarily the structure that is already
`in the preamble that performs the method steps.
`JUDGE LEE: Well, I guess, for example, it could
`have said that enabling interrupt signals at predetermined
`interrupt times in a processor or during BIOS or something
`like that.
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`MR. SUMMERFIELD: It could have repeated --
`JUDGE LEE: It doesn't say those things.
`MR. SUMMERFIELD: It could have repeated in
`the processor for each of the three method steps, that's right,
`but we don't believe that is necessary to convey the patentable
`weight associated with the structure in the preamble.
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`And I think that any one of ordinary skill in the art
`would understand that the preamble and its specification, that
`this be done in a BIOS environment with a processor, would
`understand that that is part and parcel of the cla
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