`571-272-7822
`
`Paper No. 7
`
` Entered: April 7, 2017
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG ELECTRONICS CO., LTD.,
`Petitioner,
`
`v.
`
`PROMOS TECHNOLOGIES, INC.,
`Patent Owner.
`____________
`
`Case IPR2017-00035
`Patent 6,020,259
`____________
`
`
`
`Before KEVIN F. TURNER, JO-ANNE M. KOKOSKI, and
`JEFFREY W. ABRAHAM, Administrative Patent Judges.
`
`
`ABRAHAM, Administrative Patent Judge.
`
`
`
`
`DECISION
`Denying Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`IPR2017-00035
`Patent 6,020,259
`
`
`
`
`I. INTRODUCTION
`
`Samsung Electronics Co., Ltd. (“Petitioner”) filed a Petition seeking
`
`inter partes review of claims 1–10 of U.S. Patent No. 6,020,259 (Ex. 1001,
`
`“the ’259 patent”). Paper 1 (“Pet.”). ProMOS Technologies, Inc. (“Patent
`
`Owner”) filed a Patent Owner Preliminary Response to the Petition. Paper 6
`
`(“Prelim. Resp.”). After considering the Petition and Preliminary Response,
`
`we determine that Petitioner has not established a reasonable likelihood of
`
`prevailing with respect to any of the challenged claims of the ’259 patent.
`
`See 35 U.S.C. § 314(a). Accordingly, we deny the Petition, and do not
`
`institute inter partes review.
`
`II. BACKGROUND
`
`A. Related Proceedings
`
`The parties identify ProMOS Technologies, Inc. v. Samsung
`
`Electronics Co., Ltd., Civil Action No. 1:15-cv-00898-SLR-SRF (D. Del.),
`
`involving the ’259 patent. Pet. 1; Paper 5, 1. The parties also identify
`
`IPR2017-00033, another petition seeking review of the ’259 patent. Pet. 1;
`
`Paper 5, 1.
`
`B. The ’259 Patent
`
`The ’259 patent, titled “Method of Forming a Tungsten-Plug Contact
`
`for a Semiconductor Device,” issued on February 1, 2000. Ex. 1001, [54],
`
`[45]. The ’259 patent discloses a method of forming “a W-plug by using
`
`selective TiSi2 [chemical vapor deposition (CVD)] process, TiN CVD
`
`process and chemical mechanical polishing (CMP).” Id. at 2:41–43. The
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`method of the ’259 patent includes (1) depositing an isolation layer, such as
`
`BPSG or silicon oxide, on a substrate, (2) generating a contact hole in the
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`2
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`IPR2017-00035
`Patent 6,020,259
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`isolation layer by an etching process, (3) selectively depositing a TiSi2 layer
`
`in the contact hole on the substrate using CVD, (4) forming a TiN layer on
`
`the isolation layer, the sidewall of the contact hole, and the TiSi2 layer, (5)
`
`forming a tungsten layer on the TiN layer and in the contact hole, and (6)
`
`polishing the tungsten layer to the surface of the isolation layer for
`
`planarization. Id. at 2:62–3:37.
`
`The ’259 patent teaches that the TiSi2 layer can be selectively
`
`deposited at the contact region using TiCl4 as the reaction material and by
`
`controlling the temperature and pressure of the reaction. Id. at 3:13–18
`
`(stating that the preferred temperature of CVD is about 600–900° C, and the
`
`preferred pressure is 5 to 100 torr). The ’259 patent also teaches that “[t]he
`
`present invention provides a thinner TiN layer process to reduce the time for
`
`CMP polish. Therefore, the cost of the process is degraded and the
`
`throughput is increased. Further, the erosion problem . . . generated by long
`
`polish time is eliminated by the present invention.” Id. at 3:38–42; see also
`
`id. at 1:48–55 (noting that the conventional CMP process “needs [a] long
`
`polish time to remove the thick TiN layer” which “may cause the erosion
`
`effect” and “raises the cost” of CMP).
`
`C. Challenged Claims
`
`Petitioner challenges claims 1–10 of the ’259 patent. Independent
`
`claim 1 is illustrative, and is reproduced below:
`
`1. A method of forming an electrical contact on a semi-
`conductor wafer, said method comprising:
`
`forming an isolation layer on said wafer;
`
`forming a contact hole in said isolation layer, said contact
`hole exposing a portion of said wafer;
`
`
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`3
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`IPR2017-00035
`Patent 6,020,259
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`selectively forming a TiSi2 layer in said contact hole on said
`exposed wafer by using chemical vapor deposition and
`by controlling a deposition temperature, the reaction
`material being TiCl4, wherein said reaction material
`(TiCl4) reacts with said exposed wafer thereby forming
`said TiSi2 wherein said TiSi2 layer is selectively formed
`at said deposition temperature in the range of about 600°
`C. to 700° C.;
`
`forming a TiN layer on said isolation layer, on the surface
`of said contact hole and on the TiSi2 layer by using
`chemical vapor deposition in nitrogen ambient
`environment, the reaction material being TiCl4;
`
`forming a tungsten layer on said TiN layer and in said
`contact hole; and
`
`planarizing said tungsten layer and said TiN layer to the
`surface of said isolation layer by using chemical
`mechanical polishing.
`
`Id. at 3:56–4:13. Independent claim 4 is substantially similar to claim 1,
`
`except that it does not require that the “TiSi2 layer is selectively formed at
`
`said deposition temperature in the range of about 600° C. to 700° C,” and
`
`further requires that the “TiN layer is formed at a temperature in the range of
`
`about 600° C. to 900° C.” Id. at 4:23–45.
`
`
`
`Petitioner relies on the following references:
`
`D. References
`
`Hillman et al., Integrated CVD titanium and titanium nitride
`processes for sub-0.5-µm metallization, Solid State Technology
`147–152, July 1995 (“Hillman Paper,” Ex. 1009).
`
`Hillman et al., US Patent No. 5,975,912, issued Nov. 2, 1999
`(“Hillman ’912,” Ex. 1010).
`
`Arena et al., US Patent No. 5,972,790, issued Oct. 26, 1999
`(“Arena,” Ex. 1011).
`
`
`
`
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`4
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`Mathews et al., US Patent No. 5,580,821, issued Dec. 3, 1996
`(“Mathews,” Ex. 1006).
`
`Suzuki et al., JP H05-67585, published March 19, 1993 (“Suzuki,”
`Ex. 1004).
`
`Petitioner also relies on Applicant’s Admitted Prior Art (“AAPA”)
`
`and the Declaration of Gary Rubloff, PhD. (Ex. 1002).
`
`E. The Asserted Grounds
`
`Petitioner asserts the following grounds of unpatentability:
`
`References
`
`Hillman Paper,
`Hillman ’912, Arena,
`and AAPA
`Hillman Paper,
`Hillman ’912, Arena,
`AAPA, and Mathews
`Hillman Paper,
`Hillman ’912, Arena,
`AAPA, and Suzuki
`
`
`Statutory
`Basis
`
`Claims Challenged
`
`§103
`
`§103
`
`§103
`
`1, 3, 4, 7, and 9
`
`2 and 8
`
`5, 6, and 10
`
`III. ANALYSIS
`
`A. Claim Construction
`
`Petitioner offers a proposed construction for “forming a TiN layer . . .
`
`by using chemical vapor deposition in nitrogen ambient environment, the
`
`reaction material being TiCl4.” Pet. 24–26. Patent Owner argues that the
`
`Board does not need to construe this limitation in order to resolve the
`
`question of patentability. Prelim. Resp. 15–16.
`
`We agree with Patent Owner that no express claim construction is
`
`necessary for purposes of this decision. See Vivid Techs., Inc. v. Am. Sci. &
`
`Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999) (“[O]nly those terms need be
`
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`construed that are in controversy, and only to the extent necessary to resolve
`
`the controversy.”).
`
`B. References
`
`i. Hillman Paper
`
`The Hillman Paper discloses “[a]n integrated process for chemical
`
`vapor deposition (CVD) of titanium (Ti) and titanium nitride layers,” in
`
`addition to a CVD-tungsten process. Ex. 1009, 147. The Hillman Paper
`
`describes experiments using test structures with 0.35 µm contacts that were
`
`0.8 µm deep formed within a layer of borophosphosilicate glass (BPSG) on
`
`a silicon substrate. Id. at 150. The Hillman Paper states:
`
`After cutting the contacts, the wafers received a standard wet
`clean followed by CVD-Ti and TiN deposition in the new CVD
`system. The wafers were then transferred to separate systems
`for blanket tungsten deposition and etch back. The SEM cross-
`section of the resulting contact structure shows a uniform
`250-Å TiSi2 layer at the bottom of the contact and a conformal
`400-Å TiN layer lining the contact.
`
`Id.
`
`ii. Hillman ’912
`
`Hillman ’912 discloses the formation of multiple layers of titanium,
`
`titanium nitride, and titanium silicide on semiconductor substrates in the
`
`same reactor using low temperature plasma-enhanced CVD. Ex. 1010,
`
`Abstract. Hillman ’912 discloses several examples of depositing TiN using
`
`varying deposition parameters. Id. at 8:27–15:18. For example, Hillman
`
`’912 describes one TiN deposition using ammonia gas and nitrogen gas, and
`
`another using nitrogen gas and hydrogen gas (instead of ammonia gas). Id.
`
`at 8:30–33, 9:1–5. Hillman ’912 also discloses deposition runs utilizing
`
`different substrate temperatures. See, e.g., id. at 8:28–30 (400° C), 9:41–42
`
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`(450° C), 10:19–20 (600° C). Hillman ’912 includes several tables setting
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`forth results and deposition parameters for the exemplary TiN depositions
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`described in the specification. Id. at 8:27–15:18.
`
`iii. Arena
`
`Arena, titled “Method for Forming Salicides,” teaches depositing
`
`titanium “onto a semiconductor interconnect to form a salicide structure by
`
`plasma-enhanced chemical vapor deposition.” Ex. 1011, Abstract. Arena
`
`states that an object of the invention is “to provide a method for salicide
`
`formation which overcomes the problem of formation of titanium silicide
`
`over the isolation oxide and sidewall spacers.” Id. at 1:62–65. Arena
`
`achieves this by initially depositing titanium onto only the silicon electrode,
`
`and “[o]nly after about 30 seconds of deposition does the titanium begin to
`
`deposit onto the oxide surface spacers and other portions of the substrate.”
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`Id. at 2:19–21. According to Arena’s method, any unwanted titanium that
`
`forms over the silicon oxide spacers and isolation oxide can be removed
`
`using a chemical etch. Id. at 2:9–12.
`
`iv.
`
` AAPA
`
`The ’259 patent contains a section titled “Background of the
`
`Invention,” which includes a discussion of a “conventional method” of
`
`forming a tungsten-plug used to fill a contact hole in an isolation layer. Ex.
`
`1001, 1:26–28. According to the ’259 patent, this conventional method
`
`includes depositing an isolation layer on a silicon substrate, creating a
`
`contact hole in the isolation layer using patterning and etching, and
`
`depositing a titanium layer on the isolation layer and on the surface of the
`
`contact hole using physical vapor deposition (PVD). Id. at 1:29–35. The
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`’259 patent teaches that a TiSi2 layer is formed at the interface between the
`
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`silicon substrate and the titanium layer. Id. at 1:42–44. The ’259 patent
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`further describes forming a tungsten layer in the contact hole using CVD and
`
`using CMP to polish the tungsten layer for planarization. Id. at 1:46–49,
`
`Fig. 3. Petitioner refers to these disclosures as the Applicant’s Admitted
`
`Prior Art (AAPA). Pet. 6.
`
`v. Mathews
`
`Mathews discloses a “semiconductor processing method of forming
`
`an electrically conductive contact plug relative to a wafer” that includes
`
`depositing a material on a substrate followed by “pattern masking,”
`
`preferably using a layer of photoresist, and etching the material to form a
`
`desired contact opening in the material. Ex. 1006, Abstract, 3:23–29.
`
`vi.
`
`Suzuki
`
`Suzuki discloses a method for forming a semiconductor device that
`
`includes forming an insulating film with openings (i.e., contact holes) on a
`
`silicon circuit board. Ex. 1004 ¶¶ 1, 13. Suzuki teaches forming a contact
`
`metal layer comprising TiSi2 at the bottom of the contact hole using CVD
`
`with TiCl4 as the titanium source and heating the Si circuit board to a
`
`temperature between 60 and 700° C. Id. ¶ 14. Suzuki further teaches the
`
`steps of forming a barrier metal layer comprising TiN on the contact metal
`
`layer, the sidewall of the contact hole, and the insulation layer, and forming
`
`a wiring layer, which may be comprised of tungsten, on the TiN barrier
`
`layer. Id. ¶¶ 14–15. Figure 1(c) of Suzuki is reproduced below.
`
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`Figure 1(c) of Suzuki shows a semiconductor device having insulating
`
`layer (4) with an opening (3) on a Si circuit board (1), a contact metal layer
`
`(5) on the Si circuit board (1) inside the opening (3), a barrier metal layer (6)
`
`covering the contact metal layer (5) and insulating layer (3), and a wiring
`
`layer (7) covering the barrier metal layer (6). Id. ¶¶ 13–15.
`
`C. Obviousness of Claims 1–10
`
`For each asserted ground challenging the claims of the ’259 patent,
`
`Petitioner relies on the Hillman Paper, Hillman ’912, Arena, and AAPA.
`
`Pet. 2–3. Petitioner additionally relies on Mathews and Suzuki for the
`
`asserted grounds challenging dependent claims 2, 5, 6, 8, and 10. Id.
`
`Independent claims 1 and 4 each recite forming a TiN layer on an
`
`isolation layer, forming a tungsten layer on the TiN layer, and “planarizing
`
`said tungsten layer and said TiN layer to the surface of said isolation layer
`
`by using chemical mechanical polishing.” Ex. 1001, 4:4–13, 4:35–45.
`
`Petitioner contends that the combined teachings of the Hillman Paper,
`
`Hillman ’912, and Arena disclose a tungsten layer deposited on top of a TiN
`
`layer, but acknowledges that these references fail to disclose planarizing the
`
`tungsten layer and TiN layer to the insulating layer. Pet. 50–51. Petitioner,
`
`however, argues that “[t]he use of chemical mechanical polishing (CMP) for
`
`the planarization is in the AAPA, as it is described in the ‘Background of the
`
`Invention’ section of the ’259 patent.” Id. at 53 (citing Ex. 1001, 1:46–55;
`
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`Ex. 1002 ¶ 93). Specifically, Petitioner directs us to Figure 3 of the ’259
`
`patent, arguing that it is labeled as “prior art” and shows a tungsten layer and
`
`TiN layer planarized to the surface of the isolation layer. Id. at 52 (citing
`
`Ex. 1001, 1:46–51, Figs. 2, 3; Ex. 1002 ¶ 92). Additionally, Petitioner
`
`argues that during prosecution of the application leading to the ’259 patent,
`
`the Examiner stated that this claimed feature was admitted prior art, and the
`
`applicant did not rebut those statements. Id. at 54.
`
`Petitioner thus asserts that:
`
`One of ordinary skill would have been motivated to use CMP
`for planarization of the tungsten and TiN layers to the surface
`of the insulation film in the Hillman Paper-Hillman ’912-Arena
`combination because the use of CMP for that purpose was
`conventional in the art. . . . Indeed, a skilled artisan would have
`recognized that CMP for planarization of the tungsten and TiN
`layers in the Hillman Paper to the surface of the BPSG layer
`(“surface of said isolation layer”) would have had a number of
`benefits, such as improved subsequent processing, handling,
`and/or use of the resulting device. (Ex. 1002 at ¶ 94.) A skilled
`artisan would have been motivated to planarize the tungsten and
`the Hillman Paper-Hillman
`’912-Arena
`TiN
`layers
`in
`combination using CMP to provide a substantially flat surface
`so that the layers (e.g., the Al-Cu layer in Ex. 1009, FIG. 3) that
`are typically added to the tungsten plug can reliably be added to
`achieve multiple wiring layers with better manufacturing yield,
`reliability, and performance. (Ex. 1002 at ¶ 95.)
`
`Id. at 54–55.
`
`Petitioner further asserts that the use of CMP for planarizing the
`
`tungsten and TiN layers constitutes nothing more than the use of a known
`
`technique to improve a similar device to yield an expected result. Id. (citing
`
`KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
`
`Patent Owner argues that AAPA is not eligible prior art under 35
`
`U.S.C. § 311(b), which limits the prior art the Board can consider in inter
`
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`partes reviews to “patents or printed publications.” Prelim. Resp. 7–8.
`
`Patent Owner further argues that even if the Board could and/or does
`
`consider the AAPA, the Board should still deny institution because
`
`Petitioner fails to explain adequately why a person of ordinary skill in the art
`
`would have combined the CMP process from the AAPA with the teachings
`
`of the Hillman Paper, Hillman ’912, and Arena. Id. at 9. Patent Owner
`
`asserts that simply showing individual claimed elements were already
`
`known in the art is insufficient. Id. at 10. Rather, Petitioner must
`
`demonstrate that a person of ordinary skill in the art would have had a
`
`reason to combine the teachings of the prior art references to achieve the
`
`claimed invention, and would have had a reasonable expectation of success
`
`in doing so. Id. (citing KSR, 550 U.S. at 418; PAR Pharm., Inc. v. TWI
`
`Pharms. Inc., 773 F.3d 1186, 1193 (Fed. Cir. 2014)). Patent Owner
`
`contends that Petitioner’s only support for combining the CMP process of
`
`the AAPA with what the Hillman Paper teaches is the conclusory statement
`
`from its declarant alleging the benefits associated with CMP. Id. at 10–11.
`
`Patent Owner thus argues that Petitioner failed to present any evidence or a
`
`reasoned explanation demonstrating that a person of ordinary skill in the art
`
`would have had a reason to combine the teachings of AAPA and the Hillman
`
`Paper. Id. (citing In re Nuvasive, 842 F.3d 1376, 1384–85 (Fed. Cir. 2016)).
`
`Patent Owner further argues that the thickness of the TiN layer
`
`formed from the processes described in the Hillman Paper, Hillman ’912,
`
`and Arena demonstrates that a person of ordinary skill in the art would not
`
`have had a reason to use the planarizing step from the AAPA in combination
`
`with the process for forming a semiconductor device set forth in the
`
`combined disclosure of the Hillman Paper, Hillman ’912, and Arena. Id. at
`
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`11
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`12–13. Patent Owner notes that the Hillman Paper discloses a TiN layer of
`
`400 Å, and that modifying the Hillman Paper with the processes described in
`
`Hillman ’912 (as proposed by Petitioner) only results in even thicker TiN
`
`layers. Id. at 13. Patent Owner points out that these TiN layers are much
`
`thicker than the TiN layers of the ’259 patent, and the ’259 patent states that
`
`removing a thick TiN layer using the conventional CMP process requires a
`
`long polish time for planarization, which may cause an erosion effect and
`
`increase the cost of the CMP. Id. (citing Ex. 1001, 1:49–54, 3:38–43).
`
`According to Patent Owner, “[t]hese problems associated with the CMP
`
`process are exactly what the ’259 invention was trying to solve,” and,
`
`therefore, “[u]sing the AAPA CMP process with the thick TiN layer of the
`
`Hillman Paper would lead to precisely the same problems of erosion and
`
`increased costs that a [person of ordinary skill in the art] would want to
`
`avoid.” Id. at 12–13. Patent Owner further contends that “[t]his is likely
`
`why the authors of the Hillman Paper disclosed planarization of the tungsten
`
`layer using an etchback process, as opposed to CMP.” Id. at 13 (citing Ex.
`
`1009, 150).
`
`
`
`We agree with Patent Owner that, on this record, Petitioner failed to
`
`demonstrate sufficiently that a person of ordinary skill in the art would have
`
`had a reason to combine the teachings of the AAPA CMP process with the
`
`method for forming a semiconductor device disclosed in the Hillman Paper,
`
`Hillman ’912, and Arena.
`
`The Supreme Court has explained that an obviousness analysis should
`
`“determine whether there was an apparent reason to combine the known
`
`elements in the fashion claimed by the patent at issue.” KSR, 550 U.S. at
`
`418. Similarly, the Federal Circuit has made clear that “[t]he factual inquiry
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`whether to combine references must be thorough and searching” (Nuvasive,
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`842 F.3d at 1381 (quoting In re Lee, 277 F.3d 1338, 1343 (Fed. Cir. 2002)),
`
`and an obviousness determination “cannot be sustained by mere conclusory
`
`statements; instead, there must be some articulated reasoning with some
`
`rational underpinning to support the legal conclusion of obviousness” (In re
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`Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006)). See KSR, 550 U.S. at 418
`
`(quoting Kahn, 441 F.3d at 988); see also Lee, 227 F.3d at 1342, 1345 (“The
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`board cannot rely on conclusory statements when dealing with particular
`
`combinations of prior art and specific claims, but must set forth the rationale
`
`on which it relies.”).
`
`Petitioner relies on testimony from Dr. Rubloff regarding better
`
`manufacturing yield, reliability, and performance resulting from CMP as
`
`evidence of a reason to combine the teachings of the AAPA and the Hillman
`
`Paper, Hillman ’912, and Arena. Pet. 54–55; Ex. 1002 ¶¶ 94–95. Dr.
`
`Rubloff, however, offers no underlying facts or data to support the
`
`conclusion that applying the AAPA CMP step to the semiconductor device
`
`derived from the combined teachings of the Hillman Paper, Hillman ’912,
`
`and Arena would result in such benefits. Such conclusory statements by a
`
`declarant are entitled to little or no weight. 37 C.F.R. § 42.65(a); see also
`
`Ashland Oil, Inc. v. Delta Resins & Refractories, Inc., 776 F.2d 281, 294
`
`(Fed. Cir. 1985) (stating a lack of objective support for an expert opinion
`
`“may render the testimony of little probative value in [a patentability]
`
`determination”).
`
` Furthermore, when discussing CMP in the Background of the
`
`Invention section, the ’259 patent states:
`
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`13
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`[A] CMP is utilized to polish the tungsten layer 14 for
`planarization. Unfortunately, the conventional process needs
`long polish time to remove the thick TiN layer 10 and the
`titanium 8. However, the long polish time for planarization
`may cause the erosion effect. Further, it also raises the cost of
`the CMP for removing the tungsten layer 14 in the conventional
`method. Additionally, the PVD titanium deposition process can
`not [sic] achieve high aspect ratio contact in half submicron
`devices.
`
`Ex. 1001, 1:48–55. As Patent Owner points out, the ’259 patent further
`
`explains that “[t]he present invention provides a thinner TiN layer process to
`
`reduce the time for CMP polish. Therefore, the cost of the process is
`
`degraded and the throughput is increased. Further, the erosion problem that
`
`[is] generated by long polish time is eliminated by the present invention.”
`
`Id. at 3:38–42; Prelim. Resp. 12–13.
`
`At the very least, these portions of the ’259 patent cast doubt on
`
`Petitioner’s conclusion that a person of ordinary skill in the art would have
`
`recognized that the use of CMP for planarizing tungsten and TiN down to
`
`the isolation layer would improve a device formed based on the combined
`
`teachings of the Hillman Paper, Hillman ’912, and Arena, and would yield
`
`an expected result. Pet. 40 (citing KSR, 550 U.S. at 417). The Hillman
`
`Paper discloses a TiN layer having a thickness of 400 Å. Petitioner does not
`
`explain adequately why, in view of the negative treatment afforded to
`
`conventional CMP in the context of thick TiN layers, a person of ordinary
`
`skill in the art would proceed with a conventional CMP step, as taught by
`
`AAPA, in combination with the steps for forming a semiconductor device
`
`set forth in the Hillman Paper, Hillman ’912, and Arena.
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`Petitioner’s reliance on Mathews or Suzuki does not cure this
`
`deficiency, as Petitioner does not assert that either reference discloses or
`
`suggests the claimed planarization step.
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`In view of the foregoing, we determine that the obviousness analysis
`
`proposed in the Petition does not provide sufficiently articulated reasoning,
`
`with rational and/or factual underpinnings, to combine the teachings of the
`
`AAPA and the Hillman Paper, Hillman ’912, and Arena to reach the
`
`invention recited in the challenged claims and, instead, is driven by
`
`conclusory reasons to combine the references. For this reason, we determine
`
`that Petitioner has not established a reasonable likelihood of demonstrating
`
`that independent claims 1 and 4, and therefore claims 2, 3, and 5–10, which
`
`depend therefrom, are unpatentable over the cited prior art.1
`
`
`
`IV. CONCLUSION
`
`Based on the information presented, we conclude that Petitioner has
`
`not demonstrated a reasonable likelihood of prevailing with respect to its
`
`challenges to claims 1–10.
`
`V. ORDER
`
`For the reasons given, it is hereby
`
`ORDERED the Petition is denied.
`
`
`
`
`
`
`1 In view of this, we find that it is unnecessary to address Patent Owner’s
`argument that AAPA is not prior art “consisting of patents or printed
`publications,” and, therefore, cannot form the basis for institution of inter
`partes review. Prelim. Resp. 7.
`
`
`
`15
`
`
`
`IPR2017-00035
`Patent 6,020,259
`
`PETITIONER:
`
`Naveen Modi
`naveenmodi@paulhastings.com
`
`Joseph Palys
`josephpalys@paulhastings.com
`
`Chetan Bansal
`chetanbansal@paulhastings.com
`
`Arvind Jairam
`arvindjairam@paulhastings.com
`
`
`
`PATENT OWNER:
`
`Craig Kaufman
`ckaufman@tklg-llp.com
`
`Kevin Jones
`kjones@tklg-llp.com
`
`
`
`
`16
`
`