Universal Serial Bus
`
`Specification
`
`Compaq
`
`Intel
`
`Microsoft
`
`NEC
`
`Revision 1.1
`
`September 23, 1998
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`
`Universal Serial Bus Specification Revision 1.1
`
`Scope of this Revision
`The 1.1 revision of the specification is intended for product design. Every attempt has been made to ensure a
`consistent and implementable specification. Implementations should ensure compliance with this revision.
`
`Revision History
`
` Revision
`
`Issue Date
`
`07
`
`
`November 11, 1994
`
`
`Supersedes 0.6e.
`December 30, 1994
`Revisions to Chapters 3-8, 10, and 11. Added
`
`appendixes.
`
`
`
`
`
`
`
`
` 1.0 FDR
`
`
`‘[0
`
`April 13, 1995
`
`Revisions to all the chapters.
`
`August 25. 1995
`
`Revisions to all the chapters.
`
`November 13, 1995
`
`Revisions to Chapters 1, 2, 5-11.
`
`January 15, 1998
`
`Edits to Chapters 5. 6. T, 8, 9, 10, and 11 for
`consistency.
`Updates to all chapters to fix problems identified.
`1 1
`September 23, 1993
`
`
`
`Universal Serial Bus Specification
`Copyright© 1998, Compaq Computer Corporation,
`Intel Corporation, Microsoft Corporation, NEC Corporation.
`All rights reserved.
`
`INTELLECTUAL PROPERTY DISCLAIMER
`'
`THIS SPECIFICATION IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER INCLUDING
`ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
`WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE.
`A LICENSE IS HEREBY GRANTED T0 REPROQUCE AND DISTRIBUTE THIS SPECIFICATION FOR
`INTERNAL USE ONLY. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
`OTHERWISE, TO ANY OTHER INTELLECTUAL PROPERTY RIGHTS IS GRANTED OR INTENDED
`HEREBY.
`AUTHORS OF THIS SPECIFICATION DISCLAIM ALL LIABILITY, INCLUDING LIABILITY FOR
`INFRINGEMENT OF PROPRIETARY RIGHTS, RELATING TO IMPLEMENTATION OF
`INFORMATION IN THIS SPECIFICATION. AUTHORS OF THIS SPECIFICATION ALSO DO NOT
`WARRANT OR REPRESENT THAT SUCH IMPLEMENTATION(S) WILL NOT INFRINGE SUCH
`RIGHTS.
`
`GcoPort and Apple Desktop Bus are trademarks of Apple Computer, Inc.
`Windows and Windows NT are trademarks and Microsofi and Win32 are registered trademarks of Microsoft Corporation.
`IBM, PS/2, and Micro Channel are registered trademarks of International Business Machines Corporation.
`AT&T is a registered trademark of American Telephone and Telegraph Company.
`Compaq is a registered trademark of Compaq Computer Corporation.
`UNIX is a registered trademark of UNIX System Laboratories.
`l’C is a trademark of Phillips Semiconductors.
`DEC is a trademark of Digital Equipment Corporation.
`All other product names are trademarks, registered trademarks, or scrviccmarks of their respective owners.
`
`Please send comments via electronic mail to iechsup@usb.org
`For industry information, refer to the USB Implemenrers Forum web page at Imp://www.usb.0rg
`
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`Universal Serial Bus Specification Revision 1.1
`
`Contents
`
`CHAPTER 1
`
`INTRODUCTION
`
`1.1 Motivation ............................................................................................................................................. ..1
`
`1.2 Objective of the Specification ................................................................................................................1
`
`1.3
`
`Scope of the Document ...........................................................................................................................2
`
`1.4 Document Organization .........................................................................................................................2
`
`CHAPTER 2 TERMS AND ABBREVIATIONS ........................................................ .. 3
`
`CHAPTER 3 BACKGROUND ................................................................................ .. 11
`
`3.1 Goals for the Universal Serial Bus ......................................................................................................11
`
`3.2
`
`Taxonomy of Application Space ........................................................................................................ ..12
`
`3.3
`
`Feature List ...........................................................................................................................................12
`
`CHAPTER 4 ARCHITECTURAL
`
`USB System Description ......................................................................................................................15
`4.1
`4.1.1
`
`Physical Interface .................................................................................................................................17
`4.2
`4.2.1
`
`4.2.2 Mechanical
`
`Power .....................................................................................................................................................18
`4.3
`4.3.1
`PowerDistribution
`18
`Power
`4.3.2
`
`4.4
`
`Bus Protocol ..........................................................................................................................................18
`
`I
`
`i
`
`4.5 Robustness .............................................................................................................................................
`4.5.1
`Error
`
`4.5.2 Error KONG‘-C
`
`System Configuration ...........................................................................................................................
`4.6
`4.6.1
`Attachment of USB Devices .............................................. ..
`4.6.2
`Removal of USB
`4.6.3
`
`
`
`~‘~L.-C>O\D\D
`
`4.7 Data Flow Types ...................................................................................................................................20
`4.7.1
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`4.7.2 Bulk
`4.7.3
`Interrupt Transfers..........
`..... ..2l
`
`4.7.4
`Isochronous Transfers ................................................................................................................... ..2l
`4.7.5 Allocating USB
`
`....21
`USB Devices ............................
`4.8
`
`....2l
`4.3.1
`Device Characterizations...
`4.8.2
`Device Descriptions ...................................................................................................................... ..22
`
`4.9
`
`USB Host: Hardware and Software..........
`
`.......24
`
`4.10 Architectural Extensions
`
`CHAPTER 5 USB DATA FLOW MODEL .............................................................. .. 25
`
`5.1
`
`Implementer Viewpoints..................................... .................................................................................25
`
`....................................................................................................
`Bus Topology
`5.2
`5.2.1
`USB Host ...................................................................................................................................... ..27
`5.2.2
`USB
`5.2.3
`Physical Bus Topology......
`5.2.4
`Logical Bus
`5.2.5
`Client Software-to—funct1'on
`
`
`
`29
`
`USB Communication Flow ..................................................................................................................31
`5.3
`
`5.3.1
`Device Endpoints ........................................... ..
`....32
`5.3.2
`Pipes .............................................................................................................................................. ..33
`
`5.4
`
`TransferTypes...................................................................................................
`
`Control Transfers ............................................................................................................................... ..36
`5.5
`5.5.!
`Control Transfer Data Format
`....36
`
`5.5.2
`Control Transfer Direction ............................................................................................................ ..37
`5.5.3
`Control Transfer Packet Size Constraints ...................................................................................... ..37
`5.5.4
`Control Transfer Bus Access Constraints.... ..
`............. ..38
`
`5.5.5
`Control Transfer Data Sequences ..................................................... ..
`....40
`
`
`
`....................................................................
`Isochronous Transfers
`5.6
`5.6.1
`Isochronous Transfer Data Format.....
`5.6.2
`Isochronous Transfer Direction...........................
`5.6.3
`Isochronous Transfer Packet Size Constraints
`5.6.4
`Isoohronous Transfer Bus Access Constraints
`5.6.5
`Isoehronous Transfer Data
`
`
`
`....41
`....4l
`
`...................................43
`Interrupt Transfers ..........................
`5.7
`....43
`5.7.1
`Interrupt Transfer Data Format
`
`5.7.2
`Interrupt TransferDirection
`5.7.3
`Interrupt Transfer Packet Size
`....-44
`5.7.4
`Interrupt Transfer Bus Access Constraints....
`
`5.7.5
`Interrupt Transfer DataSequences
`
`
`
`BulkTransfers............................................................................
`5.8
`....47
`5.8.1
`Bulk Transfer Data Format
`....47
`5.8.2
`BulkTransferDirection .......................... ..
`5.8.3
`BulEcTransferPacketSizeConstraints........................................................,...................................47
`
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`5.8.4
`5.8.5
`
`Bulk Transfer Bus AccessConstraints
`Bulk Transfer DataSequences
`
`Bus Access for Transfers......................................................................................................................49
`5.9
`5.9.1
`Transfer
`5.9.2
`Transaction
`5.9.3
`Calculating Bus Transaction
`5.9.4
`Calculating Buffer Sizes in Functions and
`5.9.5
`Bus Bandwidth
`
`
`
`55
`5.10 Special Considerations for Isochronous Transfers ......
`....56
`5.10.1
`Jzixample Non—USB lsochronous Application.............
`5.10.2 USB ClockModel
`5.10.3 ClockSynchronization
`5.10.4 lsochronous Devices........................................................... ..
`.......6l
`5.10.5 Data
`5.10.6 SOFTracking
`5.10.7Error
`5.10.8 Buffering for RateMatching
`
`
`
`CHAPTER 6 MECHANICAL .................................................................................. .. T3
`
`6.1 Architectural Overview........................................................................................................................73
`
`6.2 Keyed Connector Protocol ...................................................................................................................73
`
`6.3
`
`Cable ......................................................................................................................................................74
`
`Cable Assembly.....................................................................................................................................74
`6.4
`6.4.1
`DetachableCableAssemblies.........................................................................................................74
`6.4.2
`Full-speed Captive Cable
`....78
`6.4.3
`Low-speed Captive Cable Assemblies
`
`5.4.4
`prohibitedcaneAssemblies..........................IIIIIIIZIIIIIIZIIIIIIIIIIIIIIIICIIfCfIfIffIifIfiiffliiiiififii....so
`
`6.5 Connector Mechanical Configuration and Material Requirements .............................................. ..80
`6.5.1
`USB Icon Location............................
`6.5.2
`USB Connector Termination Data .............................................................. ..
`6.5.3
`Series “A” and Series “B” Receptacles
`6.5.4
`Series “A” and Series “B” Plugs
`
`
`
`
`
`......82
`...82
`
`Cable Mechanical Configuration and Material Re
`6.6
`6.6.1
`6.6.2
`6.6.3
`6.6.4
`
`Electrical Characteristics ..................... ..
`Cable Environmental Characteristics
`
`.90
`90
`91
`
`93
`
`Electrical. Mechanical and Environmental Compliance Standards ................................................94
`6.7
`6.7.1 Applicable
`
`6.8
`
`USB Grounding ..................................................................................................................................102
`
`6.9
`
`PCB Reference Drawings................................................................................................................. ..102
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`CHAPTER 7 ELECTRiCAL ................................................................................. .. 107
`
`Signaling ..............................................................................................................................................107
`7.1
`7.1.1
`USB Driver ...........l07
`
`Data Signal Rise and
`
`
`
`110
`
`Receiver Characteristics .............................................................................................................. ..1 12
`
`DeviceSpeedIdentification..........................................................................................................l13
`Input Characteristics ............................................................... ..
`...114
`SignalingLeve1s............
`115
`Data Encoding/Decoding ....................................................... ..
`......l23
`
`133
`133
`
`138
`
`140
`
`Power Distribution .............................................................................................................................134
`7.2
`7.2.1
`Classes ofDevices..................................
`..........l34
`
`
`7.2.2
`7.2.3
`7.2.4
`
`Voltage Drop Budget
`Power Control During
`Dynamic Attach and
`
`Physical Layer ....................................................................................................................................141
`7.3
`7.3.1
`RegulatoryRequirements .................... ..
`7.3.2
`Bus Timing/Electrical
`7.3.3
`
`
`
`142
`
`CHAPTER 8 PROTOCOL LAYER ...................................................................... .. 155
`
`8.1
`
`8.2
`
`Bit Ordering ........................................................................................................................................155
`
`SYNC Field .........................................................................................................................................155
`
`Packet Field Formats .........................................................................................................................155
`8.3
`8.3.1
`Packet Identifier
`155
`8.3.2
`Address Fields .............................. ..
`156
`8.3.3
`Frame Number Field .................... ..
`157
`8.3.4
`Data
`8.3.5
`Cyclic Redundancy
`
`
`
`l53
`
`
`
`.. .. .. ... .. ...... ...... .. .. . .... .. ... .. ...158
`Packet Formats ... .. ... .. ..
`8.4
`
`....159
`8.4.1
`TokenPackets.........
`3.4.2
`Start-of-Frame packet;IlliiiiiiiilliiiifI ................. .I:IIIII::'.......... ..ZI'.:'.:II'.IIiiiiliiff.II:I::....159
`8.4.3
`8.4.4
`8.4.5 Handshake
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`7.1.2
`7.1.3
`7.1.4
`
`7.1.5
`.'“"‘."" .......
`-Jo
`
`r-‘r-':~4r-‘>174:-1:-‘r~'r-'r~'.*-1
`
`____________
`
`*_:_'_.'_.;.'_'_'_'
`
`
`knco--..IO\Lh-it-bJl\J
`
`Sync Pattern ................................................................................................................................ ..126
`Data Signaling Rate ..................................................................................................................... ..l26
`Frame Interval and Frame Interval Adjustment .......................................................................... .. 126
`Data Source
`HubSignaling
`Receiver Data Jitter
`130
`
`
`132
`......133
`
`Cable
`Cable
`
`Bus Turn-around Time and Inter-packet Delay ...................... ..
`Maximum End-to-end Signal
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`Universal Serial Bus Specification Revision 1.1
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`Transaction Formats ..........................................................................................................................162
`8.5
`8.5.1
`Bulk
`
`8.5.2
`Control Transfers ................................................................ ..
`8.5.3
`Interrupt Transactions .................................................................................................................. .. 1 67
`8.5.4
`Isochronous Transactions ............................................................................................................ ..l68
`
`8.6 Data Toggle Synchronization and Retry ..........................................................................................168
`8.6.1
`Initialization via SETUP Token .................................................................................................. ..169
`8.6.2
`Successful Data Transactions ................................................. ..
`.......169
`
`Data Corrupted orNot
`Corrupted ACK Handshake......................................................................................................... ..170
`Low-speed
`
`8.6.3
`8.6.4
`8.6.5
`
`8.7 Error Detection and Recovery. ..... ... ... .. . ... ..... ... ... ... .. ... .. ... ........
`8.7.1
`Packet Error Categories ................... ..
`8.7.2
`Bus Turn-aroundTiming...................
`8.7.3
`False EOPS
`8.7.4
`Babble and Loss
`
`
`
`. ...... ... ....172
`.......l72
`
`CHAPTER 9 USB DEVICE FRAMEWORK ......................................................... .. 175
`
`USB Device States ...............................................................................................................................175
`9.1
`9.1.1
`Visible Device
`9.1.2
`Bus
`
`9.2 Generic USB Device Operations ..................................................................................................... ..180
`9.2.1
`Dynamic Attachment and
`...l80
`9.2.2 Address
`180
`9.2.3
`9.2.4 Data .......181
`9.2.5
`Power
`.......181
`9.2.6
`Request Processing ..................................... ..
`9.2.7 Request
`
`
`
`USB Device Requests ..........................................................................................................................183
`9.3
`9.3.1
`bmRequestType................................................
`.......I83
`9.3.2
`.......184
`9.3.3
`9.3.4
`
`
`
`Standard Device Requests..................................................................................................................185
`9.4
`9.4.1 Clear
`9.4.2
`Get Configuration ....................................... ..
`I 89
`9.4.3 Get
`.......l89
`9.4.4 Get Interface ............................................... ..
`.......190
`9.4.5 Get
`.......190
`9.4.6 Set
`...192
`9.4.7
`Set Configuration
`193
`9.4.8 Set
`.......l93
`9.4.9
`Set Feature ........................................... ..
`.......194
`9.4.10Set .......195
`9.4.11 Synch
`...195
`
`
`
`9.5 Descriptors ..........................................................................................................................................196
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`Standard USB Descriptor Definitions...............................................................................................196
`9.6
`9.6.1 Device
`. . . . . . .
`. . . . . . . . . .
`. . .. . . .
`. . . . .. 196
`
`Configuration..
`Interface........................
`.........203
`Endpoint...
`smug..................IIIIIIZIi...fI.I..IIIIiIKCKIIIIZffiilffiifiiffliiiiiiiififiiiIfiffifKI:IIiCiiiiff.........2o4
`
`
`
`
`
`9.6.2
`9.6.3
`9.6.4
`9.5.5
`
`Device Class Definitions .....................................................................................................................205
`9.7
`9.7.1
`Descriptors.....................................
`.... ..205
`9.7.2
`1nterface(s) and Endpoint Usage
`.... .205
`9.7.3
`Requests ...................................................................................................................................... ..206
`
`
`
`CHAPTER 10 USB HOST: HARDWARE AND SOFTWARE ............................ .. 207
`
`10.1, Overview of the USB Host .................................................................................................................207
`10.1.1 Overview..........................
`.... ..207
`10.1.2 Control Mechanisms
`.... ..210
`10.1.3 Data
`.... ..210
`10.1.4 Collecting Status and Activity Statistics
`.... ..21l
`10.1.5 Electrical InterfaceConsiderations
`
`
`
`10.2 Host Controller Requirements ..........................................................................................................211
`10.2.1 State
`10.2.2
`212
`10.2.3 Frame
`10.2.4 Data Processing .............................................................................................................................2l3
`
`10.2.5 Protocol Engine...........
`10.2.6 Transmission Error Handling ....................................... ..
`10.2.7 Remote
`10.2.8 Root Hub ...................................................................... ..
`
`213
`214
`214
`
`10.2.9 Host System Interface
`
`
`10.3 Overview of Software Mechanisms ...................................................................................................2l4
`10.3.1 Device Configuration.....................................................
`215
`10.3.2 Resource
`217
`10.3.3Data ......2l7
`10.3.4 Common Data Definitions
`
`10.4 Host Controller Driver.......................................................................................................................2l8
`
`10.5 Universal Serial Bus Driver ...............................................................................................................219
`10.5.1 USBDOverview
`10.5.2 USBD Command Mechanism Requirements .............................................................................. ..221
`10.5.3 USBD Pipe Mechanisms .............................................. ..
`223
`10.5.4 Managing the USB via the USBD Mechanisms ............... ..
`
`10.5.5 Passing USB Preboot Control to the Operating
`
`10.6 Operating System Environment Guides...........................................................................................227
`
`CHAPTER 11 HUB SPECIFICATION ................ ..~. .............................................. .. 229
`
`
`
`11.1 Overview .............................
`11.1.1 Hub Architecture...........
`11.1.2Hub
`
`......229
`.... ..230
`........230
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`11.2 Hub Frame
`. . . . .. . . . . . . . . . . . . .233
`1 1.2.1 Frame Timer Synchronization . . . . . . . . . . . . . . . . . .
`11.2.2 EOF1 and EOF2 Timing Points .................................................................................................. ..234
`
`
`
`11.3 Host Behavior at
`......23 5
`11.3.1 Latest Host Packet ........................... ..
`
`....235
`11.3.2 Packet Nullification ............................. ..
`11.3.3 Transaction Completion Prediction ........................................................................................
`
`Internal Port ..................................................................................................................................... ..237
`11.4
`11.4.1
`Inactive.......................
`....237
`
`
`
`11.4.2 Suspend Delay .......... ..
`
`11.4.3 Full Suspend (Fsus).....................
`11.4.4 Generate Resume (GResume)
`
`237
`237
`
`..................................... ..239
`...........
`11.5 Downstream
`11.5.1 Downstream Port State Descriptions ........................................................................................... ..24O
`11.5.2 Disconnect Detect
`
`......244
`.. ..
`.
`11.6 Upstream Port........................................................... .
`
`.... ..244
`11.6.1 Receiver......................
`
`11.6.2
`
`.
`
`11.7 Hub Repeater......................................................................................................................................249
`1 1.7.1 Wait for Start of Packet from Upstream Port (WFSOPFU)
`........250
`1 1.7.2 Wait for End of Packet from Upstream Port (WFEOPFU)
`.......25O
`11.7.3 Wait for Start ofPac1cet (WFSOP)
`......2S1
`11.7.4 Wail for End ofPacket
`
`
`
`11.8 Bus State Evaluation .................................................................................
`11.8.1 Port
`
`11.8.2 Speed
`11.8.3
`1 1.8.4 Full- versus Low-speed Behavior.......
`
`......252
`....252
`
`11.9 Suspend and Resume ...........................
`
`................................ ..253
`
`11.10 Hub Reset
`11.10.1 Hub Receiving Reset on Upstream
`
`.........................................................................254
`
`11.11 Hub Port Power Control............................................................................
`11.11.1 Multiple Gangs ......................................................... ..
`
`.......................................256
`11.12 Hub [/0 Buffer Requirements .......
`.... ..256
`1 1.12.1 Pu11—up and Pull-down Resistors
`....256 1 1.12.2 Edge RateControl
`
`
`
`
`
`
`11.13 Hub Controller ...................
`11.13.1 Endpoint Organization........................................
`11.13.2 Hub Information Architecture and
`11.13.3 Port Change lnfonnation
`259
`1 1.13.4 Hub and Port Status Change Bitn1ap........
`
`1113.5 Over-current Reporting andRecovery
`
`256
`257
`
`11.14 Hub Configuration .................................
`
`................................26l
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`11.15 Descriptors .............................................................................................................................
`...........263
`
`11.15.! Standard
`11.15.71 Class—specif'1c Descriptors ........................................................................................................... ..264
`
`............................................................................. ..266
`.....
`11.16 Requests................................................
`1 1.16.1 Standard Requests ....................................................................................................................... ..266
`11.162 Class-specific Requests ............................................................................................................... ..267
`
`INDEX .................................................................................................................. .. 281
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`Universal Serial Bus Specification Revision 1.1
`
`Figures
`
`Figure?»-1. Application
`
`Figure 4-1. Bus Topology .................................................................................................................................. .. 16
`
`Figure 4-2. USB
`
`Figure 4-3. ATypical
`
`Figure 4-4. Hubs in a Desktop ComputerEnvironment
`
`Figure 5-1. Simple USB Host/DeviceView
`
`Figure 5-2. USB Implementation Areas
`
`Figure 5-3.Host
`
`Figure 5-4. Physical Device
`Figure 5-5. USB Physical Bus
`
`Figure 5-6. USB Logical Bus
`
`Figure 5-7. Client Software-to-fiinction
`
`Figure 5-8. USB Host/Device DetailedView
`
`Figure 5-9. USB CommunicationFlow
`
`Figure 5-10. USB Information Conversion From Client Software to
`
`Figure 5-1 1. Transfers for Communication
`
`Figure 5-12. Arrangement ofIR.Ps to Transactions/Frames
`
`
`
`
`
`....50
`52
`
`Figure 5-13. Non-USB IsochronousExample
`
`Figure 5-14. USB Isochronous
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`Figure 5-15. Example Source/SinkConnectivity
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`Figure 5-16. Data
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`Figure 5-17. Packet and Buffer Size Formulas for Rate-Matched [sochronous Transfers...................................72
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`Figure 6-1. Keyed Connector
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`Figure 6-2. USB Detachable CableAssembly
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`Figure 6-3. USB Full-speed Hardwired Cable
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`Figure 6-4. USB L0w—speed Hardwired Cable
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`Figure 6-5. USB
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`Figure 6-6. Typical USB PlugOrientation
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`Figure 6-7. USB Series "A" Receptacle Interface and‘ MatingDrawing
`Figure 6-8. USB Series "B" Recptacle Interface and MatingDrawing
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`Figure 6-9. USB Series "A" Plug Interface
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`Figure 6-10. USB Series “B” Plug Interface
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`Figure 6-11. Typical Full-speed CableConstruction
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`Figure 6-12. Single Pin-Type Series "A" Receptacle
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`Figure 6-13. Dual Pin—Type Series "A" Receptacle ...................................................................................... ..104
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`Figure 6-14. Single Pin-Type Series "B" Receptacle
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`105
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`Figure 7-1. Maximum Input Waveforms for USB Signaling .......................................................................... .. 107
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`Figure 7-2. Example Full-speed CMOS Driver Circuit ................................................................................... .. 108
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`Figure 7-3. Full-speed Buffer V/1 Characteristics
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`Figure 7-4. Full-speed Signal Waveforms ....................................................................................................... ..l 10
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`Figure 7-5. Low—speed DriverSignal
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`Figure 7-6. Data Signal Rise and Fall Time .................................................................................................... ..1 11
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`Figure 7-7. Full-speed Load
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`1 11
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`Figure 7-8. Low-speed Port Loads .................................................................................................................. ..l12
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`Figure 7-9. Differential Input Sensitivity Range
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`Figure 7-10. Full-speed Device Cable and Resistor
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`Figure 7-1 1. Low-speed Device Cable and Resistor
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`1 13
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`1 13
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`1 14
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`Figure 7-12. Placement of Optional Edge Rate Control Capacitors ................................................................ .. 1 15
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`Figure 7-13. Upstream Full-speed Port
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`Figure 7-14. Downstream Port
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`1 17
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`17
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`Figure 7-15. Disconnect
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`Figure 7-16. Full-speed Device Connect
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`Figure 7-17. Low-speed Device Connect
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`18
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`19
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`Figure 7-18. Bus State Evaluation after reset (optional)...............................
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`Figure 7-19. Power-on and Connection Events Timing ............................. ..
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`Figure 7-20. Packet Voltage
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`...l 19
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`120
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`121
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`Figure 7-21. NR7.l DataEncoding
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`Figure 7-22. Bit Stuffing
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`Figure 7-23. Illustration of Extra Bit Preceding
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`Figure 7-24. Flow Diagram for Bit
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`124
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`125
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`125
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`Figure 7-25. Sync Pattern ................................................................................................................................ .. 126
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`Figure 7-26.
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`Figure 7-27. SEO for EOP Width
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`128
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`Figure 7-28. Hub Propagation Delay of Full-speed Differential129
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`Figure 7-29. Full-speed Cable
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`Figure 7-30. Low-speed Cable
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`Figure 7-31. Worst-case End to End Signal Delay
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`Figure 7-32. Compound Bus-powered
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`132
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`134
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`135
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`Figure 7-33. Compound Self-powered Hub136
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`Figure 7-34. Low-power Bus-powered
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`Figure 7-35. High-power Bus-powered
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`Figure 7-36. Self-powered
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`Figure 7-37. Worst—case Voltage Drop Topology (SteadyState)
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`Figure 7-38. Typical Suspend Current AveragingProfile
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`Figure 7-39. Differential Data
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`Figure 7-40. Differential-to-EOP Transition Skew and EDPWidth
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`Figure 7-41. Receiver Jitter Tolerance............................................................................................................. ..l5l
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`Figure 7-42. Hub Differential Delay, Differential Jitter, and SOP Distortion
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`Figure 7-43. Hub EOP Delay and EOP
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`Figure 8-1. PID Format.................................................................................................................................... ..|55
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`Figure 8-2. ADDRField
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`Figure 8-3. Endpoint
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`Figure 8-4. Data Field
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`Figure 8-5. Token
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`Figure 8-6. SOF
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`Figure 8-7. DataPacket
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`Figure 8-8. Handshake
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`Figure 8-9. Bulk Transaction
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`Figure 8-10. Bulk Reads and
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`...164
`...165
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`167
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`...163
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`
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`Figure 8-11. Control SETUP Transaction
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`Figure 8-12. Control Read and Write Sequences ................... ..
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`Figure 8-13. Interrupt Transaction Format ..................... .. .
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`isochronous Transaction
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`Figure 8-14.
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`Figure 8-15.SETUP
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`Figure 8-16. ConsecutiveTransaetions........................................................._._._._..._..._......................................l69
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`Figure 8-17. NAKed Transaction with
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`Figure 8-18. Corrupted ACK Handshake withRetry
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`Figure 8-19. Low-speed
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`Figure 8-20. Bus Tum-around Timer
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`Figure 9-1. Device StateDiagram
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`Figure 9-2. wlndex Format when Specifying an
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`Figure 9-3. wlndex Format when Specifying an Interface
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`Figure 9-4. Information Returned by aGetStatus() Request to aDevice
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`Figure 9-5. Information Returned by a GetStatus() Request to a Interface
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`Figure 9-6. Information Returned by a GetStatus() Request to an
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`Figure 10-1. Interlayer Communications
`
`Figure 10-2.Host
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`Figure 10-3. Frame
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`Figure 10-4. Configuration Interactions
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`Figure 10-5. Universal Serial Bus Driver
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`Figure 11-1. Hub
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`Figure 11-2. Hub Signaling
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`Figure 11-3. Resume
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`Figure 11-4. EOF Timing Points
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`Figure 11-5. Intemal Port State
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`Figure 11-6. Downstream Hub Port State
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`Figure 11-7. Upstream Poit Receiver StateMachine
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`Figure 11-8. Upstream Hub Port Transmitter State Machine
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`Figure 11-9. Hub Repeater State
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`Figure 11-10. Example Remote-Wakeup Resume Signaling .......................................................................... ..254
`Figure 11-11. Example Hub ControllerOrganization
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`Figure 1 1-12. Relationship of Sta