UNITED STATES PATENT AND TRADEMARK OFFICE
`___________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________
`
`NVIDIA CORPORATION,
`Petitioner,
`
`v.
`
`POLARIS INNOVATIONS LIMITED,
`Patent Owner.
`_________
`
`Case IPR2017-00381
`Patent 7,886,122 B2
`___________
`
`Record of Oral Hearing
`Held: March 8, 2018
`___________
`
`
`
`
`Before SALLY C. MEDLEY, BARBARA A. PARVIS, and MONICA S.
`ULLAGADDI, Administrative Patent Judges.
`
`
`
`
`
`
`___________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________
`
`NVIDIA CORPORATION,
`Petitioner,
`
`v.
`
`POLARIS INNOVATIONS LIMITED,
`Patent Owner.
`_________
`
`Case IPR2017-00381
`Patent 7,886,122 B2
`___________
`
`Record of Oral Hearing
`Held: March 8, 2018
`___________
`
`
`
`
`Before SALLY C. MEDLEY, BARBARA A. PARVIS, and MONICA S.
`ULLAGADDI, Administrative Patent Judges.
`
`
`
`
`
`
`
`Case IPR2017-00381
`Patent 7,886,122 B2
`
`
`
`APPEARANCES:
`
`ON BEHALF OF THE PETITIONER:
`
`
`JEREMY J. MONALDO, ESQUIRE
`DAVID HOFFMAN, ESQUIRE
`DREW GOLDBERG, ESQUIRE
`Fish & Richardson, PC
`1425 K Street, N.W.
`11th Floor
`Washington, DC 20005
`
`
`ON BEHALF OF THE PATENT OWNER:
`
`
`MATTHEW C. PHILLIPS, ESQUIRE
`DAVID MEEKER, ESQUIRE
`Laurence & Phillips
`7327 SW Barnes Road, #521
`Portland, OR 97225
`
`and
`
`Ben Damstedt, Esquire (Nvidia)
`
`
`
`
`The above-entitled matter came on for hearing Thursday, March 8,
`
`2018, commencing at 10:00 a.m., at the U.S. Patent and Trademark Office,
`600 Dulany Street, Alexandria, Virginia.
`
`
`
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`Case IPR2017-00381
`Patent 7,886,122 B2
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`
`P R O C E E D I N G S
`- - - - -
`JUDGE PARVIS: Good morning, everyone. This is oral
`
`
`argument in IPR 2017-00381. The patent is U.S. Patent No. 7,886,122 B2.
`The Petitioner is Nvidia Corporation; the Patent Owner is Polaris
`Innovations Limited.
`
`
` I am Administrative Judge Parvis. Judges Medley and
`Ullagaddi are here next to me.
`
`
`At this time, we'd like counsel to introduce yourselves, your
`partners and your guests, starting with the Petitioner. Please use the
`microphone.
`
`
`MR. MONALDO: Thank you, Your Honor. Jeremy Monaldo,
`Fish & Richardson, representing Nvidia Petitioner, joined by David
`Hoffman, Drew Goldberg and Ben Damstedt for Nvidia.
`
`
`May we approach the bench with copies of our demonstratives,
`Your Honor?
`
`
`JUDGE PARVIS: Yes.
`
`
`(Pause.)
`
`
`JUDGE PARVIS: Counsel for Patent Owner?
`
`
`MR. PHILLIPS: Good morning, Your Honors, Matthew
`Phillips and Derek Meeker from Laurence & Phillips for the Patent Owner.
`
`
`JUDGE PARVIS: Thank you.
`
`
`MR. PHILLIPS: We also have copies of our demonstratives.
`
`
`JUDGE PARVIS: Okay. You may approach.
`
`
`(Pause.)
`
`
`JUDGE PARVIS: Before we begin, we want to remind the
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`parties that the hearing is open to the public and a full transcript of it will
`become part of the record. Also, please keep in mind that whatever is
`projected on the screen will not be viewable by anyone reading the
`transcript. When you are referring to a document on the screen, please state
`in the microphone information to identify the document that you're referring
`to, such as Petitioner's demonstratives and the slide number.
`
`
`As you know from our oral hearing order of January 31st, 2018,
`each side will have 30 minutes total to present its arguments. Because the
`Petitioner has the burden show unpatentability of the claims, Petitioner will
`proceed first, followed by Patent Owner. Petitioner may reserve some time,
`but only for rebuttal of Patent Owner's presentation. I will be using the
`clock on the side wall over here.
`
`
`So any time you're ready, Counsel for the Petitioner, you may
`proceed.
`MR. MONALDO: Thank you, Your Honor. Is it possible to
`
`
`get the clock, the digital clock behind you?
`
`
`JUDGE PARVIS: Do you want this clock working?
`
`
`MR. MONALDO: If that would be -- if that's possible, that
`would be great, thank you.
`
`
`JUDGE PARVIS: How much time do you want for rebuttal?
`
`
`MR. MONALDO: I'm hoping to leave ten minutes.
`
`
`(Pause.)
`
`
`JUDGE PARVIS: Okay.
`
`
`MR. MONALDO: May it please the Board, my name is
`Jeremy Monaldo from Fish & Richardson, representing Nvidia, Petitioner.
`I'm joined by David Hoffman and Drew Goldberg, from our firm, as well as
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`Case IPR2017-00381
`Patent 7,886,122 B2
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`Ben Damstedt from Nvidia.
`
`
`Today, we are scheduled to discuss one IPR involving Polaris'
`122 patent.
`Moving to slide 2, you'll see that we provided a table of
`
`
`contents for convenient reference to the various sections of our
`demonstratives. We have organized our slides into seven disputed issues
`that I'll reference throughout our presentation. Our goal is to use our time
`efficiently. My first discussion is a brief overview of the 122 patent and
`then discussing a subset of issues in grounds 1 through 4. That said, our
`primary objective is to ensure we address any questions Your Honors might
`have, so please feel free to steer the discussion in any way you deem helpful.
`
`
`With that background, I'd like to move to slide 6 and start with
`an overview of the 122 patent.
`
`
`As shown in the background section presented in the upper
`right of slide 6, the inventors of the 122 patent recognized a problem with
`using a double frequency or high frequency clock for command-and-address
`data. Because command-and-address data is received less frequently, using
`the high frequency clock was unnecessary and consumed more power than
`needed.
`The summary section shown at the lower right of slide 6
`
`
`describes a proposed solution, using two clocks, a first clock with a lower
`frequency for commands and addresses, and a second clock with a higher
`frequency for your data signals.
`
`
`This is illustrated on slide 7 of our demonstratives where you
`see an annotated version of the 122 patent's figure 4. As you can see on
`slide 7, you have a low frequency clock, highlighted in green, used for
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`commands, highlighted in purple. You also have a high frequency clock,
`highlighted in red, used for data, DQ, highlighted in blue.
`
`
`Now, moving to slide 9, I'd like to compare the operation of the
`122 patent with the operation of the Lee prior art reference. So, slide 9
`shows you an annotated version of Lee's figure 6, which is an analogous
`timing diagram to what we just reviewed for the 122 patent. Again, as you
`can see, Lee's diagram is nearly identical to the 122 patent. You have a low
`frequency clock, highlighted in green, used for commands, highlighted in
`purple. You also have a high frequency clock, highlighted in red, and used
`for data, DQ, highlighted in blue.
`
`
`As a comparison of these timing diagrams illustrates, Lee quite
`clearly disclosed the proposed solution of the 122 patent and the features
`that the inventors themselves thought were new and inventive. This is not in
`dispute. Polaris does not argue that Lee is missing any of these features that
`the inventors themselves thought were new when they filed for the 122
`patent.
`Now I'd like to move to slide 7 to discuss what Polaris is
`
`
`arguing -- or slide 11. As shown on slide 11, Polaris makes just three
`arguments on ground 1. First, that Lee's DRAM memory devices are
`missing read and write operations; two, they're missing a memory away;
`and, three, they're missing a memory interface. Each of these items is a
`basic, well-known feature of DRAM memory devices that the inventors of
`the 122 patent simply did not invent.
`
`
`As we'll discuss and you'll see in the briefing, Polaris offers no
`evidence that Lee's DRAM memory devices lack these features. To the
`contrary, Polaris' own expert has admitted that these features are basic
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`memory features found in DRAM memory devices such as Lee's. With
`these admissions and Dr. Jacob's explanation of how Lee's DRAM memory
`devices have these very basic memory features, the evidence is squarely on
`one side and dictates a finding that Lee in fact describes these basic memory
`features.
`With that background, I'd like to move to slide 14 to discuss the
`
`
`first issue, read and write operations. So as shown in slide 14, we have
`excerpts from Dr. Jacob's declaration explaining how Lee discloses read and
`write operations. As Dr. Jacob explained, although Lee uses the terms
`output and input, Lee is referring to read and write operations, fundamental
`operations performed by memory. In fact, the entire purpose of DRAM
`memory, as described by Lee, is to perform storage using read and write
`operations. Dr. Jacob confirms this and, as you'll see on slide 15, Polaris
`offers no evidence to contradict it.
`
`
`So, moving to slide 15, we have an excerpt of Polaris' Patent
`Owner response discussing the read and write operation argument and, as
`you can see, it doesn't cite to any evidence, much less a supporting
`declaration from its expert, and that declaration never refutes Dr. Jacob's
`testimony.
`JUDGE PARVIS: Well, there's a dispute on claim construction
`
`
`with respect to independent claims, correct, and whether read and write
`operations read and writeaccess memory, right?
`
`
`MR. MONALDO: Yes, that's correct; there is a dispute on that
`issue, Your Honor. But, you know, to that point, though, we have no dispute
`on whether Lee performs an actual read or write operation based on either
`construction and our position is that the ordinary meaning of those terms,
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`read and write, are clearly met and described by Lee in his DRAM memory
`devices, which that's their entire purpose, to read and write from those
`memories.
`If you see on slide 16 where we provide an excerpt from Dr.
`
`
`Przybylski's deposition, Dr. Przybylski actually agrees. You can see in the
`above quoted testimony that first Lee contemplates DRAM memory devices.
`There's no dispute, Lee has DRAM memory. And then, two, quote,
`"Certainly, DRAMs perform read and write operations."
`
`
`With this testimony, both experts agree that Lee's DRAM
`memory devices perform read and write operations. In this situation, the
`entirety of the evidence confirms that Lee performs reads-and-writes, there's
`simply no evidentiary basis to find otherwise.
`
`
`So now, given that all of Polaris' arguments on ground 1 are
`similar and relate to basic, well-known memory features, I thought I'd
`transition to grounds 3 and 4, to make sure we had sufficient time to discuss
`those combinations set forth in those grounds. However, before
`transitioning, I want to make sure I've addressed any questions Your Honors
`might have and simply wanted to note that Polaris' arguments for issues 1, 2
`and 3 all rely on narrow constructions of broad, general terms. I believe the
`briefing is clear on why those constructions fail the broadest reasonable
`interpretation standard and, as with the read and write operations we've just
`discussed, the evidence demonstrates that those features are just simply
`basic, well-known features formed by any memory device such as Lee's.
`
`
`So if there are any questions --
`
`
`JUDGE PARVIS: I have a question on independent claim 24.
`
`
`MR. MONALDO: Sure.
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`JUDGE PARVIS: You made arguments based on Lee. Does
`
`
`Dr. Jacob testify that Lee's interface is equivalent to the interface 150 in the
`challenged patent?
`
`
`MR. MONALDO: Excuse me, what was the question, Your
`Honor?
`JUDGE PARVIS: Does your expert testify that Lee's interface
`
`
`is equivalent to the interface 150?
`
`
`MR. MONALDO: Yes, Your Honor. Dr. Jacob has testified,
`and I think it's pretty clear in our briefing, that a memory interface is a
`structure that the ’122 patent uses to describe -- or perform the function of
`the means for interfacing. And so when you look at it, we're not necessarily
`limiting to memory interface 150 identically, but we've found that as a
`structure described, memory interface in the ’122 patent; in Lee, has that
`same type of memory interface. We've heard from Polaris that that interface
`requires an additional signal, the read clock signal --
`
`
`JUDGE PARVIS: Yes.
`
`
`MR. MONALDO: -- we don't believe that's necessary. And as
`you can see on our slide 36, that read clock signal is first introduced in claim
`25, it's not in claim 24 where you have the means for interfacing. If you
`look at claim 24, you have a means for interfacing, and then later in that
`claim -- it's not shown here on the slide, but as you'll see later in the claim, it
`tells you that it receives two types of signals through that via that means for
`interfacing, the first clock signal and the second clock signal. Those are the
`data clock signals that are clearly set forth in Lee and there's no dispute that
`those signals are present. So there's no reason to construe means for
`interfacing any more narrowly than to require the structure of those two
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`signals, which Lee has. Including the read clock signal would render claim
`25 actually redundant when it introduces that signal later on and is not part
`of the function. It doesn't even describe that the read card signal was
`received via that means interface -- the means for interfacing.
`
`
`So, in our opinion, the construction as a memory interface is
`valid and Lee has memory interface, and our experts testified to that.
`
`
`JUDGE PARVIS: So Petitioner's position is based on the
`interface control device disclosed in the specification, but perhaps only
`certain -- a certain structure in that interface. And Petitioner is not
`contending that Lee is equivalent to the structure that also includes that read
`clock signal, is that correct?
`
`
`MR. MONALDO: So, partially, Your Honor. So to the first
`point, I'd say that the law, and we cited it to you in our brief, it doesn't
`require you to have every structural element in the specification, just what's
`needed to perform the function. We think what's needed to perform the
`function is just the two clocks, the data clock and the (indiscernible) clock.
`So that's the first point. And, two, we think Lee actually does have the
`structure, it has the STROBE signal additionally and our experts testified to
`that.
`So, Lee's interface, as we've discussed and I'll discuss a little bit
`
`
`later on in our presentation, has an interface where you have two clocks and
`a STROBE, the same interface as the 122 patent's memory interface 150.
`
`
`JUDGE PARVIS: Claim 25, the grounds on claim 25, for
`example, are not anticipation, is that correct?
`
`
`MR. MONALDO: That's correct. They're obviousness
`grounds where we rely on secondary references Yoo and Kyung.
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`JUDGE PARVIS: You also rely on the combination of the two
`
`
`embodiments in Lee, is that correct?
`
`
`MR. MONALDO: We can discuss that --
`
`
`JUDGE PARVIS: Okay.
`
`
`MR. MONALDO: -- but --
`
`
`JUDGE PARVIS: We're moving into grounds 3 and 4.
`
`
`MR. MONALDO: Yeah, we're moving to grounds -- right
`where I wanted to go, Your Honor, thank you.
`
`
`JUDGE PARVIS: Okay.
`
`
`MR. MONALDO: So if we move over to slide 40, where I was
`headed, you see represented claim 10 with the features that are addressed by
`grounds 3 and 4. As shown, the primary feature there is the read clock
`signal generated from the second clock signal and that's the high frequency
`data clock.
`We have this on slide 43 and you can see a comparison. As we
`
`
`discussed, Lee is very similar to the 122 patent in this regard, they both have
`this high frequency data clock. And as you see highlighted and outlined in
`blue below, they both also have something that we consider a read clock; in
`Lee, it's just termed a STROBE.
`
`
`So now moving to slide 44, there's been four issues raised as to
`grounds 3 and 4. I'd like to start with that first issue, and this is really to
`your question, Judge Parvis, and Polaris' argument that there's only a single
`embodiment, and we don't show a single embodiment of two external clocks
`and a STROBE.
`
`
`And so if we move to slide 47, you can see here Lee's figure 6
`quite clearly shows a timing diagram and just two clocks and a STROBE.
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`It's right there, right there on the screen, one embodiment, two clocks and a
`STROBE.
`Lee also confirms this in text. As shown on slide 48, Lee
`
`
`specifically confirms that the second embodiment includes a STROBE, and
`I'll quote the language for you here. "In the case where the data buffer
`included in the memory chip of the first or second embodiment is connected
`to receive a data STROBE signal." STROBE, explicit, the second
`embodiment includes the STROBE.
`
`
`So with this disclosure, Polaris' primary challenge to the
`combinations set forth in grounds 3 and 4 fails. Lee does have a single
`embodiment with a STROBE. So we're not mixing embodiments, we're not
`pulling from embodiment 1. We have explicit disclosure here of how Lee
`has in its second embodiment two external clocks and a STROBE.
`
`
`JUDGE PARVIS: Petitioner's position is that the claims do
`require the two clocks and the STROBE, correct?
`
`
`MR. MONALDO: Yes, I believe that's true.
`
`
`JUDGE PARVIS: For claims 2 and 25 --
`
`
`MR. MONALDO: Yeah, for the dependent claims, which is
`claim 10, you have a read clock signal that's generated from the second
`clock signal. So we do have two clocks and a read clock signal, the
`STROBE, and that's clearly shown in the Lee reference, as well as the other
`--
`JUDGE PARVIS: Now, Petitioner --
`
`
`MR. MONALDO: -- secondary references.
`
`
`JUDGE PARVIS: Okay, sorry. And Petitioner is relying on
`
`
`Lee's disclosure of two clocks and a STROBE. And Petitioner is not arguing
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`that say Lee teaches, well, in the alternative, there's an embodiment with one
`clock and a STROBE or two clocks, that it would be obvious to combine
`Yoo or some other secondary reference, with Lee -- Petitioner is relying on
`Lee specifically for the two clocks and the STROBE?
`
`
`MR. MONALDO: I'd say that we are relying on Lee, yes, but
`not exclusively. So we are making that second argument as well that we
`have secondary references here, we have other references. Yoo, which has a
`STROBE, and obvious looking at Yoo to use the Yoo STROBE in the
`combination of Lee, and I think we set forth reasons why we would do that.
`The same thing with Kyung. We in our petition have made the argument
`that, look, there -- the STROBE of Lee is there, but you could use the
`STROBE or the data out clock of Kyung.
`
`
`So there are two arguments here where we do rely on Lee for
`sure, and I think it's clear that there is an embodiment that does have the
`STROBE signal, and secondarily, we have our secondary references, which
`come in and adding the STROBE or the read clock signal in the same way as
`the 122 patent.
`
`
`JUDGE PARVIS: And one of the reasons then to add that
`STROBE when, for example, there's two clocks -- without Lee, would there
`be other reasons to add a STROBE?
`
`
`MR. MONALDO: For sure. And I think both Kyung and Yoo
`describe them, and I'll focus on Yoo specifically, and it's for
`synchronization. It's needed to properly read data out of the memory circuit.
`I mean, Yoo is quite clearly directed to that and tells you the importance of
`that synchronization and how the STROBE plays an important impact in
`making sure that the STROBE signal is synchronized with the data signal, so
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`you can collect while receiving.
`
`
`So I think that reason alone is sufficient to motivate that
`addition of the STROBE and Yoo tells you there's benefits to doing that.
`You don't have to use a PLL or DLL with its solution and you can reduce the
`cost of memory and operate high speeds without using one of those more
`expensive mechanisms so I think there's quite a record developed here and
`arguments made that a person of ordinary skill in the art would look to
`something like Yoo and add a STROBE into Lee, even if you assume that
`Lee's STROBE was nonexistent and not disclosed.
`
`
`JUDGE PARVIS: In the second embodiment, when we have a
`clock signal already, why do we need the STROBE for synchronization?
`
`
`MR. MONALDO: So the STROBE is actually added in
`addition to the clock signal for additional synchronization benefits. As you
`can see, at least the tiny diagram in figure 6, you have your clock signal
`that's -- it's a free-grinding clock, and then you have a STROBE signal there
`that's added in line with the data. So the STROBE signal actually is
`beneficial to the synchronization and the clocking and the output of the data.
`So you actually do need it and Lee confirms this, it doesn't render redundant
`the second clock signal. You have that first embodiment -- and I'm not
`mixing embodiments here, but I'm just giving you an example where you do
`have a second clock and a STROBE, unequivocally, they're both used and
`they're both necessary.
`
`
`So unless there's any more questions on that embodiment issue
`for Lee, I'd like to move to slide 50. So, additionally, Polaris argues that
`Yoo's STROBE signal is not generated from its data file signal. Yoo,
`however, describes a very similar circuit to the 122 patent.
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`So, moving to slide 51, you can see the similarity between
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`Yoo's circuit in figure 7 on the left-hand side of slide 51 and the 122 patent
`circuit in figure 1 on the right-hand side of slide 51. Both circuits receive a
`clock signal, highlighted in red. Both circuits use that received clock signal
`to produce an internal read clock, highlighted in purple, and referred to with
`nearly identical terminology. And both circuits then provide that internal
`read clock or component, in Yoo it's the STROBE signal generator, 71(b),
`and in the 122 patent it's their off-chip driver, 126, and that component
`generates the read clock signal, highlighted in yellow.
`
`
`So, notably, the driver 126 in the 122 patent is essentially a
`black box. The patent, the 122 patent gives limited details on how that
`driver actually generates the read clock signal from the internal read clock.
`It simply takes the read clock, the internal read clock as an input and
`provides the read clock signal as an output.
`
`
`And as the comparison on slide 51 demonstrates, Yoo's circuit
`does the same thing. It takes the internal read clock as an input and
`produces the STROBE as an output. Now, this alone is sufficient to meet
`the signal limitations in ground 3. Your Honors really need to look no
`further than the material presented on this slide to find for Nvidia.
`
`
`However, because Polaris attempts to dismiss the importance of
`Yoo's internal read clock by focusing on other technical arguments, I'd like
`to move to slide 52 to discuss specifics on how Yoo's STROBE signal
`generator actually uses the internal read clock to generate the STROBE
`output.
`And so in slide 52, in the upper text box you can see Dr. Jacob
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`quoting Dr. Przybylski's argument that Yoo's internal read clock does not
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`affect Yoo's STROBE signal and Yoo's latches have no function. As Dr.
`Jacob notes, this is just not correct.
`
`And I'll begin with a discussion
`of what would happen if Yoo's internal read clock were removed from the
`circuit and the answer is simple. As Dr. Jacob explains in his declaration on
`this slide, if you remove the internal read clock, the latches would not
`operate, because they would have no clock input. Yoo's latches do not
`provide intended output unless and until their internal read clock signal is
`received. You would not have a STROBE but for the internal read clock.
`This shows how Yoo's STROBE signal is generated from the internal read
`clock and it's important, because Dr. Przybylski agrees. You can see that on
`slide 53.
`We have an excerpt of Dr. Przybylski's deposition where we
`
`
`asked him what would happen if you removed this internal read clock, and
`his answer, "It would be an improper circuit design." This confirms Dr.
`Jacob's testimony and demonstrates how Yoo's internal read clock is
`essential to operation of the circuit.
`
`
`Now, again, this is -- alone this evidence is sufficient, but Dr.
`Jacob went further in explaining how the internal read clock is used for
`synchronization of the STROBE signal. You can see this on slide 54 where
`Dr. Jacob gave you two tiny diagrams, the first being without -- a tiny
`diagram without the latches and the second being with the latches. As you
`can see, when you don't have the latches, you have issues with the phase and
`the slope of the signals, they're not synchronized. That's the entire point of
`Yoo's invention: you need these latches to ensure proper synchronization.
`The internal read clock gives that to you by influencing the timing
`characteristics of the slope and the rise and fall times of the signals.
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`Case IPR2017-00381
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`JUDGE PARVIS: Dr. Jacob created the timing diagrams on
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`slide 54, is that correct?
`
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`MR. MONALDO: That is correct, he did, Your Honor.
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`JUDGE PARVIS: And he does say that the multiplexer outputs
`the output signals in response to the control signal, is that correct?
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`MR. MONALDO: Yes, Your Honor.
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`JUDGE PARVIS: But Petitioner's position is that the clock
`signal is also needed and, therefore, it satisfies the language of the claim, is
`that correct?
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`MR. MONALDO: Absolutely, Your Honor, that's exactly
`right. And we're not saying the control signal does not play a role, it does,
`but the internal read clock certainly does, as I've just described.
`
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`JUDGE PARVIS: And that's based on Dr. Jacob's analysis of
`figure 7; is that correct, or does Yoo actually include text describing the
`operation of the clock?
`
`
`MR. MONALDO: Yes, Your Honor, as is based on Dr. Jacob's
`explanation, but Yoo also does describe how the internal clock read as
`shown on figure 7 is connected, it's used to control the latches, it talks about
`latching the VSS and VE values at edges of that clock, and --
`
`
`JUDGE PARVIS: Is that at columns 5 and 6 of Yoo or is there
`another --
`MR. MONALDO: I don't think that's right, Your Honor. I
`
`
`don't have Yoo in front of me.
`
`
`JUDGE PARVIS: You don't have to answer it, if you want to
`answer it on rebuttal.
`
`
`MR. MONALDO: Sure, I'll answer that in rebuttal. And if
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`there are no further questions --
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`JUDGE PARVIS: No further --
`
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`MR. MONALDO: Thank you, Your Honor.
`
`
`(Pause.)
`
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`MR. PHILLIPS: I'm ready when Your Honors are ready.
`
`
`JUDGE PARVIS: Do you want me to set the clock for you or -
`-
`MR. PHILLIPS: If you could, please.
`
`
`JUDGE PARVIS: Sure.
`
`
`(Pause.)
`
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`JUDGE PARVIS: I'll give you a five-minute warning.
`
`
`MR. PHILLIPS: Great, thank you. Thank you and may it
`
`
`please the Board.
`I'd like to jump right to the issue involving
`challenges 3 and 4, which are directed at claims 2, 10, 17, et cetera,
`dependent claims that recite a read clock signal generated from the second
`clock signal. And I want to explain how Lee is an irreparably flawed
`primary reference that is not cured by either secondary reference and I want
`to do that in two steps.
`
`
`The first step is I want to make it really clear exactly what
`combinations of Lee and the secondary references were proposed in the
`petition, and then I'll explain the problem with Lee that is not cured by those
`secondary references.
`
`
`So, if we look at what the petition says about challenges 3 and
`4, and actually first take a step back to challenge 2, which is not instituted in
`this trial, but it's informative about what challenges 3 and 4 say. Recall that
`challenge 2 was a single-reference obviousness challenge based on Lee
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`alone where the contention was that one skilled in the art would have found
`it obvious to generate Lee's STROBE from Lee's high frequency clock. That
`was stated over and over in the petition and Dr. Jacob's declaration. And
`then challenges 3 and 4 piggyback onto that. And we have statements in the
`petition that say one skilled in the art would have found it obvious to use
`Yoo's clock driver circuitry to generate Lee's STROBE signal and that the
`reason that would have been obvious is that Yoo is merely showing what
`was implicit, but not explicit in Lee.
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`And the Petitioners contend that the reason we should have a
`trial involving all of these multiple redundant challenges 2, 3 and 4 together
`in one trial is that they are so similar, they are all doing the same thing, just
`different teachings of how to fill in the silence in Lee, how to generate Lee's
`STROBE signal. They said that over and over in the petition with regard to
`challenge 3, they said it over and over in the petition with regard to
`challenge 4.
`And Dr. Jacob said the same thing in his declaration. His
`
`
`motivation statements, his reasons why it would be obvious, would have
`been obvious to combine Lee with the secondary references is that those
`secondary references play a very limited role, they teach how to generate
`Lee's STROBE signal, they fill in Lee's silence on that point. And the reply
`says the same thing. The Petitioners have not backed down from this
`position.
`So that's what these challenges are about. These challenges
`
`
`were never presented in the petition in different flavors like 3(a) and 3(b),
`and 4(a) and 4(b), where 3(a) is here's how you teach us how to generate
`Lee's STROBE signal and 3(b) is, oh, by the way, if that doesn't work, here's
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`Case IPR2017-00381
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`a different STROBE signal in Yoo, let's just use that in Lee's system instead.
`That was never clearly set forth in the petition.
`
`
`Recall that the petition must specify its challenges with
`particularity, that's the requirement of 35 U.S.C. Section 312(a)(3). And
`there's a corresponding rule, it's 37 CFR 42.104(b) that says challenges must
`be stated precisely in the petition. That is not what happened here with what
`I will refer to as 3(b) and 4(b), these different variations that they have come
`up with to their two challenges. Had they done that clearly in the petition,
`we could have had a fair trial about those challenges, but they didn't.
`Instead, they based their motivation and their non-redundancy arguments on
`the limited role of the secondary references in teaching how to generate
`Lee's clock signal -- or STROBE signal, I'm sorry.
`
`
`So let me explain the problem with Lee. There is a first
`embodiment, as shown here in figure 3 on slide 22, that has an external
`STROBE, but it only has one external clock. There's an internal clock 1 and
`clock 2, but they're internal. This is not a relevant embodiment and the
`petition never relies upon it. Instead, the petition relies exclusively on Lee's
`second embodim
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