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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SK HYNIX, INC.,
`Petitioner,
`
`v.
`
`NETLIST, INC,
`Patent Owner.
`____________
`
`Cases IPR2017-00667 and IPR2017-00668
`Patent 7,532,537
`____________
`
`Record of Oral Hearing
`Held: April 24, 2018
`
`
`
`
`Before STEPHEN C. SIU, MATTHEW R. CLEMENTS, and SHEILA F.
`McSHANE, Administrative Patent Judges.
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`Cases IPR2017-00667 and IPR2017-00668
`Patent 7,532,537
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`APPEARANCES:
`
`ON BEHALF OF THE PETITIONER:
`
`
`JOSEPH MICALLEF, ESQUIRE
`KELLEY CONATY, ESQUIRE
`Sidley Austin LLP
`1501 K Street, N.W.
`Washington, D.C. 20005
`
`
`
`ON BEHALF OF THE PATENT OWNER:
`
`
`MEHRAN ARJOMAND, ESQUIRE
`Morrison Foerster, LLP
`707 Wilshire Blvd.
`Los Angeles, CA 990017
`
`
`
`
`The above-entitled matter came on for hearing on Tuesday, April 24,
`
`2018, at 1 p.m., at the U.S. Patent and Trademark Office, Madison Building
`East, 600 Dulany Street, Alexandria, Virginia.
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`P R O C E E D I N G S
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`JUDGE MCSHANE: Thank you. Please be seated, and we should
`have Judges Clements and Siu joining us in a moment. Judge Clements?
`Judge Siu?
`JUDGE CLEMENTS: I'm here.
`JUDGE MCSHANE: Judge Siu, can you hear us?
`JUDGE SIU: Yes, I'm here.
`JUDGE MCSHANE: Thank you. Good afternoon. We are here
`today, we actually have two afternoon sessions today. The first session
`which we'll be hearing now are the oral hearings for IPR2017-00667 and
`00668. This is the SK Hynix, a variety of different companies for Hynix,
`and then the Netlist. The first session will be approximately two hours and it
`will run until about 3 p.m. Then we're going to have a second session for
`IPR2017-00692 and it will be starting at about 3:10.
`I see we have counsel for all three cases in the room at the moment --
`I recognize you -- for Patent Owner, and I see we have the same Petitioner
`counsel for both sets of hearings this afternoon. Before we get started, we'd
`like to note the two cases came down from the Supreme Court this morning
`and one is the SAS case which changes how the Board has sometimes been
`addressing grounds that are brought by the petition to it. Let me know . . .
`we've had a short time to look at these cases so that includes everybody as
`we sit here today, so we are just going to address the issues that we have
`briefed in front of us for the hearing today. If the parties have something
`that they would like to bring to us in the near term and ask us for a call to
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`consider things that are related to SAS we will certainly consider a call at
`some future near term point. Okay? Everybody understand that? Would
`anybody like to comment on that, and I'll open it up to anybody at all, any of
`the counsel? Any comments on SAS?
`MR. MICALLEF: No comment from Petitioner, Your Honor, except
`perhaps congratulations on maintaining gainful employment.
`JUDGE MCSHANE: Well, I won't comment on that but it's
`employment for probably many people in this room besides the judges for
`instance. But anyway here we are. We're at least all constitutional, we're all
`set on that. So let me turn back to the cases that we're going to hear in this
`first session, and can we have the parties' appearances for these cases, 667
`and 668 cases.
`MR. MICALLEF: Yes, Your Honor. I believe it's 677 and 678, but --
`JUDGE MCSHANE: Oh, sorry.
`MR. MICALLEF: That's okay. Joe Micallef for Petitioners and with
`me is my partner, Kelley Conaty, who's going to make the argument in these
`proceedings. A number of my colleagues are in the room too. My partner
`Brian Nester, my colleagues Wonjoo Suh and Sam Dillon, and from SK
`Hynix my clients, Mr. E. B. Rowe (phonetic), Mr. Sonjun Won (phonetic)
`are also in the room. Thank you.
`JUDGE MCSHANE: Thank you. And for Patent Owner, please.
`MR. ARJOMAND: Good afternoon, Your Honors. My name is
`Mehran Arjomand of Morrison Foerster for Patent Owner Netlist. I would
`just note that the IPR numbers are 2017-00667 and 00668.
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`JUDGE MCSHANE: Okay. Thank you for the clarification. All
`right. And Petitioner, the way we're going to run this, Petitioner it's their
`case in chief so they are going to present their arguments. They can reserve
`some rebuttal time. We'll hear from Patent Owner in their response and then
`we'll hear, again, if any rebuttal time has been reserved. The parties have
`been given an hour each to address both the 667 case and 668 case. Thank
`you. If the parties have any discussions that are specific to either of the
`cases, please try to identify those as you go through it. I understand there's a
`lot of overlap in issues but to the extent there are differences any notations in
`the record will be helpful on that. If you're using demonstratives today, we
`have Judges Clements and Siu who are attending remotely, if you could refer
`to the demonstrative numbers it would be very helpful for them and also be
`helpful for the record and for the judges if you could stick to speaking in the
`microphone at the podium. Thank you, and if Petitioner is ready could you
`please proceed.
`MS. CONATY: Thank you, Your Honor. Kelley Conaty for the
`Petitioners. I would like to reserve 30 minutes time for rebuttal.
`JUDGE MCSHANE: Okay. What I'm going to do here is I'm going
`to give you the full 60 minutes and then we'll see how much is left that you
`have in your case in chief and we'll work from there. Okay. Thank you.
`MS. CONATY: As we've all noted, this proceeding is on two
`petitions related to the 537 patent and that is the 667 and 668 proceedings,
`and in the 667 proceeding the Board instituted trial on all three grounds. We
`see this on slide 2. One on anticipation by Amidi, one on obviousness in
`view of Amidi, and a third on the combination of Amidi and Klein.
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`On slide 3 we see that in the 668 proceeding, the Board instituted trial
`on a combination of Amidi and Klein. As you saw in the reply brief,
`Petitioners have chosen to proceed on only the shared ground of obviousness
`in view of Amidi and Klein. That is ground C in the 667 proceeding. This
`Board therefore does not need to decide the grounds A and B. This shared
`ground of obviousness in view of Klein and Amidi was also at issue in
`related proceeding IPR2014-882 and 883 so the Board has actually already
`considered this combination. Those proceedings involved related patents
`with similar claims that included the selective isolation and the selective
`electrically coupling limitations that are at issue here today and these
`proceedings involved the same prior art references where Diablo
`Technologies made the same arguments of obviousness in view of Amidi
`and Klein, among others.
`Patent Owner likewise made the same arguments supported by the
`same expert. Logically nothing is different here. If anything, Petitioner's
`expert Dr. Stone has contributed additional more powerful arguments as to
`why Amidi and Klein render the claims of the 537 patent obvious. Those
`decisions were brought before the Board on remand from the Federal Circuit
`to consider a facts related construction of two terms, selectively electrically
`coupling as it appears in the 668 proceeding and the Federal Circuit
`construed that to mean coupling in response to a selection. Those decisions
`also considered the construction of the term selective isolating from the 667
`proceeding. It construed that to mean isolating in response to a selection.
`Our positions regarding obviousness in view of Amidi and Klein are
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`consistent with both of the Federal Circuit's decision and the Board's
`decision on remand.
`JUDGE MCSHANE: Counsel, going back to the selectively isolated
`term. Patent Owner seems to have adopted the construction of that term and
`do you have any issues remaining with selectively isolate because I don't
`think the Federal Circuit itself weighed in on selectively isolate, they said
`take guidance from our other decision on the other term’s construction. Do
`you have any issues at all with selectively isolate?
`MS. CONATY: We do not. On remand the Board had constructed
`that term to mean isolating in response to a selection very similarly to the
`selectively electrically coupling limitation and it's our position that Amidi
`and Klein under that construction for both terms renders the claims of the
`537 patent obvious.
`JUDGE MCSHANE: Thank you.
`MS. CONATY: Because I have a lot of slides here and I do not
`expect to go through all of them, I can move back and forth as we said to
`Your Honors and I can answer any questions that might arise but for now I
`would like to tell you I've got a roadmap of what I'd like to discuss here on
`slide 4. But again, if there are any questions and you do wish for me to jump
`around please just let me know.
`So moving to slide 6, I'm going to start with a very basic overview of
`the 537 patent. It's directed to memory modules and methods of using
`memory modules that provide both load isolation and memory domain
`translation. The isolation allows for an increase in memory capacity of the
`device without subjecting the computer system to an increased electrical
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`load. The translation allows the computer system to interact with the
`memory module. It has an alternate configuration than the memory system
`expects, or that the computer system expects.
`So there are two claims that are relevant to the proceedings today and
`more specifically this one element from each of those two claims. On slide
`7 I've included claim 1 which is exemplary with respect to the claims at
`issue in the 667 proceeding. This claim is directed to a memory module that
`includes a circuit that selectively isolates the loads of the memory devices
`from the computer system. So everything not highlighted here on slide 7
`was disclosed in Amidi and the Patent Owner does not seem to contradict
`that. Rather, the dispute relates to the combination of Amidi and Klein with
`respect to this highlighted limitation of the circuit selectively isolating one or
`more of the loads.
`Claim 18 on slide 8 is exemplary with respect to the claims challenged
`by the 668 proceeding. Claim 18 is directed to a memory module that
`includes a device that is selectively electrically couples the data signal lines
`of various memory devices to a common data signal line and, again, the only
`disputed element is that which is highlighted on slide 8, the limitation related
`to selectively electrically coupling. The 537 patent explains that this circuit
`or device receives a set of input or command signals from the memory
`controller and performs rank isolation or rank translation, excuse me. It then
`generates a set of commands address signals that correspond to the number
`of ranks that are actually present in the system and as shown on slide 9,
`figure 4, the 537 patent explains that this logic element is also responsible
`for the selective isolation. As we see here circuit 40 uses switches 120A and
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`120B to selectively isolate or to selectively electrically couple one or both of
`the data signal lines 102A or 102B.
`Now as we see on slide 10, the use of isolation switches was well
`known before the 2005 priority date of the 537 patent. This is reflected in
`the patent itself and in the JEDEC standard JESD79 which was Exhibit 1020
`in these proceedings. The 537 patent specification actually identifies
`(indiscernible) FET switches on the market from Texas Instruments that
`were compatible with the 537 patent embodiment and could be used to
`selectively isolate or selectively electrically couple as required by the claims.
`Likewise the JEDEC standard at page 7 describes the use of what's called
`the QFC signal to control isolation switches. So these switches were well
`known and the reason that is relevant today is because the only challenge
`raised by the Patent Owner is directed to the addition of these Klein FET
`switches to the memory module that is taught by Amidi.
`Moving to slide 12, I'd like to briefly give an overview of the primary
`reference, the Amidi patent. This is Exhibit 1006 in these proceedings. As
`with the 537 Amidi discloses a transparent four rank memory module for use
`in a two rank memory system. As Amidi explains because memory devices
`with lower density are cheaper and more readily available it can be
`advantageous to build a memory module using these lower densities, and as
`illustrated in figure 6 reproduced on slide 13 Amidi's memory module
`includes a complex programmable logical device, which is 604, a phase lock
`loop which is 606 and a register 608.
`On slide 14 the memory module in Amidi is coupled to the CPLD
`which includes internal decoding circuitry for determining which rank from
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`the four ranks of memory to activate based on the address and command
`signals that were received from the memory controller. The CPLD
`translates these address and command signals and generates a new set of
`chip select signals compatible with the actual physical layout of the devices.
`The secondary reference in these proceedings is Klein and it's
`somewhat more relevant to the discussions today because this is the focus of
`much of the briefing in these proceedings. The Klein publication is directed
`to a method of reducing bus capacitance using transfer gate switches to
`decouple memory circuits from a data bus when they're not being accessed.
`Klein discloses that transfer gate switches can be FET switches as we see on
`slide 2. As noted earlier, commonly available FET switches were identified
`in the 537 patent as being responsible for the selective isolation or
`selectively electrically coupling limitations and likewise, as noted here in
`paragraph 26 shown on slide 16, bus circuits like those disclosed in Klein
`were well known to those of skill in the art in 2001.
`On slide 17 in these proceedings the Patent Owner has once again
`tried to characterize Klein as disparate embodiments arguing that the
`individual embodiments of control logic disclosed in Klein when combined
`with Amidi without modification would be inoperable without undue
`experimentation. But as explained in prior proceedings and in the papers
`here, and by Petitioner's expert Dr. Stone, the Klein publication discloses a
`menu of transfer gate implementations. It teaches a variety of design
`options. In fact figures 3 through 6 and figure 10 of the Klein publication all
`disclose potential embodiments with the invention including various
`arrangements of the isolation switches and of the control logic.
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`On slide 18 we see that Klein likewise teaches that there are a variety
`of implementations for this control logic that is required to open and close
`the transfer gate switches. This control logic can be on module as shown in
`Klein figures 3 and 6. It can be off module as shown in Klein's figures 4 and
`5, or it can be inside the memory device itself which we see in figure 10.
`Klein's figures 8 and 9 are shown on slide 19 and the publication
`explains that figures 7, 8 and 9 illustrate potential limitations of decoders for
`controlling the opening and closing of the transfer gate switches. So as
`explained in the petitions and by Dr. Stone in his original declaration, one of
`skill in the art would understand that the examples shown in Klein's figures
`are intended to be flexible. They can be combined as is appropriate for the
`situation for that design.
`Indeed, on slide 20 we see Dr. Stone offer a specific example where
`he is combining figure 8 and figure 9 and he explained that you would
`combine figures 8 and 9, such that the control logic would include both the
`capabilities of the decoder circuit of figure 8 and the state machine logic of
`figure 9. As we see on slide 21, the Klein publication explicitly explains
`that such alterations do not depart from the spirit and central characteristics
`of the Klein publication and the Klein invention..
`Again, the Board separate from the claim construction issues has
`previously noted that Klein does not disclose disparate embodiments that
`teach away from each other. Rather, Klein provides examples that are
`intended to be versatile in their application. Indeed, as noted in figure 10 of
`Klein specifically shows a combination of the decoder embodiments.
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`On slide 22 the issue of timing of the opening and closing of the
`transfer gate switches is also highly relevant to the issues before the Board
`today so I'd like to take a little additional time to address the disclosures for
`the proper timing of the opening and closing of these switches. The Patent
`Owner and its expert, Dr. Sechen, have argued that Klein is inoperable
`because one of skill in the art could not properly time the opening and
`closing of these FET switches without undue experimentation. But the
`proper timing of these switches was well know. The Patent Owner and its
`expert ignore Klein's explicit teaching with respect to timing and we see that
`on slide 22 in figure 1, and in paragraphs 22 and 23.
`The logic diagram of figure 1 explains how the switches couple and
`decouple a memory element from a bus based on when memory access to or
`from the selective memory element is performed. This figure and the
`disclosure accompanying this figure speak to a person of skill in the art that
`is reading in the Klein publication as a whole and one of skill in the art
`familiar with the JEDEC standard and familiar with the JEDEC command
`signals would understand how to best utilize the aspect of the control logic
`disclosed in Klein and how to adapt that logic to properly time the opening
`and closing of the transfer gate switches, of the well known transfer gate
`FET switches, and once again, the Board in the Diablo Technologies
`proceedings also found that Klein teaches the timing control of transfer gate
`switches. Now if there are no questions on the background of the patent
`itself, I'd like to explain a little bit more in detail about the proposed
`combination by Petitioners.
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`JUDGE MCSHANE: Let me just back you up counsel a little bit.
`Can you refer to paragraph 144 of your expert's declaration and also there
`was a declaration at 152 as well that talks about -- which the Patent Owner
`focuses in on -- about the commonly used chip select signals or RAS and so
`on, and essentially what Patent Owner globally is arguing is the deficiency
`of the petition as to the proofs, if you will, of the operability and do you
`have -- give me your best case on that, best legal case on that. Do you have
`a cite on that?
`MS. CONATY: I do not immediately have a cite on the particularity
`of our petition.
`JUDGE MCSHANE: Yes, okay.
`MS. CONATY: I can certainly address it.
`JUDGE MCSHANE: All right. Well, let's just go to the declaration
`and the petition, okay? You mentioned paragraph 144, we've got 150.
`We've got language from the petition itself. Is there any other portions of
`the expert report or the petition that you're relying extensively on for the
`operability issue?
`MS. CONATY: For the operability issue? I believe it extends
`beyond in his petition where he actually shows -- if we could move to slide
`24 -- this appears a little bit later in his petition where he demonstrates the
`actual combination and how it would be operable, and I think we would cite
`to that as well, that discussion of how the Klein switches there in the boxes
`that are colored red and green would be added to the immediate memory
`module in order to perform the isolations that were the coupling.
`JUDGE MCSHANE: Okay. Got you. Thank you.
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`MS. CONATY: Okay. Slide 24 does show Dr. Stone's original
`annotations of figure 4A. The figure shows that the Amidi module could be
`modified by adding these Klein switches. As is explained in the papers
`these switches would continue across the module but for clarity of the
`picture itself we have just shown them here in this manner on the two stack
`memory devices.
`But in this combination, the chip select from Amidi is going to be
`translated to activate the correct rank and here we see that each path would
`be controlled by a Klein switch and so at most, only one of the paths is
`active at one time. When a device is not selected, which is I believe is the
`green color here -- red would be the selective -- that corresponding path to
`the module pin is also not selected and that capacitive load of that path is
`isolated from the output pin as taught by Klein.
`Turning to slide 25. The 537 patent requires a circuit or device that
`performs the selective isolation or selective electric coupling and the
`required ranks of translation, and the petition has identified a circuit in
`Amidi as the CPLD, the register and the PLL. This is a circuit that performs
`the chip select translation in the combination and it is to this circuit that the
`Klein switch and Klein switch control circuitry would be added in the
`combination. In our petition we refer to this as an enhanced circuit or as Dr.
`Stone refers to it in his testimony, an enhanced CPLD, and he explained that
`this enhanced CPLD would include the Klein switches and control logic, and
`that the control logic would receive signals including the RAS, CAS, WE,
`CS address and bank address signals.
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`As we see on slide 26, these signals are all received by the circuit
`identified as the CPLD, register and PLL in Amidi, and that's the
`combination. The 537 patent is directed to rank multiplication and isolation
`of loads using FET switches, the proposed combination as well known FET
`switches to the rank multiplication of Amidi. Both experts agree that one of
`skill in the art would be familiar with the JEDEC standard and that skilled
`artisan with experience in the design of memory systems and familiarity
`with the latest JEDEC standards would read Klein's teachings as a whole and
`they would be able to modify Klein's switches embodiments to be
`operational within the memory module disclosed by Amidi.
`One of skill in the art would be motivated to make this combination
`for many reasons, some of which are shown on slide 28. This combination
`involves the arrangement of old elements performing the same function with
`predictable results. As I explained earlier, the chip select functionality of
`Amidi permits the use of lower density cheaper memories with existing
`memory buses and the flexibility of the Klein circuitry allows for isolation
`of a variety of memory elements or segments as appropriate to that
`application. As we explained in the papers that can be the memory module,
`the rank or even as is on figure 10 the device itself, though performing this
`isolation can increase the speed at which memory accesses can be performed
`by isolating those memory devices that are not being accessed and removing
`the capacitive loading effects of those unaccessed memory devices.
`Looking at slide 30, the JEDEC standard itself would also provide
`motivation to make this combination. We see that Dr. Sechen does not
`dispute that one of skill in the art would be familiar with the JEDEC
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`standard and indeed, on slide 31, we see how we emphasize that such
`compliance with the JEDEC standard was important for the inter-operability
`between manufacturers with the benefit of increasing sales.
`As Your Honor referenced earlier, Netlist has argued again in this
`proceeding that the combination of Amidi and Klein would be inoperable
`without undue experimentation and to make this argument Netlist and Dr.
`Sechen limit the combination of Amidi and Klein to combining either figure
`7 or figure 8 with the disclosure of Amidi, and we see this on figure 37.
`Patent Owner and its expert, Dr. Sechen, argue that Dr. Stone's original
`declaration limited the combination of Amidi and Klein to the addition of a
`switch from either one of these two embodiments and the clearest way I can
`show you is to point to paragraph 144 again on slide 38, which is from his
`original declaration. This was cited in the petition and this is where Dr.
`Stone's example of the combination -- he provided an example of
`combinations -- his example was from figure 8 and figure 9. So in no way
`did he intend to limit the combination to be from either figure 7 and figure 8,
`and I think this is reflected in his entire declaration and in our papers as a
`whole that there was no intent to limit the combination, and as I've said
`Klein teaches a variety of design options.
`On slide 39 Dr. Stone expressly testified that it was at all times his
`intention to build that combination by using the teaching of Klein the way
`one of skill in the art would do so, and that if you take the pieces that are
`there the knowledge that that person has in how to design things and put
`them together and build a device that meets the timing requirements of
`Amidi and Klein. So, again, for the combination you would have the
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`translated chip select signal from Amidi and figure 8 of Klein shows control
`logic using the RAS, CAS and WE command signals, and figure 9 shows
`control logic using address signals.
`Much was made during the briefing of whether or not it was
`reasonable for Dr. Sechen to limit the proposed combination to a
`combination with figure 7 or figure 8, and Dr. Stone repeatedly testified that
`this was an unreasonable reading of Klein as a whole, of our papers or of his
`declaration, that this reading was unreasonable. When asked if it was
`possible he certainly said it's possible because Dr. Sechen did do so but it
`was never his intention to limit it so and the declaration on its face
`contemplates the combination of the various figures in the system in an
`appropriate way that would make the Amidi module operable, as one of skill
`in the art would do so, and again on slide 40, we see that the Board
`previously rejected similar efforts to segregate Klein's teachings in this
`manner. As I noted before the Board found that the embodiments are not
`disparate embodiments that teach away from each other.
`So while Patent Owner's attack is presented on our Amidi Klein
`combination, when you look into their papers and into Dr. Sechen's
`declaration his real attack is on Klein itself and the fact that in his opinion
`every embodiment of the Klein publication would be inoperable. He
`contends that one of skill in the art would be unable to take the FET switches
`from Klein and combine them with Amidi without undue experimentation.
`Rather, it would require extraordinary skill or it would require the skill of an
`expert. These arguments are both immaterial and meritless. It's immaterial
`whether the Klein embodiments themselves are operable, but what's relevant
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`here is the teaching of Klein as a whole with how they speak to one of skill
`in the art and that one of skill in the art would be motivated to combine these
`(indiscernible) and FET switches from Klein to the memory modules of
`Amidi. We've already discussed that they would be motivated to do so and
`indeed recent decisions on remand and the 882 and 883 proceedings once
`again found that one of skill in the art would be motivated to combine the
`two proceedings. But it's likewise clear that they would be able to do so
`without undue experimentation.
`One of skill in the art, as defined by Dr. Stone in this proceeding, has
`at least two years professional experience in design of memory systems and
`familiarity with the latest JEDEC standards. One of skill in the art would
`not look to a single embodiment disclosed in Klein and indiscriminately
`insert that embodiment into the memory module of Amidi without any
`modification. Likewise the Klein publication teaches timing for the opening
`and closing of the FET switches. We saw that in figure 1 and in paragraphs
`22 and 23 of Klein as shown on slide 43. Klein does not have to explain
`every detail regarding the execution of the switch timing in order to render
`the 537 patent obvious because Klein speaks to one of skill in the art who
`has knowledge of that JEDEC standard, who has knowledge of the JEDEC
`timing diagrams and would know how to properly time isolation switches,
`and we see that on slide 44.
`On slide 45, we see that Dr. Sechen testified that the JEDEC standard
`is like a teaching document. It indicates how things should work. He
`explained that if you were designing a JEDEC compliant memory device
`you would certainly look at these timing diagrams. You would consider
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`them in the aggregate in a system like JEDEC that would inform that
`combination of Amidi and Klein references.
`JUDGE CLEMENTS: Counsel, I have a question about the 883
`decision on remand, and I know that the panel in that case just issued it on
`March 29th so it came in after the briefing. My question is how similar are
`Patent Owner's arguments in that case with the arguments in this case? It
`was a different patent but it was a continuation of this patent I see, and the
`claim language looks pretty similar. But did the decision in the 883 case
`depend in any way on the arguments Petitioner was making? In other
`words, they've relied on Amidi and Klein but I haven't compared their
`petition with your petition to see if they were relying on Klein in a different
`way than you're relying on it and I guess my question to you is does it matter
`or were the arguments that Patent Owner made in both cases the same?
`MS. CONATY: I understand, and I believe yes, the arguments would
`be the same, that the determination made in the 883 proceeding would apply
`here as well. My expectation is that Patent Owner would argue there is one
`additional argument that has been made in this proceeding in the Motion for
`Observation at Observation 14, and that's the argument that the 537 patent
`discloses Verilog code but it's not included in the Klein and the Amidi
`disclosures, and during his deposition Dr. Stone did address the Verilog code
`and explained that one of skill in the art would not require these excerpts of
`exemplary co