`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SK HYNIX, INC.,
`Petitioner,
`
`v.
`
`NETLIST, INC,
`Patent Owner.
`____________
`
`Case IPR2017-00692
`Patent 8,874,831
`____________
`
`Record of Oral Hearing
`Held: April 24, 2018
`
`
`
`
`Before STEPHEN C. SIU, MATTHEW R. CLEMENTS, and SHEILA F.
`McSHANE, Administrative Patent Judges.
`
`
`
`Case IPR2017-00692
`Patent 8,874,831
`
`
`
`APPEARANCES:
`
`ON BEHALF OF THE PETITIONER:
`
`
`JOSEPH MICALLEF, ESQUIRE
`Sidley Austin LLP
`1501 K Street, N.W.
`Washington, D.C. 20005
`
`
`
`ON BEHALF OF THE PATENT OWNER:
`
`
`TOM WIMBISCUS, ESQUIRE
`WAYNE BRADLEY, ESQUIRE
`McAndrew Held & Malloy Ltd.
`500 West Madison Street
`34th Floor
`Chicago, IL 60661
`
`
`
`
`The above-entitled matter came on for hearing on Tuesday, April 24,
`
`2018, at 2:50 p.m., at the U.S. Patent and Trademark Office, Madison
`Building East, 600 Dulany Street, Alexandria, Virginia.
`
`
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`Case IPR2017-00692
`Patent 8,874,831
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`P R O C E E D I N G S
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`JUDGE MCSHANE: Please be seated. Thank you. Give me one
`moment. Judge Clements, can you hear okay?
`JUDGE CLEMENTS: Yes, I can. Thank you.
`JUDGE MCSHANE: Judge Siu? Communications --
`JUDGE SIU: Yes.
`JUDGE MCSHANE: -- are acceptable? Okay, very good. Thank
`you. We are going to start a new transcript and this is the second session
`this afternoon on SK -- the Netlist cases. The case we're hearing now is for
`IPR2017-00692. I got that number correct gentlemen? Thank you. May we
`have appearances, please?
`MR. MICALLEF: Joe Micallef, Your Honor, for Petitioner.
`MR. WIMBISCUS: Good afternoon. Tom Wimbiscus, and with me
`is Wayne Bradley, for the Patent Owner.
`JUDGE MCSHANE: Welcome back, counsel. Thank you. This
`afternoon we're going to have Petitioner go first, reserve time for rebuttal.
`Patent Owner can then present their case and then any rebuttal we will hear
`from Petitioner. Each party will have 30 minutes to present its argument and
`you folks know the ground rules pretty well, so please try to use the
`microphone and call out the demonstrative numbers. Anything from any
`judges, any other comments?
`JUDGE CLEMENTS: Nothing from me.
`JUDGE MCSHANE: Okay.
`JUDGE SIU: Nothing from me.
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`JUDGE MCSHANE: Thank you. Okay, Petitioner, as soon as you're
`ready please proceed. Thank you..
`MR. MICALLEF: Thank you, Your Honor. Joe Micallef for the
`Petitioners. In the last proceeding you raised the issue of the recently issued
`SAS case out of the Supreme Court, and I guess I should understand as you
`mentioned in the last proceeding but will be on a different transcript, that
`any arguments we may want to raise as to that case or I guess this case we
`should hold back and if we have such an argument sometime in the future
`contact the Board about it?
`JUDGE MCSHANE: Yes. If you see a need let us know that you
`want to call, okay --
`MR. MICALLEF: Okay.
`JUDGE MCSHANE: -- and we'll perhaps discuss what issues may be
`raised.
`MR. MICALLEF: Great. Thank you very much.
`JUDGE MCSHANE: Okay. Thank you.
`MR. MICALLEF: So, yes, this is the 692 proceeding on the 831
`patent, Your Honor. I have a number of slides, I'm going to jump around.
`Obviously I'm happy to go to any one of them or to address other issues
`Your Honors might have.
`I'm on slide 2 and these are the grounds that were instituted in this
`proceeding, anticipate claims 1 to 14, anticipation by Best claims 1 to 14
`obvious over Best with or without Roy and then a separate ground for claim
`15, obviousness over Best in view of Mills and Bonella with or without Roy.
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`On slide 3 here, I think that this proceeding devolves to really two
`issues and that is for claims 1 to 14 whether the cited art satisfies the --
`actually whether the Best patent satisfies the claimed memory module. That
`really is just a pure claim construction issue as far as I can tell, and then
`there is an argument about claim 15. So really we're looking at two separate
`arguments in this proceeding that I think the Board has to resolve.
`So what I'd like to do is go through, just to focus us here, go through a
`very brief overview of the 831 patent and a very brief overview of the
`principal prior art, and then get into those two issues. I'm on slide 4. I have
`just the front page of figure 5A of the 831 patent. You can see it was issued
`from an application filed in 2012. It claims priority to a number of prior
`applications. We have asserted and argued, and shown that it does not get as
`early as provisional date. The other side has not contested that argument so
`its date is I think somewhere in the 2008 time frame.
`If I can go to slide 5, well actually let me jump ahead to slide 6 just
`because it has more interesting color coding. Claim 1, which is directed to a
`memory module, and has essentially four structural components that we've
`called out there non-volatile memory, data manager of volatile memory and
`a controller. Over here on the right of this slide is figure 5A which is an
`example of the disclosed memory module and you can see the Flashes the
`non-volatile memory, the DRAM is the volatile memory, and there's this
`data manager that sits in between that moves data back and forth and there is
`essentially a module controller.
`The fact that those -- I'll show you in a second -- the fact that those
`components exist in the prior art, that system is not really at issue here at all.
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`They don't dispute that. The dispute revolves around whether Best discloses
`a memory module as that term should be properly construed in the context of
`the 831 patent.
`So let me go to slide 9. This is the Best patent issued from a PCT
`filed in 2008. Claims priority to its own provisional in 2007. We have
`shown that it's entitled to that 2007 provisional date and the other side has
`not contested that. There's no question here that Best is prior art.
`If we go to slide 10. Again, it's the same claim 1 with the same color
`coding and figure 2 from Best, and you can see that it has the same hardware
`components, the non-volatile memory array like a Flash, the DRAM
`memory, a data manager called a data control steering component and a
`command decoder on the module.
`So let's go to slide -- let's start with slide 12. I just want to talk first
`about this claim construction issue which is the proper interpretation of
`memory module. Here on slide 13 I've added this to sort of focus us and
`ground us on where we are here. These are the interpretations of the phrase
`memory module that had been I guess at play at various points in time in this
`proceeding, and what I'd like to point is that the Patent Owner's preliminary
`response proposed an interpretation of memory module that did not include
`or require a printed circuit board which is what their argument is today, and
`the reason I'd like to point that out is because their argument is that the term
`memory module in the context of the 831 patent requires a printed circuit
`board and a person of ordinary skill in the art would know not just that you
`could make a memory module with a printed circuit board but that two
`words memory module absolutely require. But they didn't know that when
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`they filed their Patent Owner's preliminary response. Apparently they did
`not discover this limitation of this well known term of art as they say until
`some time after the Institution decision in that case, and I think that removes
`any credibility to this argument that everybody in this art knew that memory
`module required a printed circuit board, but apparently not for the Institution
`decision, and there's a reason that that PCB was not included in their
`preliminary response because everything in the intrinsic record says
`otherwise, absolutely everything.
`On here, this is slide 14, this is the key, two of the key passages from
`the 831 patent. It says in certain embodiments this disclosed memory
`module can have a DIMM form factor dual-online memory module form
`factor. Now they are taking the position that a DIMM necessarily requires a
`printed circuit board and we show that's incorrect in our briefing. The
`standard for DIMM at the time said nothing about a printed circuit board so
`it was not required, but even if you were to accept that the second quote on
`this slide explicitly says that their invention is not limited to a DIMM form
`factor. It says,
`"While the DIMM form factor will predominate the discussion herein,
`it should be understood that this is for illustrative purposes only and memory
`systems using other form factors are contemplated as well."
`This is a classic patent specification statement that is included in these
`kinds of documents when the patentee explicitly does not want the invention
`limited to a particular embodiment such as a memory module that includes a
`printed circuit board. That really is the end of the matter. I think once you
`put that statement in your specification, unless you put something in the
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`claim language which isn't here -- the claim doesn't say printed circuit board
`-- then you're not going to be limited to a DIMM form factor. Once you say
`in the specification I'm not limiting myself to a DIMM form factor then
`you're not limited unless you put the words in the claim itself. But just about
`everything else you can point to in this intrinsic record goes exactly the same
`way.
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`So, for example, slide 15, another portion of the specification and I
`think this is particularly relevant here because on this slide what is being
`described is an example of the claimed memory module in which the various
`hardware components that I just showed you on those color coded figures
`are encapsulated in the same package. Well, that is in fact what the prior art
`Best patent discloses as a memory module, the Flash memory and the
`DRAM and some control circuitry encapsulated in the same packet. So in
`other words, the 831 patent discloses an embodiment that doesn't include a
`PCB, doesn't include the DIMM form factor, but instead employs the exact
`same form factor that is in the prior art Best patent that we are relying on.
`So Best clearly under any fair interpretation of reasonable interpretation of
`memory module Best satisfies.
`Now, they have relied on the parent application, this 916 application,
`and pointed to several passages, none of which helped them. They have
`pointed to, for example, paragraph 2 which is a description of the prior art
`because it mentions a printed circuit board, paragraph 31 because it
`mentions a printed circuit board. In both cases of course the language is
`permissive. It says, for example, in the prior art part, paragraph 2, certain
`types of memory modules comprise DRAMs mounted on a printed circuit
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`board. It doesn't mean they all do. In fact the necessary implication is only
`certain types do but others do not, and the same with the statement in
`paragraph 31. Completely permissive. This is how people write patent
`specifications so they're not limiting the claim by statements in the
`specification.
`Now I'm only going to spend a few minutes on these next points
`unless the panel has some questions, but we pointed out that the 916
`application also gives examples of other form factors including this -- I'm at
`slide 17, excuse me -- this MultiMedia card form factor, an MMC card form
`factor and on slide 18 we show that the MMC standard at the time did not
`require a PCB so there's a memory module example disclosed in the parent
`application which I should point out was incorporated by reference in the
`831 patent.
`Here's a memory module form factor that does not include a PCB in
`the prior art, and we also pointed on slide 19 and put it in the record a prior
`art mix patent which was, again, an example of a prior art memory module,
`an MMC memory module that did not employ a printed circuit board.
`So there are a couple of other arguments that are briefed up. I'm
`happy to answer questions but I don't want to use my time to address them at
`this point because I think, as I pointed out, this patent specification is
`explicitly permissive when it comes to the form factor of the memory
`module and this claim just cannot be limited to a PCB based memory
`module.
`So unless there are questions on that issue, I'd like to move to claim
`15, the second issue here, and if we can go to slide 31 I guess. Thank you.
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`Okay, or 32, we'll go to 32, that's fine. So here's claim 15, it's a dependent
`claim, depends from independent claim 7 and adds three steps. There's no
`dispute that Best discloses the first two steps. The argument is really based
`on this last step, operating a volatile memory subsystem at a third clock
`frequency when the memory module is in the second mode of operation and
`then the third clock frequency is less than the first clock frequency. There is
`no dispute as far as I can tell that Best discloses operating a volatile memory
`subsystem while the module is in the second mode of operation which, as
`defined in the petition, went right back to a recurring power loss situation.
`The dispute is whether the cited art satisfies the third clock frequency less
`than the first clock frequency.
`So that's the language that we're fighting over and we pointed out, and
`this is slide 40 -- let's jump up there very quickly, slide 40 -- that Bonella,
`another prior art patent, discloses this use of a lower operating frequency for
`the DRAM in a low power mode in a low power situation, and our argument
`was it would have been obvious to take that idea, the lower frequency in a
`low power situation, and plug it in to the Best patent in the manner that
`satisfied that last element of claim 15 and we did so.
`Our arguments were basically two reasons. If we can go back to -- I'll
`do it this way, slide 37. I'm on slide 37. We argued that first reducing
`power during volatile and non-volatile flush operations prompted by a power
`loss was a well known technique. Secondly, that one way to reduce power
`consumption of DRAM devices was to lower the operating frequency, and
`so where did we get that? We pointed to specific prior art references, for
`example, on slide 38, the prior art Ashmore patent, Exhibit 1011, states that
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`you can reduce battery power consumption during a main power loss to
`reduce the likelihood of loss of user write-cached data. So to reduce the
`likelihood of loss what Ashmore tells you is reduce power consumption.
`That's what Ashmore says.
`And then we pointed, and this is slide 39. The Long patent, Exhibit
`1012, which says one way to reduce that power consumption is to drop the
`operating frequency and he says as a result less power is consumed thus
`enabling the use of a smaller size back-up power source.
`So those were our prior art evidence of motivation to combine that
`technique, that lower frequency technique, of Bonella. We also pointed to --
`let's see here, slide 42 -- and I do want to focus a little bit on this slide
`because I think sometimes this gets a little lost. Our additional argument for
`obviousness here is that what we pointed to was simply the arrangement of
`old elements, each performing what they were known to do without any
`unexpected results and I'm sure as the panel is aware that the Supreme Court
`in KSR says when that occurs, that arrangement is obvious, and as the
`Federal Circuit has said that is a reason to combine the arrangement of old
`elements each doing what they were known to do with no unpredictable
`results.
`And I would submit to you that well, counsel for the Patent Owner is
`going to get up and has made certain arguments about the motivation to
`combine, they have not contested this reason to combine, what I call the
`arrangement of old elements argument. They have not contested, they have
`not said no, there's an unpredictable result here or they haven't said no, it
`wasn't known to reduce frequency of a DRAM to reduce power
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`consumption. They haven't said any of those things, so I think they have
`conceded this point and it is sufficient, at least according to the Supreme
`Court, to prove obviousness.
`So unless there are any questions, I would like to reserve the
`remainder of my time.
`JUDGE CLEMENTS: No questions.
`JUDGE MCSHANE: Okay. Thank you.
`MR. MICALLEF: Thank you.
`MR. BRADLEY: Judge McShane, would you like a hard copy?
`JUDGE MCSHANE: If you have one, yes.
`MR. BRADLEY: Good afternoon, and may it please the Board. My
`name is Wayne Bradley and I'm representing Patent Owner, Netlist. The
`issues that I'll discuss today, as the Petitioner talked about, is now the same.
`How Petitioner has conflated power and energy in the argument against
`claim 15 and the proper claim construction for memory module, and the fact
`that Best fails to teach a memory module as properly construed.
`So we'll skip ahead to 43, and I'm going to talk about claim 15 first.
`Claim 15 is a method for managing memory module, as the Petitioner has
`said, and is dependent on claim 7. As shown in the blue box here, in the first
`mode of operation the volatile memory subsystem, which I'll refer to as the
`VMS, is operating in a first clock frequency while data is communicated
`with the memory controller and in the second mode of operation data is
`communicated with the VMS or between the VMS and the non-volatile
`memory subsystem during the second mode and as shown in the green box,
`the non-volatile memory subsystem is operating in a second clock frequency
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`and as shown in the red box the VMS is operating a third clock frequency
`which is less than the first clock frequency. My discussion will focus on
`Petitioner's attempt to show the limitation in this red box.
`Turning now to slide 44. The 833 patent is incorporated by reference
`in the 831 patent. This is important because some support for claim 15 is
`found only in the text of the 833 patent specification. Turning now to slide
`45. As shown in the question and answer session on slide 45, Petitioner's
`expert stated that he never considered the 833 patent text during his 831
`patent analysis so he could not have understood claim 15 in the context of
`the relevant specification.
`Turning now to slide 47. The Petitioner's argument for the invalidity
`of claim 15 is based on a false premise and a misunderstanding of the
`concepts of power, energy and charge with respect to a battery. As
`described in the 831 patent, power sources such as batteries store energy as
`opposed to power. The petition was granted with respect to claim 15 based
`on an argument with the premise that reducing power enables the use of a
`smaller size battery power source without losing data due to insufficient
`back-up power as described here on slide 47. Petitioners argue that this
`premise would motivate one to reduce power in a power loss situation and
`that one way to reduce power in a VMS is by reducing the operating
`frequency to DRAM. But Petitioner's premise is incorrect because reducing
`power to vital components in a power loss situation will not reduce energy
`consumption and will not allow a smaller battery. In these vital operations
`the same amount of energy is just consumed over a longer period of time.
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`In Ashmore and Long, for example, power is shut off to unneeded
`non-vital components. This allows energy savings which can reduce the
`battery size required for necessary functions, but none of Ashmore, Long or
`Bonella teaches reducing the amount of energy consumed by necessary
`operations in vital components. As I will discuss, Petitioner's proposed
`power reduction by reducing clock frequency to DRAM during data flush
`would not save energy and hence, would not allow for a reduction in battery
`size. Since all of the DRAM must be flushed in Petitioner's scenario the
`same amount of energy is used and the same amount of work is performed.
`Turning now to slide 48. Dr. Baker testified that energy, not power, is
`the appropriate metric when considering the sufficiency and size of a back-
`up power source. Power is the rate at which energy is used. As Dr. Baker
`explained to enable the use of a smaller sized back-up power source energy
`consumption must be reduced. As Dr. Baker also explained reducing power
`by half will not lead to a reduction in energy consumption because the time
`over which the power must be supplied is doubled. As Dr. Baker explained,
`based on Long and Ashmore one would not be motivated to reduce power to
`vital components during a power loss situation because energy consumption
`would not be reduced. Long and Ashmore reduced energy consumption by
`not performing certain tasks and spreading out the same work requires the
`same energy and hence the same battery size. Dr. Baker explained that the
`terms power and energy are frequently used interchangeable. Though such
`use is incorrect this is the error that's apparent here in the petition.
`Turning now to slide 49. Slide 49 provides excerpts from paragraph
`101 of Bonella's own power loss algorithm. As Dr. Baker explained,
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`Bonella teaches correctly that battery size is dependent on the amount of
`data that must be moved, not the operating frequency. The top half of
`Bonella's table here shows the constant parameters in Bonella's DRAM flush
`to Flash design and note that Bonella correctly uses the term power here in
`milliwatts and the bottom half of Bonella's table shows that energy reserves
`required by Bonella's battery are based on the amount of data to be moved.
`So looking, for example, at the bottom in the blue boxes, for example, look
`at the right two blue boxes on the bottom of the table. Here when you move,
`for example, one gigabyte of DRAM in the furthest right box that requires
`twice the energy as moving 512 megabytes. In Bonella moving twice the
`data doubles the time required because power stays constant and here 512
`megabytes takes 50 seconds to move and the 1024 megabytes takes 100
`seconds. Likewise, moving twice the data also doubles the charge required
`because voltage stays constant and energy is the product of charge and
`voltage. The petition argues that Bonella teaches that frequency reduction
`will obviously lead to a smaller battery. This is incorrect for the reasons just
`discussed.
`Turning now to slide 50. Petitioner's expert opinion was based on a
`motivation to reduce the size of the back-up battery when power down or a
`power loss situation is detected. The Petitioner's expert was asked about this
`back-up power source described in the petition and he provided a series of
`non-answers. He was asked,
`"Will your battery have a fixed amount of power or a fixed amount of
`charge when you begin the power down mode?"
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`Petitioner's expert refused to squarely acknowledge that his battery
`has a fixed amount of charge when the power loss occurs. He answered,
`"Well, the battery it has neither fixed amount of power or charge
`because it depends on, let's say, the temperature depends what the situation
`and you're talking about when you're trying to power down you can't really
`talk about it in that way. I mean it's a question. Why are you doing power
`down? If your batter is leaking then it wouldn't be a fixed amount either.
`Depends on the circumstance."
`Petitioner's expert was asked again about the back-up power source
`described in the petition. He was asked,
`"When you go into power down mode and use a back-up battery now,
`a different source, is it the power of that different source or is it the energy
`of that different source that determines how much data can be moved?"
`Petitioner's expert was again evasive and dodged the question. He
`answered,
`"I think it's neither because let's say you have a situation that the
`battery is leaking so then it will have a fixed amount of neither."
`As I discussed, Petitioner's own reference illustrates that energy
`capacity determines how much data can be moved. Battery leakage was not
`discussed in the petition or in their expert's declaration. This type of non-
`answer was common throughout the deposition. Why did he do this?
`Because his analysis was obviously faulty.
`Turning now to slide 53. The petition cites to Long as an example of
`reducing power, but what allows for a smaller battery in Long is that Long
`saves energy which is power integrated over time. If non-vital areas are
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`merely turned off, the energy requirement in grey here on slide 53 can be
`completely removed. Overall energy can be saved and a smaller battery can
`be used. But note, what Long is doing is just completely eliminating these
`tasks here in grey. He's not saying I'm going to provide a lower frequency
`for these tasks, he's just completely eliminating. So they're not being done
`during this power loss situation. So there's no data being moved here in
`grey. The data being moved is in the blue. Likewise, Long teaches that
`energy consumed by a controller while running a magnetic disk drive can be
`eliminated because these drives are not used during Long's power loss mode.
`Turning now to slide 54. Similar to Long, Ashmore saves energy by
`turning off non-critical memory banks. It should be noted that Long and
`Ashmore use the terms power when they mean energy. This adds another
`level of misunderstanding to Petitioner's combination of art. Petitioner's
`slide 38 shows a statement in the POR that is from the decision denying the
`649 IPR. In the 649 IPR decision the Board described Ashmore's "general
`motivation to reduce battery power during power loss." Ashmore uses the
`term "battery power" when referring to energy. Likewise, Long uses the
`term "power consumption" to refer to energy consumption and this is even
`more apparent when, for example, in claim 2 in Long where he's talking
`about power consumption rate. That's not something in science. He's really
`referring to power. Power consumption rate, see he ran out of terms when
`he was talking about the rate at which energy was moved. He really was
`referring to power here.
`Turning now to slide 55. As Dr. Baker described, lowering the
`DRAM operating frequency does not reduce energy and data will be lost if
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`energy or charge is insufficient. Therefore Ashmore and Long do not
`provide a motivation to use Bonella's lower frequency for DRAM flow
`because it does not allow for a smaller battery. As he depicted here in the
`blue areas, the same amount of energy is used regardless of the operating
`frequency. On the left the power is used for time T and on the right half of
`that power is used for time 2T.
`Turning now to slide 56. Dr. Baker described that lowering the
`DRAM operating frequency does not reduce energy. Rather, energy is a
`well-studied metric that does not change as a function of the operating
`frequency and you heard the Petitioner say that we've conceded that all the
`old operations put together, you know, is their new theory, but no, we have
`not conceded that. We're showing here that there's just no motivation to do
`this operation. There's no teaching here that the DRAM operating frequency
`will reduce energy.
`Turning now to slide 57. Petitioner's expert agreed that "the reading
`out of the DRAM could end up taking longer at lower frequency." In
`summary, the logic in the petition is fundamentally incorrect. Petition fails
`to treat power as the rate of energy consumption. The Petitioner's expert did
`not understand that battery size is determined by the available energy rather
`than power and nothing in the record shows that power of the back-up
`battery is limited. Ashmore and Long do not provide a motivation to use
`Bonella's lower frequency for DRAM flush because lowering power without
`reducing power consumption does not allow for a smaller battery.
`Turning now to slide 59. On reply, Petitioners did not rebut the fact
`that a lower operating frequency would not save energy for a DRAM flush.
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`Instead they added a new theory. On reply beginning at page 22, Petitioners
`propose a new idle period theory about energy consumption. This new
`theory is not responsive to the POR, it's untimely, and lacks support from
`their expert. Patent Owner therefore objects to this as a new theory.
`Moreover, the technology in this case is complex and Petitioner's reply is
`based only on attorney argument. But even considering it, Petitioner's idle
`period theory is incorrect and unsupported because Petitioner's have failed to
`show that the same memory can be refreshed at a lower power regardless of
`the operating frequency so therefore there's always this threshold that needs
`to be held for power for refreshing regardless of what speed the DRAM is
`operating at.
`Turning now to slide 60. If the power is reduced to the DRAM, the
`same energy is distributed over a longer time. Therefore even with this new
`idle mode theory a lower operating frequency does not guarantee a smaller
`battery. Having made no reference to this argument in their demonstratives,
`Petitioners have apparently recognized that this, their only remaining
`argument, is unsupported. Now turning back to slide 9 and the meaning of
`memory module.
`JUDGE CLEMENTS: Counsel, before we go to the memory
`modules.
`MR. BRADLEY: Sure.
`JUDGE CLEMENTS: Petitioner says in reply basically Flash is the
`rate-limiting component here, the data transfer rates to and from Flash are
`much slower than data transfer rates to and from the DRAM, so that being
`the case why clock the DRAM at 100 times the data rates of the Flash when
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`you could lower it down to ten times the data rates of the Flash and not take
`up any additional time, but use less power because you're clocking the
`DRAM slower. That argument I have to admit seems fairly persuasive to
`me. What do you say in response to that?
`MR. BRADLEY: They would be using a lower power, yes, but for a
`longer period of time. If you flush, as described in the patent, into a buffer
`then you only are operating the DRAM for a short period of time. So it's
`just a trade off between time and power but the same amount of energy will
`be consumed out of the battery.
`JU
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