USB Design by Example
`A Practical Guide to Building I/O Devices
`
`INTEL John Hyde
`
`1
`
`DELPHI Exhibit 1008
`
`

`

`Copyright© 2001 Intel Corporation. All rights reserved.
`Published by Intel Press.
`
`ISBN 0-9702846-5-9
`
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`Printed in the United States of America
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`10 9 8 7 6 5 4
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`First printing, April 2002
`
`2
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`

`

`4
`
`USB Design by Example
`
`The Modern PC: A Short History
`
`What is a modem PC? And if you have an old PC, how do you make it
`modern? This section gives a brief history of the modern PC, and introduces USB
`as a solution to simple, low-cost I/O expansion.
`
`When IBM announced the PC, the company documented the PC inte als in their
`typically thorough style. The availability of this information, along with a strong
`desire to add hardware to the PC, allowed many people to develop plug-in cards
`so that the PC could monitor and even control their environment. Initially, the
`slots inside the IBM PC didn t even have a name. The name ISA, for Industry
`Standard Architecture, was coined in the early 1980s. There were no official
`guidehnes on how a PC should be expanded, so cards made by vendor A could
`not be used at the same time as cards made by vendor B. It took until the early
`1990s for the ISA bus to be documented (ISA & EISA Theory and Operation by
`Edward Solari is the classic text for this information). Some developers took a
`lower-risk approach and created attachments that plugged into the serial and
`parallel ports. But this port resource was quickly depleted, and when more serial
`and parallel ports were added via plug-in cards, the internal design of the PC
`could not support enough interrapts, Direct Memory Access (DMA) channels, or
`other system resources. Sometimes the interactions were subtle and failed only
`under certain conditions. The bandwidth of these data paths in and out of the PC
`was also quite low. A better solution was required.
`
`The PCI Bus
`
`Many PC and PC component vendors, including Compaq, Digital Equipment,
`NCR, IBM, and Intel Corporation; worked together to define a high-bandwidth
`expansion bus that was eventually called the Peripheral Components Interconnect
`bus, or PCI. This bus definition included configuration information and controls
`to alleviate the vendor-to-vendor conflicts of ISA. The PCI bus was included
`beside the ISA bus inside the PC host. Software support for automatic
`configuration was added to Windows so that PCI cards became easy to install.
`This was the start of Plug and Play, an industry-wide initiative that governs the
`way add-in hardware should identify itself.
`
`3
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`

`

`Chapter 1 Adding I/O Devices to a Modern PC
`
`5
`
`PCI was an instant success for high-bandwidth devices, but was seen by many as
`excessive and complex for the simpler I/O devices. The PCI interface
`components typically cost more than a simple I/O device. Another main
`disadvantage was the location of the PCI connectors; just like those of their ISA
`predecessor, they were inside the PC case. This meant that the case had to be
`opened, clamping screws undone, boards plugged exactly right into connectors
`that were difficult to identify, and then the system reassembled. This was
`discouraging for many would-be users because of their fears that the PC could be
`easily broken by these actions. PCI was a better solution but did not address
`easy expansion of simple I/O.
`
`Several PC-industry leaders worked together to define an external expansion bus.
`Driven by customer demand, it was essential that this bus be simple and low cost.
`Consumer focus groups demanded that PC expansion be as easy as connecting a
`VCR to a television you should not need to set switches or run software, and
`you must be allowed to plug and swap cables while the equipment is tu ed on.
`
`Easy to Use an Low Cost
`
`With the goal of designing an architecture that would be easy to use and low cost
`to implement, industry leaders turned their attention to a high-speed serial bus
`that came to be called the Universal Serial Bus (USB). Serial was preferred over
`parallel because the cables would be cheaper, and it would be easier to implement
`dynamic configuration. Dynamic configuration meant that the I/O subsystem
`could be extended or reconfigured by swapping cables while the PC was running.
`Rebooting a modem PC takes several minutes, so this situation had to be avoided
`in every solution.
`
`4
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`

`

`6
`
`USB Design by E ample
`
`A typical configuration included one PC host and many I/O devices. To reduce
`the overall system costs, a master-slave implementation was chosen for USB.
`The PC host would be the master controlling all traffic on the serial bus the
`additional silicon complexity required to implement the controlling protocols
`would need to be implemented only once in the host. The slave I/O device could
`then be made simpler and, therefore, cheaper. This asymmetric solution means
`that the two ends of a cable are not equal—we need to know which end connects
`to the master and which end to the slave! The terminology adopted by the USB
`specification is upstream (toward the PC host) and “downstream” (toward the
`I/O device); see Figure 1-1. The upstream end of the cable controls the protocol
`and instructs the downstream end to reply at defined times.
`
`Figure 1-1. The two ends of a USB cable are not the same!
`
`Another major decision that would support both design goals was to officially
`supply power from the PC host. Operating modes that specify differing power
`limits are defined, and a good understanding of this feature allows cheaper and
`easier-to-use I/O devices to be built. You can, for example, eliminate the cost of a
`power supply in simpler I/O devices and ease the design of more complex I/O
`devices. Some implementation trade-offs in the I/O devices can also be made
`when the system specifies minimum and maximum power levels.
`
`5
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`

`

`Chapter 1 Ad ing i/Q Devices to a Modern PC
`
`7
`
`USB Terminology
`
`The USB specification introduced new terms that are used throughout the USB
`literature. This section introduces those terms and presents an overview. Later
`chapters discuss each element in detail.
`
`A typical configuration has a single PC host with multiple devices interconnected
`by USB cables (Figure 1-2). The PC host has an embedded hub, also called the
`root hub, which typically contains two or more USB ports.
`
`PC Host
`
`Figure 1-2. Standard USB designations
`
`Device configurations range from simple to complex:
`
`® Hubs If a device contains only additional downstream USB ports, then it is
`called simply a hub.
`© I/O device: An I/O device adds a capability to the PC host. It has a single
`upstream connection and interacts with the real world to create or consume
`data on behalf of the PC host.
`
`© Compound e ice: If a device includes both I/O and hub functionality, it is
`called a compound device (for example, a keyboard that includes additional
`USB downstream ports).
`® Composite de ice: If a single device implements two or more sets of
`diverse functions, it is called a composite device (for example, a telephone
`with keypad and dual audio channels).
`
`6
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`

`

`As far as the PC host is concerned, devices are the important feature, and as
`many as 126 devices can be interconnected using external hubs up to five levels
`deep (Figure 1-3).
`
`Figure 1=3. Devices can be nested five hub levels dee
`
`7
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`

`

`Chapter 1 Adding I/O Devices to a Mo ern PC
`
`9
`
`USB now supports three device speeds. The USB specification initially defined
`low speed (LS) at 1.5 Mbps and full speed (FS) at 12 Mbps. Anew high
`speed (HS) at 480 Mbps was recently added to Version 2.0 of the specification.
`Low-speed devices are the cheapest to manufacture and are adequate for
`supporting low-data-rate devices such as mice, keyboards, and a wealth of other
`equipment designed to interact with people. The addition of a high-speed data
`rate enables high-bandwidth devices such as full-color page scanners and
`printers, and mass storage devices to be designed and added to a PC that
`supports a high-speed hub.
`
`We shall see that a high-speed hub is more complex than a full-speed hub, and it
`is anticipated that it will cost a little more initially. A typical system, therefore,
`will have a mixture of HS and FS hubs, as shown in Figure 1-4.
`
`HS Root Hub
`
`I L
`
`A
`
`HS Hub
`
`A
`
`C ro
`Hub
`
`C rb
`Hub
`
`F F F L
`
`FLIP
`
`USB Cable & Device Speeds
`
`S0 480 Mbps
`! 0 12 Mbps
`I E 1.5 bps
`
`Figure 1-4. A typical system using two hub t pes
`
`Note that connecting a low-speed device onto the root hub, as I have shown, is a
`legal connection; it does, however, preclude connecting high- and full-speed
`devices to this node. It would be better, from a system erspective, to connect the
`low-speed device onto an FS hub.
`
`8
`
`

`

`10
`
`USB Design by Example
`
`In the figure, the cables are labeled in different ways for illustrative purposes
`only in fact? all of the USB cables look and operate the same. Note that the HS
`hubs communicate with each other at 480 Mbps they also communicate with
`HS devices at 480 Mbps. An FS hub can be connected to an HS hub, but it will
`only communicate at 12 Mbps. However, multiple FS hubs may be attached to
`an HS hub and each will receive their own 12 Mbps channel—the bandwidth
`is not shared at this level. If an FS hub is connected to another FS hub, then the .
`12 Mbps channel is shared, as defined by the ori inal USB specification.
`
`Any speed of I/O device may be connected to any downstream port of any hub.
`The speed of the I/O device will determine the data rate on the cable to the hub.
`The only poor choice is attaching an LS device to an HS hub, as this will limit
`the speed of the USB segment to 1.5 Mbps. Fortunately, the operating system
`will recognize this suboptimal connection during enumeration of the device, and
`will recommend that you detach the LS device and reattach it to an FS hub.
`
`PC Host
`
`A typical configuration has a single PC host. (You can interconnect two PC hosts
`using USB, and this special case is discussed in Chapter 10.) The PC host runs a
`USB-aware operating system software that supports two distinct functions—
`initialization and run time.
`The USB initialization software is active at all times and not just during PC host
`power-on. Because the initialization software is always active, USB devices can
`be added and removed at any time. Once a device is added to a PC host, the
`device is enumerate by the USB initialization software and assigned a unique
`identifier that is used during run time. (This enumeration process is described in
`detail in Chapter 3.)
`Figure 1-5 shows how the USB host software is layered; layering supports many
`different software solutions. A class is a grouping of devices, with similar
`characteristics, that can be controlled by a generic class device driver. Examples
`of classes include mass-storage devices, communications devices, audio devices,
`and human-interface devices. A single FO device can belong to multiple classes.
`If a device fits neatly into one or more of these predefined classes, then you don t
`need to write operating system software, such as a device driver. The software
`structure allows you to focus more of your I/O device design effort on the
`function and usability of the I/O device and less on the inner workings of an
`operating system. Vendor-defined commands are also available for those who
`want specific functionality for their device only.
`
`9
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`

`

`Chapter 1 Adding I/O Devices to a Modern PC
`
`11
`
`File Interface
`(Open, Close, Read, Write)
`
`Transaction Interface
`(Buffer Movement)
`
`Packet Interface
`(Sync, Data, ACK, NAK)
`
`Physical Interface
`(Differential Signaling)
`
`Figure 1-5, PC host software for USB is defined in layers
`
`USB Cable
`
`A USB cable transports both power supply and data signals.
`
`The power supplied by the USB cable is an important benefit of the USB
`specification. A simpler I/O device can rely on the USB cable for all its power
`needs and will not require the traditional black brick plugged into the wall. The
`power resource is carefully managed by USB, with the hub device playing the
`major role.
`
`A hub or I/O device can be self-powered or bus-powered.
`
`® Self-powered is the traditional approach in which the hub or I/O device has
`an additional power cable attached to it.
`
`® A bus-powered device relies solely on the USB cable for its power needs and
`is often less expensive.
`
`The USB cable connectors were specifically designed with the power pins longer
`than the signal pins so that power would always be applied before signals. Two
`different connector types were defined, to ensure that illegal configurations could
`not be made (Figure 1-6). An “A -type connector defines the downstream end of
`the cable, and a B -type connector defines the upstream end.
`
`10
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`

`

`12
`
`USB Design by Example
`
`Downst eam
`Connecto
`
`Figure 1=6. Different connectors efine the
`
`ends of a USB cable
`
`Upstream B
`Connector
`
`The design center for a USB application is a desktop PC external expansion
`bus, so a length of 5 meters was chosen as the maximum cable length between a
`hub and a device. With five levels of hubs, this means that any device will be
`located within a 30 meter radius of the PC Host. Many applications require a
`greater distance, and the industry has responded with repeater/extender
`products (these are covered in Chapter 9).
`
`A cable with a 480 Mbps or even a 12 Mbps data rate makes a good antenna,
`unfortunately, so cable shielding is required. Shielding adds to the cost of the
`cable, but is not required for the 1.5 Mbps signaling rate, so this approach is
`cheaper. The USB specification allows a system to use a mi ture of 480 Mbps,
`12 Mbps and 1.5 Mbps devices on two cable types (shielded and unshielded), but
`I recommend that you only use shielded cables.
`The USB specification defines differential signaling on its data wires to reduce
`the effects of induced system noise. The USB bus is a point-to-point connection
`that operates in half-duplex mode. There is no direction bit that identifies the
`current transmitter or receiver this information is embedded in the bus protocol.
`While this does simplify the implementation, it also makes it difficult to build a
`bus repeater or a bus isolation unit (other solutions to these requirements are
`presented in Chapter 9). The fundamental element of communication on the USB
`bus is a acket, and defined sequences of packets are used to build a robust
`communications channel. Chapter 2 describes packet types and the
`communications protocol in detail.
`
`11
`
`

`

`Chapter 1 A ding I/O Devices to a Modern PC
`
`13
`
`ub Device
`
`The hub has two major roles: power management and signal distribution.
`
`An external hub has one upstream connection and multiple downstream
`connections. The USB specification does not limit the number of downstream
`connections, but seven seems to be the practical limit. The most popular hub size
`has four."
`
`A hub can be self-powered or bus-powered:
`
`® The self-powered approach is recommended, in which the hub has an
`additional power cable attached to it. If the hub is self-powered, it can
`provide up to 500 mA to each of its downstream ports.
`® A bus-powered device relies solely on the USB cable for its power needs. If
`the hub is bus-powered, then it has a maximum of 500 mA available. The hub
`will use 100 mA for itself, and have only 100 mA available for each of four
`downstream USB ports (unless the socket is suspended). The situation is
`worse if the hub has more than four downstream ports, in which case less
`than 100 mA will be available for each port.
`
`Because of the power limitation, I only reco mend bus-powered hubs in
`exceptional situations. A bus-powered hub can support only 100 mA on each of
`its downstream USB ports. Although this is enough to enumerate all I/O devices,
`it is typically not enough for most I/O devices to operate. The current version of
`Windows 98 does not flash lights or give audible warning if an enumerated
`device can t operate because of lack of hub power, so the user is left
`wondering why the newly attached device doesn’t work not a good user
`experience. This situation can get worse: Nothing prevents a user from adding a
`second bus-powered hub onto a port of the first bus-powered hub; the second hub
`uses all of the 100 mA for itself and cannot even supply enough power to
`enumerate additional I/O devices. This confuses a user even more. Note that
`Windows 98, and Windows 2000, will alert the user if a high-power device is
`attached to a low-power hub, and will recommend a better system configuration.
`
`When first attached to a USB socket, any I/O device (which includes a hub) can
`always expect 100 mA to be available. The device uses this power to operate
`during the enumeration stage. The device may not use more than 100 mA until it
`is configured; if it does, the power source on the USB socket will be removed and
`an error sent to the PC host. If the I/O device requires more than 100 mAfor run¬
`time operation, it can request up to 500 mA from the hub. If the hub can supply
`this power, it does so; otherwise, the I/O device is not configured, and an error
`message is sent to the PC host. If the I/O device requires more than 500 mA for
`run-time operation, the device must be self-powered and will need a power cord.
`
`12
`
`

`

`14
`
`USB Design by E ample
`
`It is worth the design effort to reduce your I/O device power to less than 500 mA,
`because this eliminates the need for an e ternal power source.
`
`An I/O device is required to power itself down, or suspend, when there is no
`ctivity on the USB bus. In the USB specification, no activity is defined to
`mean no bus signaling for 3 ms. The maximum amount of power that may be
`drawn during a suspend is 0.5 mA this is a larger design ch llenge, as we shall
`see in later chapters.
`
`I/O Device
`
`A PC host creates data for, or consumes data from, the real world, as shown in
`Figure 1-7. A scanner is a good example of a data-creating I/O device, and a
`printer is a good example of a data consuming I/O device.
`
`PC Host
`
`Figure 1=7. An i/O device connects the USB to the real world
`
`A single I/O device could support both a data creator and a data, consumer, so a
`different software driver may be required for each of these two distinct tasks. The
`software (or logical) view of the USB connection is shown in Figure 1-8. The
`logical view is deliberately general in nature, so that all types of real-world
`connections can be made. This di gram is best explained from the bottom up.
`
`13
`
`

`

`Chapter 1 Adding I/O Devices to a Mo ern PC
`
`15
`
`Figure 1=8, Logical view of an I/O evice
`
`The term endpoint is used to describe a point at which data enters or leaves a
`USB system. An IN endpoint is a data creator, and an OUT endpoint is a data
`consumer. Note that the data direction is relative to the PC host if you
`remember that the PC host is the master controlling all data movements, then
`the data direction is easy to understand.
`
`A typical real-world connection may need multiple IN and/or OUT endpoints to
`implement a reliable data-delivery scheme. This collection of endpoints is called
`an interface, and is directly related to a real-world connection. The operating
`system will have a software driver that corresponds to each interface. The
`operating system uses the term ipe to describe the logical connection between a
`software driver on the PC host and the interface on the I/O device. There is
`always a one-to-one mapping between software driver pipes and interfaces.
`
`Real-world devices may have multiple interfaces a telephone, for example, has
`a keypad interface and an audio interface. The operating system will manage the
`keypad and audio using two separate device drivers. This decomposition of
`complex devices into smaller logical interfaces means that building-block
`software elements can be quickly used to manage these complex devices. We
`don t have to invest the time and effort to write a special telephone device
`driver we can be operational with the class drivers already included in the
`operating system. All the interfaces run concurrently.
`
`14
`
`

`

`16
`
`USB Design by Example
`
`A collection of interfaces is called a configuration, and only one configuration
`can be active at a time. A configuration defines the attributes and features of a
`specific model. Using configurations allows a single USB connection to serve
`many different roles, and the modularity of this system solution saves in
`development time and support costs.
`
`dding USB to an Old33 PC
`
`All desktop PCs and laptops manufactured today contain a USB host controller
`and one or more downstream ports. An older PC or laptop may be upgraded
`easily with a PCI add-in card or PCMCIA card, as shown in Figure 1-9. You
`should also upgrade your operating system software to ensure that you have the
`best support for USB.
`
`Figure 1-9. Adding USB capabilit to a PC host
`
`15
`
`

`

`25
`
`Chapter 2
`Close to the Wire
`
`In this chapter, we study PC host requests on the USB bus from the bottom up:
`
`® We look at the signaling on the wires, and discover an underlying real-time
`structure of frames and microframes.
`® Within these (micro)frames we see a packetized signaling scheme at one
`of three standard speeds.
`
`® We learn that sequences of packets are used to generate transactions.
`® We list the special packets that a PC host uses to communicate with hubs that
`support devices at different speeds.
`© We learn that control transactions are used during enumeration, and that three
`additional transaction types (interrupt, bulk, and isochronous) are used
`during run time.
`® We study the control requests that a PC host can use to interact with
`an I/O device and a hub device.
`
`Differential Signaling
`
`If you were to put an oscilloscope on the data wires of a USB you would see a
`pair of differential signals at one of three standard speeds. The two data wires,
`D+ and D , are driven at the same time and typically in anti-phase (there are a
`few single-ended signaling methods; these are described later). The USB data
`wires are connected point-to-point and the signaling is half-duplex, which means
`that only one end of the wire pair is driven at a time. The protocol, presented in
`the following paragraphs, defines how the two ends of the wire pair alternate in
`the transmission of information. In this discussion, the upstream device is the
`tr nsmitter,, and the downstream device is the receiver, unless otherwise noted.
`
`The USB data wires do not include a CLOCK signal, so the communication
`between nodes is described as asynchrono s The base speed of each pair of
`USB data wires is negotiated during enumeration (described in Chapter 3), and a
`SYNC signal is transmitted prior to the data transfer so that the receiver can tune
`its nominal bus clock to the exact transitions of the transmitter. When receiving
`a signal from the bus, a device will typically oversample the signals so that
`transitions can be better detected. In the next section we ll see that a CLOCK
`signal is embedded in the data.
`
`16
`
`

`

`26
`
`USB Design by Example
`
`The IDLE condition of a hig -speed bus is D+ low and D- low; of a full-speed
`bus is D+ high and D- low; and of a low-speed bus is D+ low and D- high.
`The operation at all speeds is the same; for the sake of clarity, therefore, only
`one set of diagrams will be shown. The IDLE state will be called the J state
`while the active state will be called the K state this will allow one set of
`diagrams to apply to all three bus speeds. The time scale of the diagrams is
`dependent upon the base speed of each pair of USB data wires; the bit-time (time
`between adjacent transitions of the bus) will be 666.6 ns, 83.3 ns and 2.083 ns
`for low-, full-, and high-speed bus segments, respectively.
`
`The Fundamental Packet
`
`The fundamental element of communication on the USB data bus is the packet.
`A packet consists of three pieces: a start, some information, and an end, as shown
`in Figure 2-1.
`
`The start of a packet is signaled by a transition out of the J state into the K state.
`More transitions are driven by the transmitter at the next available bit times, to
`produce a SYNC sequence. The receiver uses this sequence to tune its receive
`clock with the transitions of the received data, thus ensuring reliable reception
`of the information portion of the packet. The SYNC sequence terminates with
`two K states, and the packet information begins in the next bit time.
`
`The SYNC pattern generated by the PC host for a high-speed bus will contain
`32 bits of SYNC (KJKJK.. . KJKK). Some of these SYNC bits will be consumed
`by intervening hubs but the farthest end device is guaranteed to see at least
`12 bits of SYNC—this will be sufficient to lock the receive clock. Full-speed and
`low-speed devices use 8 bits of SYNC, so data will start at bit time 8.
`
`17
`
`

`

`27
`
`The packet information varies from 1 byte to 3074 bytes. The first byte is always'
`a Packet Identifier (PID), that will define how the other information bytes should
`be interpreted. A packet identifier byte is formed with 4 bits and the complement
`of these 4 bits; this redundancy allows the receiver to error-check the PID. The
`PID encoding is shown in Table 2-1.
`
`Table 2-1. USB packet types
`
`PID value
`0101
`1101
`1001
`0001
`0011
`1011
`0111
`1111
`0010
`1010
`1110
`0110
`1100
`1100
`1000
`0100
`0000
`
`Packet type
`SOF
`SETUP
`IN
`OUT
`DATA0
`DATA1
`DATA2
`MDATA
`ACK
`NAK
`STALL
`NYET
`PRE
`ERR
`SPLIT
`PING
`(reserved)
`
`Pac et categor
`
`PC host-hu only
`
`High-spee onl
`
`token
`
`token
`
`token
`
`token
`
`data
`
`data
`
`data
`
`data
`
`handshake
`
`handshake
`
`handshake
`
`handshake
`
`special
`
`special
`
`special
`
`special
`(reserved)
`
`X
`
`X
`
`X
`
`X
`
`X
`
`)
`
`iso only
`
`iso only
`
`X
`
`X
`
`X
`
`X
`
`There are four categories of packets: toke packets are used to set up
`data cke s, which are acknowledged by han shake ckets. There are also
`s eci l ackets used to implement speed-conversion connections. The next
`section discusses each packet category in detail. Each will be presented as a
`discrete building block, and we ll use a sequence of these building blocks to
`define a robust communications channel.
`
`The last part of a packet is an End-of-Packet (EOP) identifier. A high-speed
`EOP pattern is 40 bit-times without a transition this will cause a bit-stuff error
`(as explained in the following paragraphs), which is expected. Full- and low-speed
`connections drive both D+ and D- low for two bit times to signal this EOP. This
`is not a differential signal it is an easily identified, Single-Ended Zero (SEO).
`
`18
`
`

`

`49
`
`Chapter 3
`Getting to Know You" Enumeration
`
`Let us assume that a PC host meets all of the requirements described in
`Chapter 1, is running a USB-aware operating system, and has an available USB
`port. This port could be on the PC host itself (an embedded hub), or could be on
`an external hub. Assume that we have a new USB I/O device that we want to add
`to this running system. What actually happens between the host, the hub, and the
`device to deliver the many USB features?
`
`In this chapter, after understanding what the PC host is doing, we learn the
`responsibilities of a general I/O device. All devices describe themselves using a
`collection of specially formatted bytes called descriptor tables. We start by
`looking inside the simplest example and then expand the discussion to cover the
`general case. We then derive the minimum hardware requirements for an I/O
`device. I keep this chapter as general as possible, so that the discussion will not
`be constrained by specific product implementations. We shall look at real
`products in the next chapter.
`
`There are many chicken-vs.-egg situations in this chapter, so I defer some
`technical discussions to keep the flow of the concepts moving forward.
`
`19
`
`

`

`50
`
`USB Design by Exam le
`
`Device Detectigw
`
`Figure 3-1 shows connection details of the USB cable. The cable has four wires:
`two power wires for Vbus and Gnd and two signal wires for D+ and D-. The
`cable end that attaches to the hub has a Series A connector, and the cable end that
`attaches to the new device is either connected directly (no connector) or has a
`Series B connector. Both connectors have longer power and ground connector
`pins to ensure that the device has good voltages before signals are applied.
`
`Current
`Limiter
`
`D+ E
`
`Vcc
`
`D-
`Gnd
`
`Hub
`Controller
`
`Series A
`Connector
`
`Series B
`Connector
`
`X ~>c > >
`
`USB Cable
`
`Biasing Resistor
`
`®~|1.5 K I
`
`Vcc
`D+
`D-
`Gnd
`
`Device
`Controller
`
`I/O Device
`
`o {Tsk}
`iMf
`Dual Biasing
`Resistors
`
`Hub
`
`Figure 3-1. USB cable connection etails
`
`The hub port supplies Vbus and Gnd. The current limiter will initially prevent
`more than 100 mA from being drawn, even instantaneously, from the hub. If
`e cess current is drawn, then the hub informs the host software of this error, an
`error message is displayed on the PC screen, and the device is not configured.
`
`Because we haven t plugged in the I/O device yet, it is in the unattached state.
`
`In Figure 3-1, note the two biasing resistors in the hub; they ensure that D+ and
`D- are low when no device is plugged in. There is a single biasing resistor on
`the device that is attached to either D+ or D . When the USB cable is plugged
`in, the biasing resistor causes D+ or D- to rise above ground, and this changed
`voltage difference is recognized by the hub. We have detected a cable being
`plugged in! By convention, if the device s biasing resistor is connected to D+,
`we are informing the hub that this device is full speed (12 Mbps), whereas a
`biasing resistor on D- indicates a low-speed (1.5 Mbps) device. Simple and
`effective!
`
`20
`
`

`

`Chapters Getting to Know You: Enumeration
`
`51
`
`Note that a high-speed hub or a high-speed device has not been identified yet. A
`high-speed device is first detected as a full-speed device, and will alert the hub of
`its high-speed capabilities a little later in the sequence.
`
`The hub detected the presence of an I/O device by the change in DC level caused
`by the I/O device biasing resistor. Imagine, for a moment, that this biasing
`resistor was connected to Vbus via a transistor switch. Turn the transistor On and
`the hub recognizes the I/O device being attached. Turn the transistor Off and the
`hub recognizes this as the I/O device being disconnected. If the device controller
`had the capability to turn this transistor On and Off it could programmatically
`connect and disconnect itself from the PC host. This technique is very useful if
`the I/O device requires extensive initialization before being connected to the