Petition for IPR of U.S. Patent No. RE45,542
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`IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
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`––––––––––
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`––––––––––
`
`SanDisk LLC
`Petitioner
`v.
`
`Memory Technologies, LLC
`Patent Owner
`
`––––––––––
`
`Patent No. RE45,542
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`––––––––––
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`PETITION FOR INTER PARTES REVIEW UNDER 35 U.S.C. § 311, 37 C.F.R.
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`§§ 42.100 ET SEQ.
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`

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`Petition for IPR of U.S. Patent No. RE45,542
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`I.
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`TABLE OF CONTENTS
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`MANDATORY NOTICES, STANDING, AND FEES .................................... 1
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`A. Mandatory Notices ........................................................................................ 1
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`1. Real Party in Interest - 37 C.F.R. § 42.8(b)(1) ............................. 1
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`2. Related Matters - 37 C.F.R. § 42.8(b)(2) ...................................... 1
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`3. Lead and Back-up Counsel - 37 C.F.R. § 42.8(b)(3) .................... 2
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`4.
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`Service Information - 37 C.F.R. § 42.8(b)(4) ............................... 2
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`B. Certification of Grounds for Standing - 37 C.F.R. § 42.104(a) .................... 3
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`C. Fees - 37 C.F.R. § 42.103(a) ......................................................................... 3
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`III.
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`Identification of Challenge ................................................................................ 3
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`A. Challenged Claims ......................................................................................... 3
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`B. Publications Relied Upon .............................................................................. 3
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`C. Grounds for Challenge .................................................................................. 4
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`IV.
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`Background of the Technology ......................................................................... 4
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`A. Technical Background ................................................................................... 4
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`B. Level of Skill in the Art ................................................................................. 6
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`V.
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`THE ’542 PATENT ........................................................................................... 6
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`A. Overview of the ’542 Patent .......................................................................... 6
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`B. The ’542 Patent Prosecution History .......................................................... 11
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`VI.
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`Prior Art ........................................................................................................... 13
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`A. Overview of Garner (U.S. Patent No. 5,724,592) ....................................... 14
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`-i-
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`Petition for IPR of U.S. Patent No. RE45,542
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`B. Overview of Toombs (U.S. Patent No. 6,279,114) ..................................... 16
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`VII. Claim Construction .......................................................................................... 17
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`A. “peripheral device” ...................................................................................... 18
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`B. “default value” ............................................................................................. 19
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`C. “limiting value” ........................................................................................... 20
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`D. “a connector configured to connect the peripheral device to an electronic
`device for supplying power to the peripheral device” ................................ 22
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`E. “maximum power consumption of the peripheral device” ......................... 23
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`F. “means for setting the maximum power consumption of the peripheral
`device to a value” ........................................................................................ 28
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`VIII. REASONABLE LIKELIHOOD EXISTS THAT THE CHALLENGED
`CLAIMS ARE UNPATENTABLE. ............................................................... 29
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`A. Ground 1: Garner anticipates Claims 28-33, 37, 38 and 40 under § 102. ... 29
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`1.
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`Independent Claim 28 ................................................................. 29
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`2. Dependent Claim 29 ................................................................... 39
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`3. Dependent Claim 30 ................................................................... 39
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`4. Dependent Claim 31 ................................................................... 41
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`5. Dependent Claim 32 ................................................................... 42
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`6. Dependent Claim 33 ................................................................... 42
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`7. Dependent Claim 37 ................................................................... 43
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`8. Dependent Claim 38 ................................................................... 43
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`9. Dependent Claim 40 ................................................................... 44
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`B. Ground 2: Combination of Garner and Toombs renders Claims 28-33,
`37-40 obvious under § 103. ......................................................................... 45
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`1.
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`Independent Claim 28 ................................................................. 57
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`-ii-
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`Petition for IPR of U.S. Patent No. RE45,542
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`2. Dependent Claim 29 ................................................................... 67
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`3. Dependent Claim 30 ................................................................... 67
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`4. Dependent Claim 31 ................................................................... 68
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`5. Dependent Claim 32 ................................................................... 68
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`6. Dependent Claim 33 ................................................................... 68
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`7. Dependent Claim 37 ................................................................... 69
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`8. Dependent Claim 38 ................................................................... 69
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`9. Dependent Claim 39 ................................................................... 69
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`10. Dependent Claim 40 ................................................................... 70
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`IX.
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`CONCLUSION ............................................................................................... 71
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`-iii-
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`Petition for IPR of U.S. Patent No. RE45,542
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`PETITIONER’S LIST OF EXHIBITS
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`EXHIBIT DESCRIPTION
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`1001
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`1002
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`1003
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`1004
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`1005
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`1006
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`1007
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`1008
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`1009
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`1010
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`U.S. Patent No. RE45,542
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`Declaration of Dr. R. Jacob Baker
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`U.S. Patent No. 4,019,068 (Bormann)
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`File History for U.S. Patent No. 7,278,033 (App. No. 10/401,338)
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`U.S. Patent No. 7,278,033 (Mylly)
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`File History for U.S. Patent No. RE45,542 (App. No. 13/902,227)
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`U.S. Patent No. 5,724,592 (Garner)
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`U.S. Patent No. 6,279,114 (Toombs)
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`PCMCIA PC Card Standard, Release 2.1
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`Declaration of Scott Bennett
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`-iv-
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`Petition for IPR of U.S. Patent No. RE45,542
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`SanDisk LLC (“Petitioner” or “SanDisk”), hereby petitions for inter partes
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`review of Claims 28-33 and 37-40 of U.S. Patent No. RE45,542 (“the ’542
`
`Patent”), assigned to Memory Technologies, LLC (“Patent Owner” or “Memory
`
`Technologies”).
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`I. MANDATORY NOTICES, STANDING, AND FEES
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`A. Mandatory Notices
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`1.
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`Real Party in Interest - 37 C.F.R. § 42.8(b)(1)
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`The real parties in interest are: SanDisk LLC, Western Digital Corporation,
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`Western Digital Technologies, Inc., SanDisk, Limited, SanDisk Storage Malaysia
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`Sdn. Bhd., SanDisk Semiconductor (Shanghai) Co., Ltd., and SanDisk Israel
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`(Tefen) Ltd. The following are direct or indirect parents or subsidiaries of the
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`preceding companies: HGST, Inc., Virident Systems International Holdings Ltd.,
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`Western Digital International Ltd., SD International Holdings Ltd., SanDisk
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`Technologies LLC, SanDisk International Holdco B.V., SanDisk IL Ltd., SanDisk
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`Bermuda Limited, SanDisk Manufacturing Unlimited Company, SanDisk
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`Bermuda Unlimited and SanDisk China Limited.
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`Related Matters - 37 C.F.R. § 42.8(b)(2)
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`2.
`The ’542 Patent is subject to a pending lawsuit entitled Memory
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`Technologies, LLC v. SanDisk LLC et. al., No. 8:16-cv-02163 (C.D. Cal. filed Dec.
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`6, 2016). Petitioner is a defendant in this lawsuit. The ’542 Patent is also subject to
`
`a pending investigation before the International Trade Commission, Inv. No. 337-
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`-1-
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`Petition for IPR of U.S. Patent No. RE45,542
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`TA-3186, entitled In the Matter of Certain Flash Memory Devices and
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`Components Thereof. Petitioner is a respondent in this investigation.
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`Further, the Petitioner has filed or will file other petitions for IPR against
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`other patents held by Patent Owner, including Patent Nos. RE45,486; 8,307,180;
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`9,063,850; 7,275,186; 7,565,469; 7,739,487; and 7,827,370.
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`3.
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`Lead and Back-up Counsel - 37 C.F.R. § 42.8(b)(3)
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`Petitioner designates the following counsels: Lead Counsel is Eliot D.
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`Williams (Reg. No. 50,822) of Baker Botts L.L.P.; Back-up Counsels are Brian
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`Oaks (Reg. No. 44,981) and David Wu (Reg. No. 66,351) of Baker Botts L.L.P.
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`4.
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`Service Information - 37 C.F.R. § 42.8(b)(4)
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`Address: Baker Botts L.L.P., 1001 Page Mill Road, Building One, Suite
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`200, Palo Alto, California 94304-1007.
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`Telephone: 650-739-7500.
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`Facsimile: 650-736-7699.
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`Petitioner consents to service by electronic mail at:
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`• eliot.williams@bakerbotts.com,
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`• brian.oaks@bakerbotts.com, and
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`• davd.wu@bakerbotts.com.
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`A Power of Attorney is filed concurrently herewith under 37 C.F.R.
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`§ 42.10(b).
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`-2-
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`Petition for IPR of U.S. Patent No. RE45,542
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`B.
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`Certification of Grounds for Standing - 37 C.F.R. § 42.104(a)
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`Petitioner certifies that the ’542 Patent is available for IPR and the Petitioner
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`is not barred or estopped from requesting IPR of any claim therein on the grounds
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`set forth herein.
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`C.
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`Fees - 37 C.F.R. § 42.103(a)
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`The Office is authorized to charge any fee set forth in 37 C.F.R. § 42.15(a)
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`or due in connection with this Petition to Deposit Account No. 02-0384.
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`III.
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`IDENTIFICATION OF CHALLENGE
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`A. Challenged Claims
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`IPR is requested for Claims 28-33 and 37-40 of the ’542 Patent.
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`B.
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`Publications Relied Upon
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`• Exhibit 1007 - U.S. Patent No. 5,724,592 (“Garner”), entitled
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`“Method and Apparatus for Managing Active Power Consumption in
`
`a Microprocessor Controlled Storage Device,” filed December 5,
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`1996 and issued March 3, 1998. Garner is prior art under at least 35
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`U.S.C. §§ 102(a), 102(b) and 102(e). Garner was not previously
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`presented to the PTO in the context of the ’542 Patent.
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`• Exhibit 1008 - U.S. Patent No. 6,279,114 (“Toombs”), entitled
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`“Voltage Negotiation in a Single Host Multiple Cards System,” filed
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`November 4, 1998 and issued August 21, 2001. Toombs is prior art
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`-3-
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`Petition for IPR of U.S. Patent No. RE45,542
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`under at least 35 U.S.C. §§ 102(a) and 102(e).
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`C. Grounds for Challenge
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`
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`The statutory grounds on which the challenges are based and the references
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`relied upon are as follows:
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`• Ground 1: Garner anticipates Claims 28-33, 37, 38, and 40 under §
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`102.
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`• Ground 2: The combination of Garner and Toombs renders Claims
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`28-33, 37-40 obvious under § 103.
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`IV. BACKGROUND OF THE TECHNOLOGY
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`A.
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`Technical Background
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`Generally, the ’542 Patent relates to power management of peripheral
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`devices, such as memory cards. (EX1002 ¶¶68, 69.) A memory card is a device for
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`storing electronic data. (EX1002 ¶70.) By 2002, several types of memory cards
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`that use flash or EEPROM memory were in existence, including MultiMediaCard,
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`CompactFlash, and PCMCIA memory cards. (EX1002 ¶71.)
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`A memory card typically relies on a host electronic device (e.g., laptop) to
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`which it is connected for power. (EX1002 ¶72.) Different hosts may have different
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`power-supply restrictions or preferences, and different memory cards may have
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`different power needs. (Id.) Since memory cards were intended to work with a
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`variety of hosts, the issue of compatibility between hosts and memory cards was
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`Petition for IPR of U.S. Patent No. RE45,542
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`well recognized by 2002. (See, e.g., EX1007 1:48-62; EX1008 1:36-56.) A well-
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`known solution to the problem was to allow hosts and memory cards to negotiate
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`the desired operating configuration. (EX1002 ¶73.) For example, a host may read
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`the configuration options supported by a memory card and cause the card to
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`operate in a selected option. (See, e.g., EX1007 2:12-20, EX1008 15:42-49.)
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`Power management circuits have been used by memory devices since at
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`least the 1970s. (EX1002 ¶74.) A well-known power-management technique was
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`for hosts to specify a mode of operation for memory cards, which in turn affects
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`the operational configuration of the memory cards. (EX1002 ¶75.) Memory cards
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`capable of operating in different modes typically start at a default mode and change
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`to a different mode upon request or meeting triggering conditions. (EX1002 ¶76-
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`77.) The supported modes of operation are often stored on the memory device
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`itself in order to inform a host of the available options. (EX1002 ¶78.)
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`The mode in which a memory card operates may affect one or more
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`operational configurations that affect power consumption. (EX1002 ¶75.) Power
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`consumption, which is often measured in Watt-Hours, refers to the amount of
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`energy that is consumed or used over a period of time. (EX1002 ¶80.) Limiting the
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`rate at which power is used (measured in Watts) would in effect limit power
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`consumption. (Id.) For example, power consumption of a 60 Watt lightbulb is
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`limited to 60 Watt-Hours in an hour. (Id.)
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`-5-
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`Petition for IPR of U.S. Patent No. RE45,542
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`Power consumption of a memory card may be limited by adjusting
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`operational configurations of the card. Well-known operational configurations that
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`affect power consumption include, e.g., clock frequency, bus width, and operating
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`voltage/current. (EX1002 ¶¶81-84.) For example, a low clock frequency limits
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`power consumption to a lower level relative to that of a higher frequency. (Id.)
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`B.
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`Level of Skill in the Art
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`The ’542 Patent relates to the field of power management systems for
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`managing power consumption of peripheral devices, such as memory cards. (See,
`
`e.g., EX1002 ¶66.) A person of ordinary skill in the art (hereinafter “POSITA”)
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`“would be a person with a bachelor’s or master’s degree in electrical engineering
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`or a closely related field and two to three years of academic or industry experience
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`in the field of memory system design.” (Id.) Someone with less technical education
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`but more practical experience or vice versa may also meet this standard. (Id.) The
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`prior art also evidences the level of skill in the art.
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`V.
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`THE ’542 PATENT
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`A. Overview of the ’542 Patent
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`The ’542 Patent claims foreign priority to Finnish Patent Application No.
`
`20020594, filed March 27, 2002. The ’542 Patent is directed to methods and
`
`systems for determining and managing power consumption of a peripheral device
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`(e.g., MultiMediaCards). (EX1002 ¶86.) According to the Patent, the described
`
`solution is needed to address power-consumption compatibility issues between
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`-6-
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`Petition for IPR of U.S. Patent No. RE45,542
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`peripheral devices and the variety of host electronic devices to which they can
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`connect. (See EX1001 1:61-2:4.) An illustrative embodiment of the ’542 Patent is
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`shown in Figure 2.
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`
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`Figure 2 shows a peripheral device 2 connected to an electronic device 1 that
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`supplies power to the peripheral device. (EX1001 4:41-48.) The peripheral device
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`comprises a connector 10 for connecting the peripheral device to the electronic
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`device. (EX1001 4:41-43.) The peripheral device also comprises “a processor 13 or
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`the like for controlling the functions of the peripheral device 2,” and a clock
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`-7-
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`Petition for IPR of U.S. Patent No. RE45,542
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`generator 16 for generating clock signals for the processor. (EX1001 4:57-59, 5:1-
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`4.) Further, the peripheral device comprises a memory 14 for storing program code
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`and data, including “a first maximum value and a second maximum value for
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`power consumption,” with the first maximum value being lower than the second.
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`(EX1001 4:65-5:1, 5:31-32.) In one embodiment, the two values define a range
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`from which to select from. (EX1001 7:31-34.)
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`The ’542 Patent describes an embodiment where “the suitable power
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`consumption value can be negotiated by the electronic device and the peripheral
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`device.” (EX1001 9:27-31.) The operations performed by the devices are discussed
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`with reference to Figure 3, copied below.
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`-8-
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`Petition for IPR of U.S. Patent No. RE45,542
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`During startup, the power consumption of the peripheral device is set to a default
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`value, and the processor also sets the clock generator to a frequency that
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`corresponds to this power consumption value. (EX1001 5:26-34, 7:23-25.)
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`Thereafter, the host electronic device queries the peripheral device for its first and
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`second maximum power consumption values. (EX1001 5:48-54, Fig. 3, label 301)
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`In response, the peripheral device reads the requested values from memory (Fig. 3,
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`-9-
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`Petition for IPR of U.S. Patent No. RE45,542
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`label 302), generates a reply message containing the values (label 303), and sends
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`the message to the host (label 304). (EX1001 5:56-6:5.) The host then selects from
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`the received values and sends a “power control message indicat[ing] the power
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`consumption value which is to be set as the maximum value for the peripheral
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`device” (label 305). (EX1001 6:6-17.) Upon determining that the message is a
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`power control message, the processor of the peripheral device “reads the maximum
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`value for power consumption indicated in the message (block 306).” (EX1001
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`6:17-21.) Thereafter, the processor sets the clock frequency and/or bus width to a
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`value corresponding to the maximum value for power consumption. (EX1001
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`6:21-27.) Other possible configuration adjustments include setting the operating
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`voltage, current consumption, bus frequency, and operating mode (e.g., “active
`
`mode” or “power-saving mode”) of memory banks. (EX1001 8:1-39.)
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`The ’542 Patent recognizes that several operational configurations that
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`effectively limit a peripheral device’s power consumption were well known in the
`
`art. For example, in its background section, the ’542 Patent described power
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`consumption being affected by clock frequency and bus width. (EX1001 2:49-59.)
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`Additionally, the ’542 Patent stated that “it should be evident that other methods
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`for adjusting power consumption are also known,” such as by controlling operating
`
`voltage and current consumption. (EX1001 7:64-8:10.)
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`-10-
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`Petition for IPR of U.S. Patent No. RE45,542
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`However, as explained below, the techniques disclosed in the ’542 Patent
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`were well known in the prior art. (EX1002 Sections IX, X, and XI.)
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`B.
`
`The ’542 Patent Prosecution History
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`The ’542 Patent claims priority to a Finnish patent application, No.
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`20020594, filed on March 27, 2002. On March 26, 2003, the Applicant filed U.S.
`
`Patent Application No. 10/401,338 (“’338 Application”) (EX1004). The ’338
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`Application issued as U.S. Patent No. 7,278,033 (“’033 Patent”) on November 2,
`
`2007 (EX1005). On May 24, 2013, the Applicant sought reissue of the ’033 Patent
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`and filed Application No. 13/902,227 (“’227 Application”) (EX1006). The
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`resulting RE 45,542 Patent (EX1001) issued on June 2, 2015.
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`The prosecution history of the ’338 Application clarifies the origin of the
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`claim limitation, “a default value and a limiting value,” as recited in Claim 28 of
`
`the ’542 Patent. On June 26, 2006, the Applicant amended the claims to replace
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`“first maximum value” and “second maximum value” with “first maximum
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`limiting value” and “second maximum limiting value,” respectively. (EX1004 p.
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`291-297.) The amendment was advanced with an argument that the cited prior art
`
`did not teach a “maximum power consumption” set between two limiting values.
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`(EX1004 p. 298.) The Examiner rejected the claims because the words
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`“maximum” and “limit” were superfluous or confusing, since “by the applicant’s
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`own admission, these values are merely limiting values for the maximum value,
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`-11-
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`Petition for IPR of U.S. Patent No. RE45,542
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`and not the maximum value themselves.” (EX1004 p. 312.) Accordingly, the
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`Examiner recommended that the terms be amended to recite a first and second
`
`“limiting value for the power consumption.” (Id.) In response to this rejection, the
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`Applicant replaced “first maximum limiting value” and “second maximum limiting
`
`value” with “default value” and “limiting value,” respectively. (EX1004 p. 321-
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`327.)
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`The prosecution history of the reissuance of the ’542 Patent is particularly
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`relevant
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`to
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`the means-plus-function element and
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`the “maximum power
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`consumption” element. The reissue application added the dependent claims at issue
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`in this IPR and sought to add the following limitation to independent Claim 28:
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`“wherein the means for setting the maximum power consumption includes a
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`processor configured to read an indication of the value from the received
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`information and to set the maximum power consumption to the value based on the
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`indication.” (EX1006 p. 38-40.) The Applicant cited to “6:12-25” as the alleged
`
`support for this limitation. (EX1006 p. 41.)
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`With respect to the means-plus-function term, the Examiner rejected the
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`added limitation because “processor” specified a structure for the recited function
`
`and therefore did not comply with Section 112 ¶6. (EX1006 p. 231-32.) In
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`response, the Applicant replaced the added limitation with the language that
`
`ultimately issued, which removed “processor,” and added Claim 38, which
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`-12-
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`Petition for IPR of U.S. Patent No. RE45,542
`
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`specified a processor as the means-plus-function element in Claim 28. (EX1006 p.
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`259, 261.) Thereafter, the Examiner filed an Applicant Initiated Interview
`
`Summary, which stated that the Applicant expressed intent to invoke Section 112,
`
`¶6 for Claim 28 but not Claim 38. (EX1006 p. 297.)
`
`With respect to the term “maximum power consumption,” The Examiner
`
`found it indefinite because the usage of “maximum” conflicts with its ordinary
`
`meaning. (EX1006 p. 231.) The Examiner reasoned that since “maximum power
`
`consumption” is set to a value between the default and limiting values, it is not
`
`actually a “maximum.” (Id.) In response, the Applicant submitted a declaration
`
`from the inventor, Kimmo Mylly, to explain that “maximum” is a limit on power
`
`consumption. Citing to the declaration, the Applicant explained:
`
`A POSA (“person having ordinary skill in the art at the
`time of filing the application”) would understand that
`“maximum” as recited, at least “relates to a maximum
`limit on
`the fluctuating power consumption of a
`peripheral device.” (Mylly Decl. ¶8.) “[A POSA]
`recognized that the power consumption of a peripheral
`device fluctuated over the course of its operation. As a
`result, the ‘maximum power consumption’ recited in the
`claims related to a limit on the fluctuating power
`consumption of the peripheral device.” (Id. at ¶12.) .
`
`(EX1006 p. 266-267.)
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`VI. PRIOR ART
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`Petition for IPR of U.S. Patent No. RE45,542
`
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`A. Overview of Garner (U.S. Patent No. 5,724,592)
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`Garner discloses a flash memory system capable of being placed in different
`
`power-expending modes by a host device. (EX1007 2:12-19.) To address
`
`compatibility issues between hosts and storage devices, Garner aims to “allow
`
`storage devices to function with all of these possible systems in the power ranges
`
`available to each of these systems.” (EX1007 1:48-59, 4:40-45.)
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`In one embodiment, Garner describes a microprocessor-controlled flash
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`memory storage device 15, shown in Figure 2.
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`The storage device is configured to connect to and obtain power from a host digital
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`device (e.g., computer). (EX1007 4:36-45, Fig. 1.) The storage device connects to
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`-14-
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`Petition for IPR of U.S. Patent No. RE45,542
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`the host through interface 21, PCMCIA bus, and PCMCIA bridge circuit 16
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`(shown in Fig. 1). (EX1007 3:26-33, 3:57-58.) Incoming signals are decoded by
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`the interface and processed by logic circuit 22, which is “assisted in its operation
`
`by a microprocessor 28.” (EX1007 3:59-4:16.)
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`In one embodiment, the storage device can operate in four different power
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`modes “which use progressively less power,” including a “lowest power mode”
`
`and a “highest power mode.” (EX1007 5:3-31.) The available power modes are
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`stored in attribute memory 30 and may be represented by two-bit “power tuples.”
`
`(EX1007 5:12-15.)
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`In operation, the host can selectively place the storage device in a power
`
`mode supported by the device. The storage device starts up in a default mode, and
`
`in one embodiment it “always powers up in the lowest power mode.” (EX1007
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`5:26-31, 6:48-51.) The storage device is configured such that the host can read its
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`attribute memory and select any of the four available power modes. (EX1007 5:15-
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`21.) The host then writes its power-mode selection into, e.g., configuration options
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`register 33. (EX1007 5:19-26.) Based on the host’s selection, the storage device
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`then configures, e.g., its clock frequency and/or data-access bandwidth. (EX1007
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`5:41-6:15.) For example, the four power modes correspond to 16MHz, 8MHz,
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`4MHz, and 1MHz, respectively. (EX1007 5:50-60.) Garner further explains that
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`clock frequency and data-access bandwidth affects how much power is expended.
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`-15-
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`Petition for IPR of U.S. Patent No. RE45,542
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`(EX1007 5:46-50, 5:66-6:3.)
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`B. Overview of Toombs (U.S. Patent No. 6,279,114)
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`Toombs discloses a MultiMediaCard flash memory device capable of
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`operating in a voltage range selected by a host. (EX1008 1:51-56, 16:21-25.) The
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`invention addresses the problem of voltage compatibility between one or more
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`memory cards and the host to which they are connected. (EX1008 1:51-56.)
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`An embodiment of a MultiMediaCard is shown in Figure 14:
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`-16-
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`Petition for IPR of U.S. Patent No. RE45,542
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`The MultiMediaCard is designed to connect a host device through its connector
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`pins. (EX1008 Fig. 1; EX1002 ¶182.) Figure 14 shows several connector pins on
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`the top edge of the MultiMediaCard, including a power supply pins (e.g., VDD and
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`VPP) and communication pins (e.g., CMD and DAT). (See EX1008 7:32-44; see
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`also EX1002 ¶182.) Figure 14 further shows that CMD and DAT signals are
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`passed from the Interface Driver to the MMC Interface Controller for processing.
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`(Id.) As shown, the Controller has exclusive access to the registers, which means
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`the host cannot read/write to the registers directly. (Id.)
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`Toombs discloses a MultiMediaCard capable of negotiating an operating
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`voltage with a host. (EX1008 15:22-24, 16:21-25.) The MultiMediaCard stores its
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`operating voltage range (including “minimum and maximum operating values”) in
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`its OCR register. (EX1008 15:27-38, 15:66-16:9, Fig. 15.) During voltage
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`negotiation with the host, the host queries the MultiMediaCard for its operating
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`voltage range by sending a command. (EX1008 15:42-16:20, Fig. 38A.) “After a
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`common operating voltage is determined by the host, the host sends the determined
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`VDD voltage window as an operand of the command SEND_OP_COND (CMD1).
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`In response to this command, each of the active cards will define its OCR register
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`value according to this voltage.” (EX1008 16:21-25.)
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`VII. CLAIM CONSTRUCTION
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`Pursuant to § 42.100(b), a claim in an unexpired patent shall be given its
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`-17-
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`Petition for IPR of U.S. Patent No. RE45,542
`
`
`broadest reasonable interpretation (“BRI”) in light of the specification in which it
`
`appears. Because the ’542 Patent will not expire during the pendency of these
`
`proceedings, the Board should apply the BRI standard in its review. For terms not
`
`specifically listed and construed below, Petitioner interprets them for purposes of
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`this review in accordance with their plain and ordinary meaning. Petitioner
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`reserves the right to seek a different claim construction in litigation.
`
`A.
`
` “peripheral device”
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`The term “peripheral device” appears in Claims 28-33 and 37-40. The
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`specification of the ’542 Patent discloses that a peripheral device can be connected
`
`to an electronic device (e.g., laptops) and “expand the properties of the electronic
`
`device and to produce auxiliary functions.” (EX1001 1:44-53; see also EX1002
`
`¶136.) The disclosed examples of peripheral devices include internal devices (e.g.,
`
`memory cards and PCMCIA cards) and external devices (e.g., cameras). (EX1001
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`1:47-60, 4:20-28, 9:55-61; see also EX1002 ¶¶137-8.) Further, the recited
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`“peripheral device” should at least be broad enough to cover memory cards, as
`
`recited in dependent Claims 32 (“the peripheral device is a memory card”) and 39
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`(“the memory card is a MultiMediaCard”). (See also EX1002 ¶135.) Accordingly,
`
`a POSITA would understand the term “peripheral device” to mean “an internal or
`
`external device capable of expanding the properties of or produce auxiliary
`
`functions for a connected electronic device.” (EX1002 ¶139.)
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`-18-
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`

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`Petition for IPR of U.S. Patent No. RE45,542
`
`
`B.
`
` “default value”
`
`The term “default value” appears in Claims 28, 29, 37 and 40. Claim 28
`
`recites in relevant part: (1) “a memory storing a default value ... for power
`
`consumption of the peripheral device” and (2) “a maximum power consumption of
`
`the peripheral device is set at a startup stage to said default value.” Accordingly,
`
`the “default value” is at least a power consumption value to which the “maximum
`
`power consumption” is set. (See EX1002 ¶141.)
`
`In addition, the ordinary meaning of “default” is “an adopted preselected
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`option when no alternative has been specified,” which is consistent with the term’s
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`usage in the specification. (EX1002 ¶142.) The specification states that during
`
`initialization of the peripheral device, “the power consumption of the peripheral
`
`device 2 is set to a default value which ... is a power consumption value according
`
`to the first maximum limit.” (EX1001 5:25–31.) This initialization corresponds to
`
`the claimed “startup stage.” (EX1002 ¶142.) Further, the specification states that
`
`unless the host subsequently selects a different value, the corresponding power
`
`consumption configurations need not be adjusted “because this value is the default
`
`value.” (See EX1001 6:59-62.) This implies that the default value is preselected to
`
`be set as the peripheral device’s “maximum power consumption.” (EX1002 ¶142.)
`
`The specification and claims do not specify or restrict the “default value”
`
`and “limiting value” to any particular type of measurement. Both values are “for
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`-19-
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`Petition for IPR of U.S. Patent No. RE45,542
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`power consumption of the peripheral device.” (EX1001 cl. 28; see also cls. 33, 37.)
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`However, there is no requirement that the power consumption value be, e.g., a
`
`specific clock frequency or any measure of power consumption (e.g., Watt-Hours).
`
`(EX1002 ¶80.) The specification and claims only state that the clock can be
`
`adjusted to a frequency that corresponds to the power consumption value,
`
`maximum limit, or other similar terms. (See, e.g., EX1001 5:32-34, 6:21-25,
`
`14:18-22, cl. 31.) The exact nature of the “power consumption value” is not
`
`specified. Thus, under a broadest reasonable construction, the “default value”
`
`should not be limited to any particular type of measurement.
`
`Accordingly, a POSITA would have understood “default value” to mean “a
`
`preselected power consumption value
`
`to which
`
`the
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`‘maximum power
`
`consumption’ of the peripheral device is set when no alternative has been
`
`specified.” (EX1002 ¶143.)
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`C.
`
`“limiting value”
`
`The term “limiting value” appears in Claims 28, 29, 33, and 40. Claim 28
`
`recites in relevant part: (1) “a memory storing a ... limiting value for power
`
`consumption of the peripheral device”; (2) “said limiting value ... is defined for the
`
`power consumption of the peripheral device”; and (3) “setting the maximum power
`
`consumption of the peripheral device to a value which is in a range from said
`
`default value to said limiting value, said range including said default value and said
`
`-20-
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`

`

`Petition for IPR of U.S. Patent No. RE45,542
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`limiting value.” Accordingly, the “limiting value” is at least a power consumption
`
`value to which the “maximum power consumption” can be set. (See EX1002
`
`¶145.)
`
`The term “limiting value” does not appear in the specification, but the
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`prosecution history of the ’542 shows that it evolved from “second maximum
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`value.” (See EX1004 pp.