`APPLICATION ·
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`60/014,954
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`FILING DATE CLASS
`04/05/96
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`
`EXAM1NeR
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`~ JAEKY~~ MOON, MINNEAPOLIS, MN; BARRETT J. BRICKNER, MINNEAPm.rs, MN.
`
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`.JOHI\J F THUENTE
`;·ATTEPGON AND KEOUGH
`:. ;; 0 (: F(r,h:r:, TOliJER
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`.,_,,/-~'
`MT~NEAPOL[S MN 55402-1314
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`FIL;'.\iO Fe.E
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`:1i:i.OO .. O I 17f:7n0:1.-·Ub
`
`MI\J
`
`9
`
`METHOD AND APPARATUS FOR IMPLEMENTING MAXIMUM TRANSITION RUN CODES
`
`U.S, DEPT. OF COMMJ PAT. & TM-PT0-436L {Rev.1
`
`Fom, PT0-1625
`/) ,,
`(Rev. 5/95
`. ,<~"'
`✓
`
`(FACE)
`
`UMN_0000020
`
`UMN EXHIBIT 2021
`LSI Corp. et al. v. Regents of Univ. of Minn.
`IPR2017-01068
`
`
`Page 1 of 41
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`____ 12. - - - - - - - - -
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`- - - - - ' - - ' 11. ================== -----
`____ 14. ___ _____:_ ___ - -
`____ 1 s. -----'-__ .:.__ __
`____ 15. - - - - - (cid:173)
`~ - - -1 7 . - - - - - -
`_ ___ 1 s. - - - - - - - - , - - - - -~ - - - - -
`____ 19. - - - - - -
`____ 2 o. - - -~ - -
`____ 21. - - - - - - -
`____ 22. - - - - - -
`__ :____23 _ - - - - - - -
`~ - - - 24. - - - - - -~ - -
`- - -~ 25.
`- - - - - -
`____ 27. _____ __:,_
`- - - - ' - - 26. __ __ _:__ __ ~_ - - - - -
`- - - - 28 . -----=-----
`____ 30. ___ _:,__ __
`- - - - 29 . - - - - - -
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`- - - - -
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`- - - - 32 . - - - - - - -~ - - - - - -
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`(FRONT)
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`UMN_0000021
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`04/05/96
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`JAEKYUN MOON, MINNEAPOLIS, MN; BARRETT J, BRICKNER, MINNEAPOLIS, MN,
`
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`METHOD AND APPARATUS FOR IMPLEMENTING MAXIMUM TRANSITION RUN CODES
`
`This ls to certify that annexed hereto is a true copy from the records of the United States
`Patent and Trademark Office of the application which is identified above.
`By oillharity of lho
`COMMISSIONER OF PATENTS AND TRADEMARKS
`
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`
`UMN_0000023
`
`
`Page 4 of 41
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`
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`PATENT APPLICATION SERXArhio014954
`
`U.S. DEPARTMENT OF COMl'.ERCE
`PATENT AND TRADEMARK OFFICE
`FEE RECORD SHEET
`
`PT0-1556
`(S/87)
`
`UMN_0000024
`
`
`Page 5 of 41
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`
`
`Patterson & Keough, P.A.
`Attorney Docket No.: 1787.01-US-01
`
`METHOD AND APPARATUS FOR IMPLEMENTING
`MAXIMUM TRANSITION RUN CODES
`
`Field of the Invention
`The present invention relates in general to digital storage systems. More
`specifically, this invention deals with an improved coding method and apparatus
`for use in data recovery channels utilizing sequence detection methods.
`
`5
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`1 0
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`1 5
`
`Background of the Invention
`Magnetic recording systems represent an increasing fraction of the total
`volume of magnetic storage devices. Accordingly, there is an ever increasing
`demand for greater densities in these devices. A wide variety of detection and
`equalization methods have been proposed to address this need. Large code storage
`at optimal capacity is one of the ways to meet this demand.
`The use of Runlength limited (RLL) codes in magnetic recording is well
`lmown. These codes impose a (d,k) constraint on the recorded data sequence. In
`reference to the non-return-to-zero (NRZ) sequence, d + 1 is the minim um number
`of consecutive like symbols and k+l is the maximum number of consecutive like
`symbols. The d constraint is used to increase the minimum physical spacing
`between transitions. The k constraint guarantees that a change in the readback
`waveform will occur at regular intervals for the purpose of synchronizing a phase
`locked loop to the data. With the NRZ recording format, where the binary "1"
`represents a positive level in the magnetization waveform the binary "O" a negative
`level in the same waveform, (d+1) is-the minimum number of consecutive like
`symbols and (k+ 1) is the maximum number of com;e..utive like symbols in the
`binary sequence. With the Non-Return-to-Zero-Inversion (NRZI) recording format,
`3 0 where a magnetic transition is represented by "l" and no transition by "O", d and k
`are the minimum and maximum numbers of consecutive "O"s between any two
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`Page 6 of 41
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`''l''s, respectively. See P.H. Siegel, "Recording codes for digital magnetic storage,"
`IEEE Transactions on Magnetics, vol. MAG-21, no. 5, pp. 1344 - 1349, Sept. 1985. The
`d constraint is used to increase the minimum physical spacing between transitions.
`The k constraint guarantees that a change in the readback waveform will occur at
`regular intervals for the purpose of synchronizing a phase locked loop to the data.
`A (1,7) code is a common example of an RLL code. See M. Cohn, G.V. Jacoby, and A.
`Bates III, "Data encoding method and system employing two-thirds code rates with
`full word lookahead," U.S. Patent 4,337,458, 1982. Also popular is the (0,4/ 4) code,
`where d=O and k=4 both for the data sequence and for the sequence that results if
`every other symbol is considered. See J.S. Eggenberger and A. M. Patel, "Method and
`apparatus for implementing optimal PRML codes," U.S. Patent 4,707,681, 1987. In
`optical data storage, a special"type of RLL con~traint is applied to guarantee the
`minimum size of the written mark on the medium. See R. Karabed and P.H.
`Siegel, "Even mark modulation for optical recording," International Conference on
`15 Communications, June 1989. While (d,k) coding has many useful properties, the
`required code rate, given by the number of data bits per channel bit, is typically low,
`forcing the cha1u,el to operate at a considerably higher speed than the actual data
`rate. On the other hand, (0,4/ 4) or more generally (0,G/I) coding offers a much
`higher rate, but does not provide any coding gain. Also, (O,G/I) codes clre designed
`specifically for interleaved systems such as class IV partial response (PR4) systems,
`and are not suitable for other detectors such as extended class IV partial response
`(EPR4) systems and fixed-delay tree search (FDTS) systems.
`
`2 0
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`25
`
`Summary of the Invention
`The present invention relates to a coding techniqt1e to improve data
`storage devices such as magnetic computer disk drives and professional and
`consumer tape recorders. The present coding scheme, as referred to herein, as the
`maximum transition-run (MTR) code eliminates certain error-prone binary data
`patterns from an allowable set of input data patterns that are to be recorded in the
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`UMN_0000026
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`Page 7 of 41
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`storage medium. As a consequence, the final bit error rate, the most important
`performance measure of any digital recorder, is improved significantly when the
`original data bits are reproduced. This improvement in the bit error rate can also be
`traded for an increase in storage density if the error rate performance of the recorder
`is already satisfactory. See B. J. Bl'ickner and J. Moon, "Coding for increased distance
`with a d=O FDTS/DF detector," Seagate Internal Report, May 1995; also presented at
`the Annual Meeting of the National Storage Industry Consortiwn, Monterey, CA,
`June 1995, which paper is incorporated herein by reference. J. Moon and B. J.
`Brickner, "Maximum transition run codes for data storage systems," a Supplemental
`1 0 Disclosure submitted herewith and duly incorporated herein by reference.
`More specifically, the MTR code imposes a limit on the maximum
`number of consecutive transitions that can occur in the written magnetization
`pattern in magnetic recording. Findings under the present invention indicate that
`the performance improvement is most significant when the maximum number of
`consecutive transitions is limited to two. The MTR code with a constraint length of
`2 will allow "dibit" transitions in the magnetization pattern, but will not permit
`"tribit'' or longer runs of consecutive transitions. Unless indicated otherwise, the
`disclosure of the MTR code relating to the present invention will be focused on the
`constraint length of two. When the MTR coding scheme is combined with a certain
`class of sequence detectors, to recover written data in high density recording, the bit(cid:173)
`error-rate (BER) performance is improved significantly over existing code/ detector
`combinations such as (0,G/1) coded/partial response maximum likelihood (PRML)
`and (1,7) RLL code/peak detector combinations. Computer implemented
`simulations show large performance advantages of the MTR code combined with
`high order PRML systems and fixed d_elay tree search with decision feedback
`(FDTS/DF} systems the existing code/detector combinations. According to the NRZI
`format, the present code constraint is equivalent to limiting the maximum
`runlength of ones (l's). To facilitate timing recovery, the usual maximum
`runlength constraint i:; also imposed on the zeros (O's).
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`Page 8 of 41
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`4
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`Brief Description of the Drawings
`Fig. 1 shows pairs of write patterns causing most errors h1 sequence detection at high
`user densities.
`Fig. 2 is a state diagram for the MTR code with 7c =6.
`Fig. 3 is a table showing capacities for the MTR code with different k constraints.
`Fig. 4 is a table showmg code parameters for various MTR block codes.
`Fig. 5 shows a mappmg of datawords to codewords for the rate 4/5 lv'ITR code with
`k=8.
`Fig. 6a shows an encoder logic implementation for the rate 4/5 MTR code.
`Fig. 6b shows a decoder logic implementation for the rate 4/5 MTR code.
`Fig. 7 shows a decimal representation of valid codewords for the 8/10 MTR block
`code with k=6.
`
`Fig. Sa illustrates a modified FDTS detection for 1:=2.
`
`Fig. 8b illustrates a modified FDTS detection for -.=3.
`Fig. 9 shows a decimal representation of codewords corresponding to different
`values of C for the 8/12 DC-free MTR code.
`Fig. 10 lists code parameters for various DC-free MTR block codes.
`
`Detailed Description of the MTR Codes
`Investigation of high density error patterns in FDTS/DF detection reveals
`that errors arise mostly due to the detector's inability to distinguish the minimum
`distance transition patterns, both pairs of which are shown in Fig. 1. These two pairs
`correspond to an NRZ mput error pattern of ek = ± (2 - 2 2), assuming input data take
`on +l's and -l's. The present approach is to remove data patterns allowing this type
`of error pattern through codmg. The potential improvement in the FDTS detection
`performance using this approach can be estimated by computmg the increase in the
`minimum distance between two divergmg lookahead tree paths after removh1g the
`paths that allow the ±[2 - 2 2) error events. A simple minimum distance analysis for
`
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`Page 9 of 41
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`PRML systems reveals that this is also a critical error pattern in high order PRML
`systems such as E2PR4ML. Note that the (1,k ) RLL code eliminates all four
`transition patterns shown in Fig. 1, but the rate penalty is typically too large to see
`
`any coding gain unless the user density is very high. The idea of MTR coding is to
`eliminate all sequences with three or more consecutive transitions, but allow the
`dibit pattern in the recorded sequence. Thus, with MTR coding, the two dominant
`error events will still be prevented as with (1,k ) coding, but the required code rate is
`much better than that of the typical (1,/c ) RLL code.
`
`Fig. 2 shows the sta_te diagram of the MTR code based on the NRZI
`recording convention, where 1 and O represent the presence and absence,
`respectively, of a magnetic transition. Also included is the usual k -constraint for
`timing recovery. The capacity of the code can be obtained by finding the largest
`eigenvalue of the adjacency matrix for the given state diagram. The capacities for
`different k constraints are given in Fig. 3.
`While state-dependent encoders and sliding block decoders can be
`designed for the MTR constraint, we observe that simple fixed-length block codes
`can be realized with good rates and reasonable le values. A computer search is
`utilized to find the 2m n -bit codewords required to implement a rate min block
`code. First, all binary words that contain the NRZI string of "111" or more thank
`consecutive NRZI "O"s are removed from the list of 2111 n -bit binary words. Then, in
`order to meet the MTR constraint at the codeword boundaries, words that start or
`end with a "11" string are removed. Also, the k constraint is satisfied at the
`boundary by removing the words with k1+1 leading O's or kz+l trailing O's where
`k1+k2=k. Fig. 4 shows code parameters for representative block codes obtained
`through computer search for various combinations of n and k. The efficiency was
`found by dividing the code rate min by the capacity computed for the given value
`of k and the MTR constraint.
`As an example of a MTR block code, the rate 4/5, MTR=2;k=8 block code is
`given in Fig. 5. The pairing of user data blocks and codewords were chosen so that
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`Page 10 of 41
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`the second bit in the codeword corresponds to the second bit in the user data. Many
`other pairings are possible; the one chosen is reasonable, but not necessarily optimal
`in terms of minimizing the logic implementation. Note that the k=8 constraint
`comes into effect when the codewords 10000 00001 occur in sequence. If the user
`data and codeword pairs are represented by
`
`X3X2x1xo H y4y3y2y1,
`then the equations for the encoder are:
`
`yo= xox1+xox2.\:3+xox2x3
`
`Y1 =xux1x2+X7XjX3+XiY2X3
`yz= Xz
`y F Y1x3+ xox2x3
`
`y4= XoX-1X-2X3+XoX1+X1X2X3
`The corresponding decoder is
`xo= Yo+yz Y4
`x1= Yo+yo y4+y2 Y1
`X2= Y2
`X3= y3+y1 V2 y4+y1 y2 Y4
`
`Two-level NAND logic implementations of the above equations are
`shown in Fig. 6a and Fig. 6b, respectively. These logic rules are representative of
`those that could be developed for any of the MTR codes using inclustry standard
`design packages. Fig. 7 shows a qecimal representation of 282 valid codewords to
`implement an 8/10 MTR block code. Extra codewords can be used as alternates.
`
`Modified Detection and Distance Gain
`To realize the coding gain at the detector output, the detector has to be
`modified. In the case of PRML systems, this amounts to removing those states that
`correspond to the illegal data patterns from the trellis diagram. For the FDTS/DF
`detector, the code-violating lookahead paths must be prevented from being chose as
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`the most-likely path, a technique similar to the one used in the (1,7) coded FDTS/DF
`
`channel. To illustrate the idea, consider Fig. 8 that shows a ,::;;;3 lookahead tree
`
`utilized in FDTS/DF detection. The shaded paths in the tree correspond to the input
`
`data patterns with three consecutive transitions, and, thus, should be considered
`
`5
`
`illegal. For the -r=2 tree shown in Fig. Sb, the past decision must be used to
`
`determine an illegal path, which is either the third path or the sixth path, as
`indicated by the marked paths. The complexity in the signal space formulation of
`the FDTS/DF detector is also reduced greatly with the MTR code. See, for example,
`B. J. Brickner and J. Moon, "A high dimensional signal space implementation of
`FDTS/DF," presented at Intermag '96, Seattle, Washington, April 1996. For a more
`detailed desoiption of FDTS/DF detection, see J. Moon and L. R. Carley, "Apparatus
`and method for fixed delay tree search," U.S. Patent 5,136,593, 1992.
`
`With this modification in FDTS/DF detection, the squared minimum
`Euclidean distance between any two diverging paths, denoted by /J min, is given by
`1 + fr2+ f 22+ ... +f 12 for,: greater than or equal to 1, where fk represents the equalized
`dibit response (at the output of the forward equalizer). For example, the effective
`
`SNR gain of the t==2 FDTS/DF over the DFE, assuming the same MTR code, is given
`
`by 10 log 10(1+h2+f22) dB.
`The distance gain with MTR coding is also significant for high order
`PRML systems such as E2PR4. When the critical NRZ error pattern is ±(2 - 2 2), the
`minimum distance for the E2PR4 response (120 - 2 - 11 is 6✓2. With MTR coding,
`the worst case error pattern becomes a single bit error pattern of ±{2}, and the
`corresponding channel output distance is :;imply the square root of the energy in the
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`equalized dibit response, or 2✓ 10. 'This increase in the minimum distance is
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`2 5
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`equivalent to an SNR gain of 4.47 dB. If the code rate penalty is small, the overall
`
`coding gain would be significant.
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`DC-Free MTR Codes
`Other useful constraints can be imposed on the MTR code at the expense
`of lowering the code rate. There exist storage systems where the recorded square
`waveform can not have a DC component. In such applications, a DC-free constraint
`is necessary on the written data. The MTR code can be designed to have a DC-free
`property. A DC-free constraint is satisfied by bounding the running digital sum
`(RDS) of the binary sequence. The RDS at a given time is defined to be the excess
`number of l's over O's in the bina1y sequence up to that time, assuming the NRZ
`recording format is used (a negative RDS means there has been more O's than l's).
`1 0 The following method can be used to design DC-free MTR codes. Assume an NRZ
`recording format. Starting from a list of 2n n-bit binary words, first remove all
`binary words that contain either "0101" or "1010" as well as any words that contain
`mote than (k+ 1) consecutive like symbols. Then, to satisfy the MTR constraint at
`the codeword boundaries, remove all words that start with "01" or "10" and remove
`all words that end with "101" or "010". The same effect can be achieved by
`removing all words that end with 01 or 10 as well as the words that start with "101"
`or "010". The k constraint can be salisfied al boundaries by eliminaling all words
`that either start with k1 consecutive like symbols or end with k2 consecutive like
`symbols, where k1 and k2 are preselected numbers such that k1 +k2=k+ 1. The
`remaining codewords in the list now satisfy the MTR constraint as well as the k
`Investigation of the remaining codewords reveals that for every
`constraint.
`codeword, there exists another codeword which is a bit-by-bit complement of the
`first codeword. Let us now define charge C to be the number of l's in the codeword
`minus the number of O's in the same codeword. If a codeword has a charge C, its bit-
`2 5 wise complement will have a charge-~. This property is used to design a DC-free
`code. The final list of the valid DC-free MTR codewords is obtained by further
`removing either all the words with negative charges or all the words with positive
`charges. The final list now contains codewords with either zero-charge or charges
`with the same polarity. When a dataword is mapped to a zero-charge codeword, the
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`Page 13 of 41
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`mapping is either the codeword itself or its bit-wise complement is released by the
`encoder output, depending of the RDS value at the end of the last codeword. By
`choosing the codeword with a polarity which is opposite to the polarity of the
`present RDS value, the RDS is always kept bounded. Fig. 9 shows a decimal
`representation of codewords corresponding to different values of C for the 8/12 DC(cid:173)
`free MTR code. the k-constraint in this case is equal to 8. Fig. 10 lists the code
`parameters for various DC-free MTR block codes obtained using the method
`described above.
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`Page 14 of 41
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`What is claimed is:
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`2
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`6
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`7
`8
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`9
`1 0
`11
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`A storage system implemented device for encoding m -bit binary dataword
`1.
`into 11 -bit bi11ary codewords, where m and n are positive mtegers and 11
`is greater
`
`than m , the device comprising:
`
`receiver means for receiving the datawords;
`
`encoder means for producing sequences of the codewords;
`recorder means for recording said sequences of the codewords on
`
`the storage system; and
`said encoder means having a communication with said receiver
`
`and said recorder.
`
`The device according to claim 1 wherein, said encoder means produces
`2.
`said sequences of the codewords such that no more than j consecutive transitions
`2
`and no more than k consecutive transitions are generated in the recorded square
`3
`4 waveform where j and k are integers at least greater than 2.
`
`3.
`
`The device according to claim 1 wherein, said sequences of codewords
`
`relate to a limitation on j consecutive ones and k consecutive zeros when the
`recording is based on a Kon-Return-to-Zero-Inversion (NRZI) format.
`
`The device accordini:; to clann 1 wherein, said sequences of codewords
`4.
`relate to a limitation of no more than j consecutive transitions from one to zero and
`
`from zero to one and no more than (k+ 1) consecutive zeros and (k+ 1) consecutive
`ones when the recording is based on a non-return-to-zero (NRZ) format.
`
`2
`3
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`2
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`3
`4
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`Page 15 of 41
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`11
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`. 1
`2
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`3
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`4
`5
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`6
`7
`8
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`9
`1 0
`1 1
`1 2
`1 3
`1 4
`1 5
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`2
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`3
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`2
`
`1
`2
`3
`4
`
`5
`
`The device according to claim 1 wherein the encoder means produces a
`5.
`codeword in response to the datawords, said codeword relating sequentially to
`individual datawords, in said datawords and further includes the device
`
`implemented steps of:
`setting a word-by-word mapping of 2m m -bit datawords to 2m n -
`
`bit codewords; and
`preselecting valid codewords including the steps of:
`removing binary words which comprise more than j
`
`consecutive ones or more than k consecutive zeros from a list of 2" n -bit
`
`possible binary words to form a list;
`
`removing words having one of a start and end with two
`
`consecutive ones from said list;
`removing words having one of a start with k1 consecutive zeros
`and end with k2 consecutive zeros; and
`selecting said valid codewords residing in said list.
`
`The device according to claim 5 wherein, said step of removing words
`6.
`having one of a start with k1 and end with k2 consecutive zeros further includes
`selecting k1 and k2 integers related in a manner to yield k1+k2=k.
`
`The device according to claim 1 wherein the sequences of codewords
`7.
`complies with a DC-free constraint.
`
`8.
`
`The device according to claim S wherein, said step of preselecting valid
`
`codewords further includes the steps of:
`removing all binary words that contain one of 0101 and 1010 and
`
`any words containing more than (k+l) consecutive like symbols from a
`
`list of 211 n -bit binary words;
`
`UMN_0000035
`
`
`Page 16 of 41
`
`
`
`1 2
`
`6
`
`.7
`8
`
`9
`
`1 0
`1 1
`
`removing all words that start with one of 01 and 10 including
`those that end with one of 1010 and 010;
`removing all words that start with one of k1 consecutive like
`symbols and end with k2 consecutive like symbols; and
`removing one of all codewords with negative charges and all
`
`codewords with positive charges.
`
`The device according to claim 8 wherein, said step of removing all binary
`9.
`2 words is replaced by a step of removing all words which end with one of 01 or 10
`and words which start with one of 101 and 010.
`3
`
`A storage system implemented device for encoding m -bit binary
`10.
`datawords into n -bit binary codewords, where m and n are positive integers and n
`
`is greater than m , the device comprising:
`receiving means for receiving data words;
`decoder means for decoding the n -bit codewords into m -bit
`datawords;
`encoder means for producing sequences of the codewords;
`recorder means for recording said sequences of the codewords on
`
`the storage system;
`said decoder means, said encoder means and said recorder
`means being in communication with said receiver means.
`
`A device implemented method for encoding m -bit binary data words into
`11.
`n -bit codewords, where m and n are positive integers and n is greater than 111
`to
`thereby store data in a storage system, comprising the device implemented steps of:
`receiving the datawords;
`producing sequences of codewords; and
`recording said sequences or codewords on to the storage system.
`
`2
`
`3
`4
`
`5
`6
`7
`
`8
`
`9
`1 0
`1 1
`
`2
`3
`4
`5
`6
`
`UMN_0000036
`
`
`Page 17 of 41
`
`
`
`1 3
`
`The device implemented method of claim·u wherein, said steps of
`12.
`producing sequences of codewords includes generating no more than j consecutive
`2
`transitions and no more than k consecutive non-transitions in a recorded square
`3
`4 waveform where j and k are integers greater than 2.
`
`The device implemented method of claim 11 wherein, the sequences of
`13.
`codewords have no more than j consecutive one and no more than k consecutive
`zeros when used in conjunction. with an NRZI recording format.
`
`I
`
`2
`
`3
`
`The device implemented method of claim 11 wherein, one of a fixed tree
`14.
`search detector and a signal space formulation is used to prime lookahead paths
`2
`3 which violate MTR code constraints in a decision tree.
`
`UMN_0000037
`
`
`Page 18 of 41
`
`
`
`03--28-1996 16:36
`
`612' '":4583
`
`u of 11 Elec Er
`
`P. l2
`
`bO 014954
`
`Fig. l
`
`Fig.2
`
`UMN_0000038
`
`
`Page 19 of 41
`
`
`
`03-2e-1sss 1s,3s
`
`U oi H Ell'O Er
`
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`
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`
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`
`Fig.3
`
`UMN_0000039
`
`
`Page 20 of 41
`
`
`
`03-28-1996 16:36
`
`6121>~54583
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`L----------------