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`Paper No. ________
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________
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`KYOCERA INTERNATIONAL, INC.
`Petitioner
`v.
`
`BLUE SPIKE, LLC
`Patent Owner
`
`Patent No. 8,930,719
`Issue Date: January 6, 2015
`Title: DATA PROTECTION METHOD AND DEVICE
`_______________
`
`Inter Partes Review No. IPR2017-01109
`____________________________________________________________
`
`
`
`PETITION FOR INTER PARTES REVIEW
`UNDER 35 U.S.C. §§ 311-319 AND 37 C.F.R. § 42.100 ET. SEQ.
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
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`TABLE OF CONTENTS
`
`
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`
`
`NOTICE OF LEAD AND BACKUP COUNSEL ..................................................... 1 
`NOTICE OF EACH REAL-PARTY-IN-INTEREST ............................................... 1 
`NOTICE OF RELATED MATTERS ........................................................................ 1 
`NOTICE OF SERVICE INFORMATION ................................................................ 2 
`GROUNDS FOR STANDING .................................................................................. 2 
`STATEMENT OF MATERIAL FACTS .................................................................. 2 
`STATEMENT OF PRECISE RELIEF REQUESTED .............................................. 4 
`THRESHOLD REQUIREMENT FOR INTER PARTES REVIEW ......................... 4 
`STATEMENT OF REASONS FOR RELIEF REQUESTED ................................... 4 
`I. 
`Introduction to the Technology of the ’719 Patent .......................................... 4 
`II. 
`Representative Independent Claim 1 of the ’719 Patent ................................. 5 
`III.  Construction of the Claims .............................................................................. 6 
`i. 
`“code resources” (Claims 1, 10, 21, 22, 29, 36).................................... 7 
`IV.  Claim-By-Claim Explanation of Grounds for Unpatentability ....................... 7 
`Ground 1.  Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent are
`unpatentable as anticipated by U.S. Patent No. 5,745,569 (Ex.
`1003). ..................................................................................................... 8 
`The ’569 Patent Is Prior Art Under 35 U.S.C. § 102(e) ........................ 8 
`The ’569 Patent Discloses All Elements of Independent Claims 1, 10,
`21, 22, 29, and 36 .................................................................................. 8 
`Ground 2.  Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent are
`unpatentable as obvious over the combination of Forrest (Ex.
`1005) and the ’569 Patent (Ex. 1003). ................................................ 19 
`
`i. 
`ii. 
`
`i
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
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`
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`i. 
`ii. 
`
`
`Forrest Is Prior Art Under 35 U.S.C. § 102(a) .................................... 19 
`The Combination of Forrest and the ’569 Patent Discloses All
`Elements of Independent Claims 1, 10, 21, 22, 29, and 36 ................ 20 
`CONCLUSION ........................................................................................................ 48 
`
`
`
`ii
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
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`EXHIBIT LIST
`
`
`
`Exhibit
`Ex. #
`1001 U.S. Patent No. 8,930,719 (“the ’719 Patent”)
`1002
`Image File Wrapper for ’719 Patent
`1003 U.S. Patent No. 5,745,569 (“the ’569 Patent”)
`1004
`Intentionally Omitted
`Stephanie Forrest et al., Building Diverse Computer Systems, The Sixth
`1005
`Workshop on Hot Topics in Operating Systems, 67-71 (IEEE, May
`1997) (“Forrest”)
`1006 Claim Construction Order entered May 16, 2016 in an unrelated
`litigation, Blue Spike, LLC v. Huawei Techs. Co. et al., Case No. 6:13-
`cv-00679, Dkt. 194.
`1007 Curriculum Vitae of Rafail Ostrovsky, Ph.D.
`1008
`Expert Declaration of Rafail Ostrovsky, Ph.D.
`
`
`
`iii
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`
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
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`
`NOTICE OF LEAD AND BACKUP COUNSEL
`
`Lead Counsel: Nicola A. Pisano (Reg. No. 34,408) Tel: 858.847.6877
`
`Backup Counsel: Scott R. Kaspar (Reg. No. 54,583) Tel: 312.832.5113
`
`Address: Foley & Lardner LLP, 3579 Valley Centre Drive, San Diego, CA 92130
`
`Fax: 858.792.6773
`
`NOTICE OF EACH REAL-PARTY-IN-INTEREST
`
`The real-parties-in-interest are: Kyocera International, Inc. is a wholly-owned
`
`subsidiary of Kyocera Corporation, a publicly-traded Japanese entity.
`
`NOTICE OF RELATED MATTERS
`
`Patent Owner asserted the ’719 Patent against Kyocera International, Inc. in the
`
`Eastern District of Texas in a case captioned Blue Spike, LLC v. Archos, Inc. et al.,
`
`Case No. 6:16-cv-1142, filed September 2, 2016. Patent Owner voluntarily dismissed
`
`the action on February 9, 2017. On February 10, 2017, Kyocera International, Inc.
`
`filed a complaint for declaratory judgment of non-infringement only in the Southern
`
`District of California in a case captioned Kyocera International, Inc. v. Blue Spike,
`
`LLC, Case No. 3:17-cv-0262-BTM-JMA, which is now pending before the Hon. Barry
`
`T. Moskowitz.
`
`1
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`
`NOTICE OF SERVICE INFORMATION
`
`
`
`
`
`Please address all correspondence to the lead counsel at the address above.
`
`Petitioner consents to electronic service at: npisano@foley.com; and
`
`skaspar@foley.com.
`
`GROUNDS FOR STANDING
`Petitioner hereby certifies that the patent for which review is sought is available for
`
`inter partes review and that the Petitioner is not barred or estopped from requesting an
`
`inter partes review challenging the patent claims on the grounds identified in the
`
`Petition.
`
`STATEMENT OF MATERIAL FACTS
`
`The ’719 Patent matured from U.S. Patent Application No. 13/556,420, filed July
`
`24, 2012, and issued January 6, 2015. The ’719 Patent is a continuation of U.S. Patent
`
`Application No. 11/895,388, filed August 24, 2007, which is a division of U.S. Patent
`
`Application No. 10/602,777, filed June 25, 2003, now U.S. Patent No. 7,664,263,
`
`which is a continuation of U.S. Patent Application No. 09/046,627, filed March 24,
`
`1998, now U.S. Patent No. 6,598,162. The ’719 Patent claims priority to March 24,
`
`1998, which is the earliest effective filing date.
`
`The named inventor of the ’719 Patent, Scott Moskowitz, also is a co-inventor with
`
`Marc Cooperman of U.S. Patent No. 5,745,569 (“the ’569 Patent,” Ex. 1003). The
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`’569 Patent matured from U.S. Patent Serial No. 587,943, filed January 17, 1996, and
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`2
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`issued April 28, 1998. The ’569 Patent expired January 17, 2016. The ’719 Patent
`
`
`
`
`
`does not include any claim of priority to the’569 Patent.
`
`The ’719 Patent purports to cover a computing device that knows about all the
`
`software code resources in memory and then intentionally shuffles aspects of the code
`
`randomly so that a hacker attempting to take a snap-shot of the code would be foiled
`
`by the shuffled code aspects. See Ex. 1001, 15:36-53.
`
`The ’719 Patent describes the problem of skilled computer hackers, who often copy
`
`code by capturing aspects of the code while it is in the computer’s memory. Ex. 1001,
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`2:20-37; 15:7-22; 15:54-60.
`
`The ’719 Patent purports to solve the “snapshot” counterfeiting attacks by
`
`randomly shuffling aspects of the code in the memory, such that any “snapshot” taken
`
`by a would-be hacker is meaningless. Ex. 1001, 14:57-64. Claim 1, in particular, is
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`directed to guard against hacking by shuffling code resources within the memory in
`
`order to safeguard the code.
`
`The ’719 Patent includes in its specification a single paragraph describing the
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`purported invention of Claim 1. See Ex. 1001, 15:36-53. This paragraph also appears
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`word for word in the specification of the ’569 Patent. See Ex. 1003, 8:1-19.
`
`The purported invention claimed in the ’719 Patent, which uses software to shuffle
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`code in the memory to defeat copying attacks, was well known in the art many years
`
`before the priority date of the ’719 Patent.
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`3
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`
`STATEMENT OF PRECISE RELIEF REQUESTED
`Petitioner respectfully requests the Board initiate an inter partes review and cancel
`
`
`
`
`
`Independent Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent as unpatentable
`
`pursuant to 35 U.S.C. § 311(b) based on the two grounds of unpatentability discussed
`
`in detail herein.
`
`THRESHOLD REQUIREMENT FOR INTER PARTES REVIEW
`A petition for inter partes review must demonstrate “a reasonable likelihood that
`
`the petitioner would prevail with respect to at least one of the claims challenged in the
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`petition.” (35 U.S.C. § 314(a).) The Petition meets this threshold. All elements of
`
`Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent are taught in the prior art as
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`explained below in the proposed grounds of unpatentability. Also, where the claims
`
`are rendered obvious by combinations of prior art, the reasons to combine are
`
`established under 35 U.S.C. § 103(a).
`
`STATEMENT OF REASONS FOR RELIEF REQUESTED
`
`I.
`
`Introduction to the Technology of the ’719 Patent
`
`The ’719 Patent is directed to a computing device that knows about all the software
`
`code resources in memory and then intentionally shuffles aspects of the code randomly
`
`so that a would-be hacker attempting to take a snap-shot of the code would be foiled
`
`by the shuffled code aspects. See Ex. 1001, 15:36-53.
`
`The ’719 Patent teaches two steps to preventing would-be hackers from accessing
`
`the computer code. First, certain parts of the code, called “code resources,” are
`4
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`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
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`identified and hidden, which the ’719 Patent admits are well known in the art. Ex.
`
`
`
`
`
`1001, 12:25-29; 12:55-60. Second, the code resources are randomly shuffled, to
`
`render any capturing of the code to be meaningless. Ex. 1001, 14:57-64.
`
`The purported invention of the ’719 Patent was well known in the prior art many
`
`years before the priority date of the ’719 Patent. In particular, the claimed methods
`
`were disclosed at least by the prior art identified in this Petition, as detailed in the
`
`claim charts that follow.
`
`II. Representative Independent Claim 1 of the ’719 Patent
`Independent claims 1, 10, 21, 22, 29, and 36 are directed to computing devices that
`
`know about all the software code resources in memory and then intentionally shuffle
`
`aspects of the code randomly so that a would-be hacker attempting to take a snapshot
`
`of the code would be foiled by the shuffled code aspects. See Ex. 1001, 15:36-53.
`
`Representative Independent Claim 1 states and requires:
`
`A computing device for running application software,
`
`comprising:
`
`memory designed to store data in non transitory form;
`
`an operating system;
`
`wherein said memory stores an application software;
`
`5
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
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`
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`wherein said application software comprises (1) a
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`memory scheduler code resource and (2) other code
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`resources;
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`wherein said application software is designed to call said
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`memory scheduler code resource;
`
`wherein said memory scheduler code resource, when
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`called, functions to shuffle said other code resources in said
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`memory; and
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`wherein said memory scheduler code resource is designed
`
`to modify a stack frame in said memory.
`
`III. Construction of the Claims
`A claim in inter partes review is given the “broadest reasonable construction in
`
`light of the specification.” (See 37 C.F.R. § 42.100(b).) For the purposes of this
`
`proceeding, claim terms are presumed to take on their broadest reasonable ordinary
`
`meaning. As stated in the case In re ICON Health and Fitness, Inc. at 496 F.3d 1374,
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`1379 (Fed. Cir. 2007): “the PTO must give claims their broadest reasonable
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`construction consistent with the specification. Therefore, we look to the specification
`
`to see if it provides a definition for claim terms, but otherwise apply a broad
`
`interpretation.” In addition to this presumption, Petitioner provides a more detailed
`
`explanation of the broadest reasonable meaning of certain claim terms.
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`6
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
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`“code resources” (Claims 1, 10, 21, 22, 29, 36)
`
`i.
`
`The specification defines “code resources” in terms of packaged, sub-objects:
`
`“sub-objects can be packaged into what are referred to as ‘code resources’ . . . .” Ex.
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`1001, 11:62-63. “Sub-objects,” as used in the ’569 patent, refer to discrete executable
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`segments of a program. Ex. 1003, 3:44-4:17. The specification further explains that
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`an application may be referred to as an “executable object code from the point of view
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`of the engineer.” Id., 3:44-47. The specification goes on to teach that “[a] collection
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`of smaller, atomic (or indivisible) chunks of object code typically comprise the
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`complete executable object code . . . [t]hose indivisible portions of object code
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`correspond with the programmers’ function or procedure implementations in higher
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`level languages.” Id., 3:47-53. These functions or procedures are compiled and make
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`up an executable object code (or a program). Id., 4:13-17. The object code or program
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`includes instructions executed by the CPU and data called by the instructions. Ex.
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`1008 at ¶ 39.
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`The court in the Huawei Litigation construed “code resources” to be “compiled
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`functions or procedures”. Ex. 1006, p.12. Accordingly, Petitioner requests that the
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`Board adopt the same construction in this proceeding.
`
`IV. Claim-By-Claim Explanation of Grounds for Unpatentability
`Unpatentability of Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent is set forth
`
`below and discussed in the accompanying expert declaration (Ex. 1008).
`
`7
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`Ground 1. Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent are unpatentable as
`anticipated by U.S. Patent No. 5,745,569 (Ex. 1003).
`
`
`
`
`
`Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent are unpatentable under 35 U.S.C.
`
`§ 102(e) as anticipated by U.S. Patent No. 5,745,569 to Scott Moskowitz et al.
`
`(“the ’569 Patent,” Ex. 1003).
`
`i.
`
`The ’569 Patent Is Prior Art Under 35 U.S.C. § 102(e)
`
`The application that matured into the ’569 Patent was filed on January 17, 1996.
`
`The ’569 Patent issued on April 28, 1998. Because the ’719 Patent does not include
`
`any claim of priority to the ’569 Patent, and the ’569 Patent lists an additional co-
`
`inventor, the ’569 Patent is a prior art patent under Section 102(e).
`
`ii.
`
`The ’569 Patent Discloses All Elements of Independent Claims 1, 10,
`21, 22, 29, and 36
`
`Independent claims 1, 10, 21, 22, 29, and 36 are directed to computing devices that
`
`know about all the software code resources in memory and then intentionally shuffles
`
`aspects of the code randomly so that a would-be hacker attempting to take a snapshot
`
`of the code would be foiled by the shuffled code aspects. See Ex. 1001, 15:36-53.
`
`In addressing the problem of unauthorized copying, the ’569 Patent describes a
`
`device running software having special code resources that intentionally shuffle
`
`aspects of the software code, as set forth in the specification:
`
`Under the present invention, the application contains a
`
`special code resource which knows about all the other code
`
`8
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`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
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`
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`resources in memory. During execution time, this special
`
`
`
`
`
`code resource, called a ‘memory scheduler’ can be called
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`periodically, or at random or pseudo random intervals, at
`
`which time it intentionally shuffles the other code resources
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`randomly in memory so that someone trying to analyze
`
`snapshots of memory at various intervals cannot be sure if
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`they are looking at the same code or organization from one
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`‘break’ to the next. This adds significant complexity to their
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`job. The scheduler also randomly relocates itself when it is
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`finished. In order to do this, the scheduler would have to
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`first copy itself to a new location, and then specifically
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`modify the program counter and stack frame, so that it could
`
`then jump into the new copy of the scheduler but return to
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`the correct calling frame. Finally, the scheduler would need
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`to maintain a list of all memory addresses which contain the
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`address of the scheduler and change them to reflect its new
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`location.
`
`Ex. 1003, 8:1-19. One of ordinary skill would understand that intentionally
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`shuffling code resources in accordance with the ’569 Patent would be useful for copy
`
`protecting, or guarding against unauthorized copying, as claimed by the ’719 Patent.
`
`9
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`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`Ex. 1008, ¶ 46.
`
`
`
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`
`
`Each of the elements of Claims 1, 10, 21, 22, 29, and 36 of the ’719 Patent is
`
`disclosed and described by the ’569 Patent, as shown with particularity as follows.
`
`The ’569 Patent (Ex. 1003)
`The ’569 Patent discloses a computing device for
`running software:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Exs. 1003, 7:1-3; 1008, p.17.
`The ’569 Patent discloses memory designed to
`store data in a non transitory form:
`“Once the code resources of a program are loaded
`into memory, they typically remain in a fixed
`position, unless the computer operating system
`finds it necessary to rearrange certain portions of
`memory during ‘system time,’ when the operating
`system code, not application code, is running. .”
`Exs. 1003, 7:30-34; 1008, p.17.
`The ’569 Patent discloses a computerized system
`having an operating system:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Exs. 1003, 7:1-3; 1008, p.17.
`The ’569 Patent discloses application software
`stored in memory:
`“Moreover, the present invention concerns itself
`with any application software that may be used in
`general computing devices, not chipsets that are
`used in addition to an underlying computer to
`perform encryption.”
`Exs. 1003, 7:59-62; 1008, p.17.
`The ’569 Patent discloses a memory scheduler
`code resource, among other code resources:
`“Under the present invention, the application
`
`10
`
`The ’719 Patent
`1. A computing device for
`running application software,
`comprising:
`
`(a) memory designed to store
`data in non transitory form;
`
`(b) an operating system;
`
`(c) wherein said memory stores
`an application software;
`
`(d) wherein said application
`software comprises (1) a
`memory scheduler code
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`The ’719 Patent
`resource and (2) other code
`resources;
`
`(e) wherein said application
`software is designed to call
`said memory scheduler code
`resource;
`
`(f) wherein said memory
`scheduler code resource,
`when called, functions to
`shuffle said other code
`resources in said memory;
`and
`
`(g) wherein said memory
`scheduler code resource is
`designed to modify a stack
`frame in said memory.
`
`
`
`
`
`
`
`The ’569 Patent (Ex. 1003)
`contains a special code resource which knows
`about all the other code resources in memory.
`During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory so that
`someone trying to analyze snapshots of memory at
`various intervals cannot be sure if they are looking
`at the same code or organization from one ‘break’
`to the next.”
`Exs. 1003, 8:1-10; 1008, p.17.
`The ’569 Patent discloses that the application calls
`the memory scheduler code resource:
`“Under the present invention, the application
`contains a special code resource which knows
`about all the other code resources in memory.
`During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals….”
`Exs. 1003, 8:1-5; 1008, p.18.
`The ’569 Patent discloses that the memory
`scheduler code resource shuffles code resources in
`the memory:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory...”
`Exs. 1003, 8:3-7; 1008, p.19.
`The ’569 Patent discloses that the memory
`scheduler modifies a stack frame in the memory to
`be able to identify the correct location of the
`shuffled code resources:
`“The scheduler also randomly relocates itself when
`it is finished. In order to do this, the scheduler
`would have to first copy itself to a new location,
`
`11
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`

`

`
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`
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`The ’569 Patent (Ex. 1003)
`and then specifically modify the program counter
`and stack frame, so that it could then jump into the
`new copy of the scheduler but return to the correct
`calling frame. Finally, the scheduler would need
`to maintain a list of all memory addresses which
`contain the address of the scheduler and change
`them to reflect its new location.”
`Exs. 1003, 8:11-19; 1008, p.19.
`
`The ’569 Patent discloses a system for running
`software:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Exs. 1003, 7:1-3; 1008, p.20.
`The ’569 Patent discloses memory designed to
`store data in a non transitory form:
`“Once the code resources of a program are loaded
`into memory, they typically remain in a fixed
`position, unless the computer operating system
`finds it necessary to rearrange certain portions of
`memory during ‘system time,’ when the operating
`system code, not application code, is running.”
`Exs. 1003, 7:30-34; 1008, p.21.
`The ’569 Patent discloses storing executable code
`resources in the memory:
`“Once the code resources of a program are loaded
`into memory, they typically remain in a fixed
`position, unless the computer operating system
`finds it necessary to rearrange certain portions of
`memory during ‘system time,’ when the operating
`system code, not application code, is running.
`Typically, this is done in low memory systems, to
`maintain optimal memory utilization.”
`Exs. 1003, 7:30-35; 1008, p.21.
`The ’569 Patent discloses a memory scheduler
`code resource, among other code resources:
`“During execution time, this special code resource,
`
`12
`
`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`The ’719 Patent
`
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`10. A system for executing
`application software code,
`comprising:
`
`(a) a memory designed to store
`data in non transitory form,
`and
`
`(b) storing executable code
`resources;
`
`(c) wherein said executable
`code resources comprise a
`memory scheduler and other
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`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`The ’719 Patent
`executable code resources;
`
`(d) wherein said memory
`scheduler is designed to
`shuffle said other executable
`code resources in said
`memory; and
`
`(e) wherein said memory
`scheduler is designed to
`modify a stack frame in said
`memory.
`
`
`21. A system comprising:
`(a) a processor; a memory
`designed to store data in non
`transitory form; wherein said
`processor is coupled to said
`memory;
`
`
`
`
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`The ’569 Patent (Ex. 1003)
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory so that
`someone trying to analyze snapshots of memory at
`various intervals cannot be sure if they are looking
`at the same code or organization from one ‘break’
`to the next.”
`Exs. 1003, 8:3-10; 1008, p.21.
`The ’569 Patent discloses that the memory
`scheduler code resource shuffles code resources in
`the memory:
`“Under the present invention, the application
`contains a special code resource which knows
`about all the other code resources in memory.
`During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals….”
`Exs. 1003, 8:1-5; 1008, p.22.
`The ’569 Patent discloses that the memory
`scheduler modifies a stack frame in the memory to
`identify the location of the shuffled code
`resources:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory…”
`Exs. 1003, 8:3-7; 1008, p.23.
`
`
`The ’569 Patent discloses a computerized system
`having an operating system:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Ex. 1003, 7:1-3.
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
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`
`The ’719 Patent
`
`(b) wherein said system is
`configured to load a program
`comprising code resources
`into said memory and to
`shuffle at least one code
`resource into a different
`location in said memory
`after said program has been
`loaded into said memory;
`and
`
`(c) wherein one of said code
`resources is designed to
`modify a stack frame in said
`memory.
`
`
`
`
`
`
`
`The ’569 Patent (Ex. 1003)
`
`
`The ’569 Patent discloses memory designed to
`store data in a non transitory form:
`“Once the code resources of a program are loaded
`into memory, they typically remain in a fixed
`position, unless the computer operating system
`finds it necessary to rearrange certain portions of
`memory during ‘system time,’ when the operating
`system code, not application code, is running.
`Typically, this is done in low memory systems, to
`maintain optimal memory utilization.”
`Exs. 1003, 7:30-35; 1008, p.24.
`The ’569 Patent discloses that the memory
`scheduler code resource shuffles code resources in
`the memory:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory so that
`someone trying to analyze snapshots of memory at
`various intervals cannot be sure if they are looking
`at the same code or organization from one ‘break’
`to the next.”
`Exs. 1003, 8:3-9; 1008, p.24.
`The ’569 Patent discloses that the memory
`scheduler modifies a stack frame in the memory to
`identify the location of the shuffled code
`resources:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals….The scheduler also randomly relocates
`itself when it is finished. In order to do this, the
`scheduler would have to first copy itself to a new
`location, and then specifically modify the program
`counter and stack frame, so that it could then jump
`into the new copy of the scheduler but return to the
`
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`The ’569 Patent (Ex. 1003)
`correct calling frame.”
`Exs. 1003, 8:3-16; 1008, p.25.
`
`
`The ’569 Patent discloses a computerized system
`having an operating system:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Ex. 1003, 7:1-3.
`
`The ’569 Patent further discloses memory
`designed to store data in a non transitory form:
`“Once the code resources of a program are loaded
`into memory, they typically remain in a fixed
`position, unless the computer operating system
`finds it necessary to rearrange certain portions of
`memory during ‘system time,’ when the operating
`system code, not application code, is running.
`Typically, this is done in low memory systems, to
`maintain optimal memory utilization.”
`Exs. 1003, 7:30-35; 1008, p.26.
`The ’569 Patent discloses that the memory
`scheduler code resource shuffles code resources in
`the memory:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory so that
`someone trying to analyze snapshots of memory at
`various intervals cannot be sure if they are looking
`at the same code or organization from one ‘break’
`to the next.”
`Exs. 1003, 8:3-9; 1008, p.26.
`The ’569 Patent discloses that the memory
`scheduler modifies a stack frame in the memory to
`identify the location of the shuffled code
`
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`The ’719 Patent
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`22. A system comprising:
`(a) a processor designed to
`process instructions; a
`memory designed to store
`data in non transitory form;
`wherein said processor is
`coupled to said memory;
`
`(b) wherein said system is
`configured to load an
`executable program
`comprising at least two code
`resources into said memory
`and to randomize the
`location of at least one of the
`at least two code resources in
`the said memory, using said
`processor; and
`
`(c) wherein one of the at least
`two code resources is
`designed to modify a stack
`
`
`
`

`

`
`
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`
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`The ’569 Patent (Ex. 1003)
`
`resources:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals…The scheduler also randomly relocates
`itself when it is finished. In order to do this, the
`scheduler would have to first copy itself to a new
`location, and then specifically modify the program
`counter and stack frame, so that it could then jump
`into the new copy of the scheduler but return to the
`correct calling frame.”
`Exs. 1003, 8:3-15; 1008, p.27.
`
`
`The ’569 Patent discloses a computerized system
`having an operating system and a memory:
`“A preferred embodiment would be implemented
`in an embedded system, with a minimal operating
`system and memory.”
`Exs. 1003, 7:1-3; 1008 at p.28.
`The ’569 Patent discloses that the memory
`scheduler code resource shuffles code resources in
`the memory:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`periodically, or at random or pseudo random
`intervals, at which time it intentionally shuffles the
`other code resources randomly in memory so that
`someone trying to analyze snapshots of memory at
`various intervals cannot be sure if they are looking
`at the same code or organization from one ‘break’
`to the next.”
`Exs. 1003, 8:3-9; 1008, p.29.
`The ’569 Patent discloses that the memory
`scheduler modifies a stack frame in the memory to
`identify the ocation of the shuffled code resources:
`“During execution time, this special code resource,
`called a ‘memory scheduler’ can be called
`
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`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`The ’719 Patent
`frame in said memory.
`
`
`29. A system comprising:
`(a) a processor; a memory
`coupled to said processor;
`wherein said memory is
`designed to store data in non
`transitory form;
`
`(b) wherein said system is
`configured to load a program
`comprising code resources
`into said memory and to
`shuffle at least a subset of
`said code resources into a
`different location in said
`memory after said program
`has been loaded into said
`memory; and
`
`(c) wherein one of said code
`resources is configured to
`modify a stack frame in said
`memory.
`
`
`
`

`

`Petition For Inter Partes Review
`U.S. Patent No. 8,930,719
`
`
`The ’719 Patent
`
`
`36. A system for protecting a
`software application, said
`software application
`comprising a plurality of
`executable code resources,
`said system comprising:
`(a) a processor; memory for
`storing data in non transitory
`form; wherein said processor
`is coupled to said memory
`for transmitting data there
`between; wherein, when
`executing said software
`application, said system is
`configured to store in said
`memory an original plurality
`of code resource addresses;
`(b) wherein, when executing
`said software application,
`said system is configured to
`store a plurality of
`executable code resources
`for executing said software
`application;
`
`
`
`
`
`
`
`The ’569 Patent (Ex. 1003)
`periodically, or at random or pseudo random
`intervals…The scheduler also randomly relocates
`itself when it is finished. In order to do this, the
`scheduler would have to first copy itself to a new
`location, and then specifically modify the program
`counter and stack frame, so that it could then jump
`into the new copy of the scheduler but return to the
`corr