United States Patent 9:
`3,801,747
`(11)
`[45] Apr. 2, 1974
`Queffeulou et al.
`
`[54] SPEECH DETECTOR FOR PCM-TASI
`SYSTEM
`
`Primary Examiner—Kathleen H. Claffy
`Assistant Examiner—David L. Stewart
`
`[76]
`
`Inventors: Jean-Yves Queffeulou, route de
`Ploubezre, Lannion; Gerard C.
`Vautrin, route de Kerbiriou,
`Perros-Guirec, both of France
`
`[22]
`
`Filed:
`
`Oct. 18, 1972
`
`[21] Appl. No.: 298,531
`
`[57]
`ABSTRACT
`Speech detector for a communication system transmit-
`ting and receiving pulse.code modulation PCM signals
`in time slots on a time division basis, which are con-
`nectable and disconnectable on a time assignment
`speech interpolation basis to and from trunks. The
`speech detector comprises meansfor forming with the
`digits of the PCM signals significant digits equal to the
`PCM signals digits or to selected combinations of
`these digits and defining transmission amplitude
`thresholds and reception amplitude thresholds. The
`transmission threshold which is selected depends on
`the reception amplitude threshold. Means are pro-
`vided for sequentially detecting in each time slot the
`selected significant digit of the transmitted PCM sig-
`References Cited
`nals and for deriving therefrom speech slot pulses and
`UNITED STATES PATENTS
`no-speechorsilent slot pulses. The speech slot pulses
`2,958,733
` Dickieson ........ 179/15 AS
`11/1960
`are counted during a first predetermined period and
`
`3,508,007
`4/1970 Goodall........
`ws 179/18 BC
`the silent slot pulses are counted during a second pre-
`
`3,706,091
`«+. 179/15 AS
`12/1972) May..........
`determined period. Control signals for the connection
`
`3,712,959
`« 179/15 AS
`Fariello.........
`1/1973
`and disconnection of the slots to and from the trunks
`3,649,766
`LaMarche.....
`« 179/15 AS
`3/1972
`
`are derived from the counts.
`
`3,644,680 2/1972=AMANO....... ce ceceeseceeseeseee 179/15 AS
`3 Claims, 3 Drawing Figures
`
`(30]
`
`Foreign Application Priority Data
`Oct. 19, 1071
`France ........secesccceseeeeee 71.37562
`
`[S52] U.S. Chacesessteeeeene 179/15 AS
`[S1]
`Int, Chic esecsessessseeseenee H04j 5/00
`[58] Field of Search.......... 179/15 AS, 18 BC, 1 CN
`
`[56]
`
`SWITCHING
`
`DECODER
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`
`FIN
`
`THRESHOLD
`SCTOR
`
`
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`DETECTOR
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`EXPANSER
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`MULTIPLEXER
`DEMUALTIALENER
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`CURRENT
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`DECOOER
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`THRESHAD
`SHETOR
`
`
`MULTIPLEXER
`
`SGMALUNG
`DEMMUTPLEXER
`
`_ GTL 1011
`IPR of U.S. Patent No. 7,916,845
`
`GTL 1011
`IPR of U.S. Patent No. 7,916,845
`
`

`

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`PATENTEDAPR 2 1974
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`3,801,747
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`ATENTEDAPR 2 1974
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`3,801,747
`
`30
`
`40
`
`1
`SPEECH DETECTOR FOR PCM-TASI SYSTEM
`
`2
`the coded groupsor ofparticular linear combinations
`of said digits by meansoflogic circuits,
`The present invention concerns a speech detectorfor
`To take the mean value of the analog signal in the
`a Time Assignment Speech Interpolation system in
`trunk,
`in particular if this analog Signal
`is a low-
`which.all the signals are expressed in PCM coded form
`frequency signal for which several consecutive coded
`and on time division basis. Such a transmission system
`samples have values close to each other, which exceed
`is called in the art a PCM-TASIsystem.
`threshold:
`the transmission threshold or does not, a number p of
`PCM-TASIsystems are known from the communica-
`the coded samples is compared with the threshold be-
`tion made by K. AMANO and C. OTA “Digital TASI
`fore deciding whethera signal does or does not repre-
`System in PCM transmission” at the Boulder Interna-
`sent an useful speech signal. This numberp is selected
`tional Communications Conference in June 1969,
`as a function of the components ofthe speech spectrum
`pages 34-23 to 34-28 of the proceedingsofthis confer-
`possessing the greatest energy, in such mannerthat the
`ence. In the system proposed. in.this paper the speech
`new frequency of the
`samples as regards. threshold
`detector operates on a time division basis in conjunc-
`comparison whichis equal to the recurrence frequency
`tion with speech detector memory. The numer of words
`divided by p should lie, with a Satisfactory degree of
`in the speech detector memory is equal to the number
`probability, among those of these components. For ex-
`of input trunks and each word has an appropriate num-
`ample, the frames of the multiplexer are of 125 jz s and
`ber of bits which are partitioned to represent active or
`the recurrence frequency of the slots is 8 kHz. If the
`pause status, to detect speech and to generate connec-
`codedsignalsin a given slot is compared with the trans-
`tion and disconnection signals. Further, the detector
`mission threshold eight consecutive time before decid-
`has two kindsofthreshold : oneis an amplitude thresh-
`ing that the result of the comparisonis valid, the deci-
`old and the other is a duration threshold. The speech
`sion frequency is 1 kHz.although the comparison fre-
`is detected wheneverthe difference between the num-
`quencyis 8 kHz.
`ber of samples above the amplitude threshold and the
`The secondpart or processorof the detector sequen-
`number of samples. below or equal to the amplitude
`tially processes the observations gleaned from the
`threshold reaches the value defined by the duration
`trunks whilst making allowance for the time constants
`threshold.
`enforced for a correct sensitisation of the circuits hav-
`This previously proposed system consists of two iden-
`ing the task of connecting and disconnecting the trunks
`tical items of apparatussituated at the endsofa bilat-
`to the slots. The processor has two periods: a complete
`eral multiplexing telephone connection. The part
`period which is the. time necessary for processing the
`scheduled for transmission is equipped with a speech
`threshold comparisonresults ofall the trunks and a uni-
`detector arranged for permanent sequential detection
`tary period which is the time necessary for processing
`on each of the input trunks and, when one of these
`the threshold comparison result of one trunk. The uni-
`trunks has been detected as being active, the logical
`tary period is divided into sub-unitary periods corre-
`part of the apparatus undertakes a free.
`line search
`sponding to an elementary step of process. For reasons
`whose addressis fed to the reception apparatus through
`which will appear later on, the sub-unitary period dura-
`a special line in such manneras to establish the normal
`tion is equal to the slot duration and the numberof sub-
`connection. Once thecircuit has become passive,
`unitary. periodsin a unitary period is equalto the num-
`which ‘circumstance is established by means of the
`ber p abovereferred to.
`speech detector, the connectionis interrupted by anal-
`For example, the complete period is I ms, the unitary
`ogous operations.
`period is 3.9 41s and the slot duration and the sub-
`The organisation of the connection networks is mod-
`unitary period are 0.49 ys.
`elled on that of the time-sharing telephone switching
`The detector is arranged for controlling the circuits
`networks, whereasthat ofthe transmission lines is iden-
`connecting the trunks to and disconnecting the trunks
`tical to that of the digital transmission lines.
`from the slots in three cases only:
`.
`Twopartsa logic part and a processorcanbeidenti-
`1. Trunk passing from the passive state to the active
`fied in the speech detector, whose construction is the
`state. This passage is confirmed only if,
`in the
`object of the invention, in which the first part com-
`course of N complete periods during each of which
`prises as many logic devices as there are time slots in
`the signal in a given slot has been comparedp times
`the multiplexer and the input concentrator. These logic
`to the transmission threshold, at least one signal
`devices have the function of correspondingly determin-
`among the p signals has exceeded the selected
`ing the slots in whichthe slot signal exceeds or. is ex-
`transmission threshold, this event followinga silent
`ceeded by a transmission threshold which can take sev-
`period having the duration T. This last conditionis
`eral values while taking into accountthe signal routed
`introduced to prevent connection of an already
`through the return time slot. This signal consists of
`connected circuit. In the present case the detector
`noise or speech whoselevel exceeds or is exceeded by
`delivers.a connection order called first transfer Sig-
`a reception threshold. The threshold in.
`the. transmis-
`nal having the circuit for controlling connection
`sion slot depends ofthe relative level of the signal. or
`and disconnections as its destination.
`the noise in the reception slot-with respect to the recep-
`2. Holding a trunk activated since a time T in this
`tion threshold. These precautions prevent the sole pres-
`state for a period T’.
`ence ofsignals induced in the transmission slot by the
`3. Passage ofa trunk from theactivestate to the pas-
`signals. or the noise existing in the reception slot from
`sive state whenasilent period is detected threin
`establishing connections.
`and lasts longer than T. The detector reports this
`65
`The speechsignals being PCM coded groups, the de-
`to the connection and disconnection control circuit
`tection of their amplitude with respect to a threshold is
`and initiates.a disconnection procedure in which a
`obtained by the detection of particular code digits in
`distinction must be drawn between two cases:
`
`45
`
`50
`
`55
`
`60
`
`

`

`3
`the disconnection may be immediate if the trunk
`engagement had been shorter than T,
`and the disconnection is delayed until the instant
`T’ if T had been exceeded by this engagement.
`
`3,801,747
`
`4
`
`R. = (1 + Log aS)S /B=(1 +Log aS)S , when B = ]
`
`20
`
`demonstrating that Rc is considerably greater than R,
`given that S is greater than I/a .
`The conditions 2 and 3 rise to a second transfer sig-
`The invention will now be described in more detail,
`nal, characterised in that the trunk has been keptin the
`by way of example only, with reference to the accom-
`same state for the period T atleast.
`panying drawings, wherein
`:
`The state of a given trunk is comparedtoits state
`FIG.1 is an illustration in the form of a block dia-
`during the preceding complete period. If the twostates
`gram of a PCM TASIswitching system in which a
`are the same,a pulse is applied toafirst counter and
`speech detector accordingto the invention is inserted;
`if the twostates are different the first counteris reset.
`Whenthefirst counter counts 4, the samestate has
`lasted 4 ms anda flipflop called A,in the followingis
`positioned on 1 or 0 according to whether the state
`which haslasted 4 msis speech or pause. Thestate of
`flipflop A, at the preceding complete period is main-
`tainedin a flipflop called A,‘ in the following.If the two
`states of A, and A,’ are different a second counteris
`reset andif the two states are the same each overflow
`pulse of the first counter (i.e. each time the first
`counter counts 8) triggers the second counter. When
`the second .counter reaches the count 32, a flipflop
`called B in the followed is triggered. Thus, when a
`speech period of 4 ms (Ai = 1; A,’ = 0) follows a si-
`lence period of 32 ms (B = 1) a connection order or
`first transfer signal is sent to the connection and discon-
`nection control circuit. Control circuits for connecting
`or disconnecting trunks to the slots of a time division
`switching system are knownin the art and do not per-
`tain to the invention. In fact the state of flipflop B is
`transferred at the following complete period to a mate
`flipflop B’ and it is the conditions
`
`FIG.2 is a detailed logical diagram of the speech de-
`tector; and
`FIG. 3 is the diagram of the program of the speech
`detector shownin FIG. 2.
`Terminal equipments of a TASI switching system
`have beenillustrated in FIG. 1. The two terminal equip-
`ments are indentical and their componentcircuits are
`marked by the like reference numerals, the numerals
`being primed for one set and not for the other. Conse-
`quently, one of the equipments only will be described
`in detail.
`A plurality of subscriber’s lines or of trunks 1 (it will
`be assumed hereinafter that they are trunks), of which
`there
`are 256,
`is connected to a multiplexer-
`demultiplexer 2 which may equally play the part of a
`concentrator when the numberof timeslots of the
`multiplexer-demultiplexer is smaller than the number
`of trunks. The analog ‘signals emanating from the
`trunks are smpled as PAMsignals in the multiplexer 2
`and the samples are converted into coded pulse groups,
`that is to say into PCM signals, in the coder 3 before
`Ai=1;A,’=0;B’=1
`:
`being compressedin the compressor 23 andfinally. fed
`which givesrise to the first transfer signal.
`to the switching network 5 through the group transmit
`highway 13. In the other direction of transmission, the
`The comparison between the PCM signals and the
`thresholds are made by detecting the binary value 1 or
`compressed PCMsignals emerging from thé switching
`0 of selected digits or of selected digit linear combina-
`network 5 through the group receive highway 14 are
`tions of the PCM signals after compression. For exam-
`expanded in the expandor'24, decoded into PAM sig-
`ple assuming that the PCM signals comprise a sign bit
`nals in the decoder 24 and converted into analog sig-
`and six bits ABCXYZ. the comparison with the first
`nals in the demultiplexer 2.
`threshold depends on the value of binary digit A and
`The grouptransmit highway 13 and the groupreceive
`the comparison with the second threshold depends on
`highway 14 are correspondingly connécted to the
`the valueof binary digit (A+B+C). The selection be-
`speech detector 10 andto a threshold selector 31. The
`tween the first or second threshold depends ofthe bi-
`speech detector is connected to a control circuit 9
`nary digit (A+BC) of the return PCM Signal.
`whichis itself connected to the switching network 5. At
`As already said the PCMsignals are logarithmically
`the output side of connection network 5 is situated a
`compressed signals and the thresholds correspond to
`group transmit highway 26 as well as a’ group receive
`digit or digit combinationsofthe compressed PCMsig-
`highway 27 which are correspondingly connected to a
`nals. This improves the signal to noise ratio of the com-
`“PCM to analog” decoder 6 and to an “analog to’
`_ Munication.
`PCM”coder7, themselves connected to a carrier cur-
`This advantage may be demonstrated by. considering
`rent apparatus 8.
`a sample having an amplitude § which is small com-
`The carrier current apparatus 8 is connected to the
`pared to the acceptable maximum signal, whereon is.
`Carrier current apparatus 8’ by means of two-wire or
`superimposed a noise of r.m.s. amplitude B which de-
`four-wire transmission lines 16 of which there are a
`fines a ratio R= S/B characterising the quality of the
`smaller number than the number of subscriber’s lines
`communication.
`or of trunks 1 or 1’. For example, there are 256 trunks
`If the transmission device has a compression coder
`1 and 128 transmission lines 16. A signalling transmit-
`60
`employing a logarithmic compression characteristic,
`ter circuit 12 andasignalling receiver circuit 15 con-
`the new amplitude after coding will amountto:
`nect the controlcircuit 9 to the carrier current appara-
`S.= b(1 + Log aS) a and b being constants derived
`tus
`8.
`These
`circuits
`comprise modulators-
`from the compression rule. The slope of the com-
`demodulators and are arranged to transmit and receive
`Pression curve at the abscissa determined by the
`orders for connection and disconnection and the num-
`sample amplitude is AS,/AS = b/S . The r.m.s. noise
`bers of the lines to be connected or disconnected to
`amplitude changes to B, = B b/S and after com-
`and from the far end of the transmission line as it is
`pression, the signal/noise ratio amounts to
`known in conventional TASI systems.
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`65
`
`

`

`3,801,747
`
`6
`Mauduechis particularly appropriate. The expanded
`signal is given by the formula:
`S [10 ]48°-¢ x g XYZ
`
`(2)
`
`5
`The first transfer signal and the second transfer sig-
`nal, which have beendisclosed in the introductory part,
`are fed to the control circuit 9 by the speech detectors
`10 and 10’.
`In FIG. 1, it has been assumedthat the transmissions
`between the two equipments 8 and 8’ were performed
`by meansof analog carrier current signals. The trans-
`mission may however equally take placein the form of
`PCM signals, either on a time-sharing line 17, or by
`meansof a multi-accesssatellite. The coders 7 and 7 "
`the decoders 6 and 6’ and the carrier current devices
`8 and 8’ may be omittedin this case.
`It is assumed that the multiplexers-demultiplexers 2
`and 2’ do not perform a concentrating action,i.e. that
`there are as manyslots in the multiplex highways as
`trunks connected to the multiplexers-demultiplexers.
`The time is divided into complete processing periods of
`1 ms and each processing period of | ms is divided into
`256 unitary processing periods of ims/256 = 3.9 BS
`which are designated 6, to Qg55.
`The time division frame has a 125 Hs duration andit
`is divided into 256 slots of 125 ps/256=0.49 ws, which
`are designated 7, to 7255. Each unitary processing period
`6 contains eight processing sub-unitary periods ft, — ty.
`
`A processing sub-unitary period t, (k=0,1,... 7)
`of unitary period Os9m4; (m = 1, 2,...7 and j=0, 1,
`... 31) coincides in time with slot 7(¢=1,2,...255)
`wherei is given by the relation
`
`i=8jt+k
`The following table shows the time division rule as
`regards processing (6 and ¢) and as regards multiplex-
`ing. (7).
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`in which [10] is the number 2 in binary notation and
`q the Boolean quantity (A + B +C) which,as will be
`seen later on,
`is used as a level for one of the two
`thresholds.
`.
`Referring now to FIG.2, the coder-compressor 3-23
`and the expander-decoder 4-24 are once more shown
`in this figure. The digits SABCXYZ are available in
`parallel on the seven output
`leads of the coder-
`compresor 3-23 and they are applied to circuit 21. Cir-
`cuit 21 is a separator circuit which connect the second
`outputlead ofcircuit 3-23 conveying digit A to output
`terminal 210 and. the second, third and fourth outut
`leads conveying respectively the digits A, B, C to an
`OR-gate not shown whose output is connectedto ter-
`minal 211. Therefore, one finds the digit A on output
`210 and the digit (A+B+C) on output 211.
`Thepulses or digits A (low sensitivity) and the pulses
`or digits (A+B+C) (high sensitivity) are fed in parallel
`to a plurality of 256 temporary memorycircuits. Each
`ofthese circuits comprises an AND-gate 101 having an
`input connected to terminal 210, an OR-gate 102 hav-
`ing its two inputs respectively connected to the output
`of AND-gate 101, and to terminal 211, an AND-gate
`103 having one input connected to the output of OR-
`gate 102 anda flipflop 104 (A,‘) connected to the out-
`put of AND-gate 103. The second input of AND-gate
`101 is connected to the threshold selector 31 and the
`second input of AND-gate 103 is connected to a time
`base generator not represented from whichit receives
`selected pulses among the timing pulses defining the
`slots. In a whole period of 1 ms, there.are eight frames
`of 125 ws. The timing pulses relative to a given slot, say
`%
`tk
`the slot No. 0 are applied to AND gate 103 at seven
`To
`Le
`Ty
`h
`consecutive times, namely at the times 6 to, O52 to, Ogg
`1
`ty
`to, O96 fo, Oi128 to, P1609 to ANC Oy99 fy. At said times, the digits
`To48
`fo
`T2a9
`th
`of the coded samples, A or (A + B+ C) according to
`Tess
`ty
`whetherthe high sensitivity mode or the low sensitivity
`To
`fo
`1%
`uh
`modeis in operation, is entered into flipflop A,. At the
`T
`ty
`time 4224 fo, flipflop A,° is reset. In order to make quite
`Toan
`to
`clear the operation of the temporary memorycircuits,
`Teaa
`os
`Tass
`ty
`another example is given concerning slot N%. Flipflop
`To
`fo
`A,! will be operated (either to receive a one or a zero)
`1
`Ny
`7
`ca
`at the seven times Oz2m+; tx Where m = 0; 1,...6,jis
`Tean
`fg
`m=7 F=31 Boss
`the integer part of the quotient of the division ofi by
`Toan
`i
`Toss
`fy
`8 andkis the remainder ofthe division. Flipflop A,' will
`
`be reset at the time Osom4; t, With m=7 .
`Example:
`
`Processing
`sub-unitaryperiod
`
`Slot
`
`/
`
`Processing
`unitary period
`
`P5045
`m=0 f=0 6,
`
`m=0 f=31 65,
`
`m= FRO Oa.
`
`m=t j=31 Og,
`
`m=T F=0 B24
`
`As usual, the signals picked-up from the slots for pro-
`cessing by the speech detectorare logarithmically com-
`pressed in compressor 23 which may be written down
`in binary notation
`
`i= 133 =8/+k=8x 1645
`
`whence:
`
`SABCXYZ
`
`J=16k=5
`Theflipflop will be operated at the times Or6ts, Oasts,
`Peotss Pri2ts, Or44ts, Orzets ANd Oaggts and it will be reset at
`the time Beats.
`,
`.
`in whichSis a sign bit and ABCXYZ are codebits hav-
`The information temporarily stored in the 256 flip-
`ing respectively binary weights from five to zero. Al-
`flops 104 (A,') is transferred sequentially into the sin-
`though the logarithmic compressor type. is immaterial
`gle flipflop 105 (A,). through AND-gates 106 and 107.
`as far as the invention is concerned, the compressor
`The transfer recurrence period is | ms for a given flip-
`specified in the U.S. Patent application Ser. No.
`flop A,'. The transfer time for the flipflop A,! is taken
`855,881 filed Sept. 8, 1969 in the name of Robert
`between the operating times and the reset time of the
`
`60
`
`qr)
`
`65
`
`

`

`7
`period, say at half-distance. For example A,° is oper-
`ated for the last time at :92to and reset at Ono4t,; its con-
`tents can be transferred into A, at the time 6208 to; Ag'*?
`is operated for the last time at 208 ts and reset at O24
`ts; its contents will be transferred into A, at the time
`A224 to (and not O04 ts). With this timing the processing
`_ of each slot begins at the sub-unitary period ¢, of each
`unitary period 0, to 6e55.
`:
`The sensitivity changeover
`is performed by the
`threshold selector 31 which, through the OR 312 and
`AND 313 gates, receives the incoming compressed _
`codedsignal groups. More precisely the separatorcir-
`cuit 24 separates the digits A, B, and C of the received
`PCM signals and makes the product BC in an AND-
`gate which it contains and which is not represented.
`OR-gate 312 makes the sum A+BC. The gates 313 are
`unblocked synchronously with the gates 103 and yield
`access to flipflops such as 314 which unblock the co-
`ordinated gates 101 of the incoming trunk. Thesignal
`issuing from the ANDgate 313 operates the zero reset
`of the counter 315 counting up to 255 and whichis
`stepswitched by means of timing pulses at
`the fre-
`quencyofthe timeslots. At the end of one millisecond,
`the “overflow” signal of the counter operates the zero
`reset of the flipflop 315 if no other signal has been re-
`ceived on the return line during this interval.
`The active state detected on the trunks 1 and which
`has been transferred to the flipflop 105 of the process-
`ing unit 100 can be stored in the store 108 through
`gates openattime fs. The store 108 comprises as many
`words
`as
`there
`are
`circuits
`connected to the
`multiplexer-demultiplexeror, in case of concentration,
`as many words as
`there are time slots
`in this
`multiplexer-demultiplexer.
`The state of the flipflop A, whichis operatedat ¢, is
`transferred into theflipflop A,’ through the store 108.
`This state is first transferred from flipflop A, to store
`108 through one of the AND-gates giving access to
`store 108 and which are triggered at tg and then from
`store 108to flipflop A,’ through oneofthe AND-gates
`controlling the outputs from store 108 and which are
`‘triggered at time ¢t,. This transfer is made to ascertain
`whetherthe actuelstate of a given trunk as marked by.
`the state of A,is identical or dissimilar to the state of
`the same trunk during the preceding processing unitary
`period.as markedbythestate of A,’. In the case of dis-
`similarity, the counter 110 comprising three flipflops
`1101, 1102, 1103 is reset to zero at t, by the compara-
`tor 111 formed by the AND-gates 1111 and 1112 and
`by the OR-gates 1113. It results that in the case ofdis-
`similarity of the state of one trunk during respectively
`two successive processing unitary periods, the counting
`of the complete periods of 1 ms is re-initiated. The
`counter 110 is set at ¢, by the store 108 in which the
`contents of A, have been stored infg;it is contingently
`erased during ¢, in the case of dissimilarity of the states
`of the same slot during two successive processing uni-
`tary periods, contingently increased by one unit during
`ts in the case of similarity and systematically cancelled
`during fy.
`It has been observedthat, every millisecond,the state
`of the 256 slots is transferred from 104 (information
`A.') to 105 (information A,) during ¢,, then stored in
`the store 108 during ¢, for transfer during ¢, into the
`flipflop 109 (information A,'). The consecutive states
`which are identical are counted in the counter 110 until
`they reach the value N.
`
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`The overflows of the counter 110 are counted ina
`counter 130 formedbythe flipflops 1301, 1302, 1303.
`.The number N which can be smaller that the capacity
`of counter 110 is decoded by the AND-gates 115 and
`116 and the OR-gate 117. By connecting to these
`AND-gates selected output terminals of one or more of
`the flipflops of the counter 110, these AND-gatesare
`unblockedatthe instant in which the counter reaches
`one of two predetermined counts: The selection be-
`tween these two counts is performed by the flipflop
`118 which controls the unblocking of one of the AND
`gates 115 and 116 whilst blocking the other.
`The AND gates 120 and 121 and the OR gate 122
`serve the purpose of transferring the state of the flip-
`flop 109 (A,') into the flipflop 125 (information A,) at
`the time ¢, after. the counter 110 has counted N milli-
`seconds. This transfer means that during N millisec-
`onds,the slot No.i has remained in the same state,irre-
`spective of this very state one or zero. Thestate of the
`flipflop 125 (A,) is stored in the store 108 during t, for
`transfer during 1, into the flipflop 129 (A,’).
`The information A, present during the slot 7;
`evidences the retention of one and the samestate on
`the trunk i during N milliseconds.If A, = 0, the trunk
`has remained silent for N milliseconds; if A , = 1, the
`trunk has been active or speechifier for N milliseconds.
`
`Thestate of the flipflop 125 (A,) inscribed during ¢,
`is compared to the state of. the flipflop 129 (A,') in-
`scribed during t, by transfer from the store 108 in order
`to detect any change in the state of the trunk after
`being keptin a given state during a predetermined pe-
`riod. This comparison is performed by the comparator
`131 formed by the AND-gates 1311 and 1312 and by
`the OR-gate 1313, and. identical to the comparator
`111. In the case of dissimilarity, the counter 130 com-
`prising three flipflops 1301,1302,1303 is reset to zero
`during t, and, in this case, the flipflop 135 (B) remains:
`in the zerostate.
`;
`The eventual overflow signal of the counter 130 is
`fed through the AND-gates 126,127,128 and the OR-
`gate 133 to the flipflop 135 (B) to bring the sameinto
`State one. The state of the flipflop 135 (B) is memo-
`rised at the instant fg in store 108 and transferred at the
`instant t, of the following processing unitary period into
`the flipflop 139 (B’)
`:
`:
`The states Ay,Ai’, B, B’, as well as their comple-
`ments Aj, Ay’.B,B’, are the data needed for the genera-
`tion ofthe first transfer signal and the second transfer
`signal and for their transmission to the control circuit
`9.
`
`Whena speech period of N milliseconds (A, = 1; Ay’
`= 0) followsa silent period of.a duration at least equal
`to T(B’ = 1), the coincidence ofthe states
`
`A,, Ay’ and B’
`occurs during rt, in the AND gate 134. This condition
`producesthe first transfer signal whichis transmitted to
`the control circuit 9. At this instant, the control circuit
`should naturally be ready to receive this transfer signal.
`Tothis end, the control cicruit 9 has an access sytem
`which does not form part of the invention and has not
`beenillustrated.
`The counter 130 totals the overflows of the counter
`110 until it undergoes an overflow in its turn, thereby
`indicating that the trunk N*i had remained in the same
`state for T milliseconds and the stepping of the counter
`
`

`

`3,801,747
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`is inhibited by a signal fed to the AND gate 137, which
`in dependence on the second level digits; means for
`receives the same from the inverter 138 and from the
`counting with a given recurrence period thefirst slot
`OR gate 133. As has been perceived,
`this overflow
`pulses duringafirst predetermined period andthe sec-
`causes the flipflop 135(B) to be placed in thestate 1
`ond slot pulses during a second predetermined period;
`and,
`in these circumstances, delivers the command
`and meansfor deriving from said counting means con-
`BB’= | through the AND gate 136, which has beenre-
`trol signals for the connection and disconnection of
`ferred to as the second transfer signal and which is
`said slots to and from said trunks.
`transmitted to the control circuit 9.
`,
`2. A speech detector for a communication system
`The control circuit 9 incorporates all the elements
`transmitting and receiving pulse code modulation PCM
`required for generationofall the connection and dis-
`Signals in time-slots on a time-division basis, said slots
`connection commands. Thereception in control circuit
`being connectable and disconnectable on a time assign-
`9 ofthe first transfer signalis interpreted by this control
`ment speech interpolation basis to and from trunks,
`circuit as a demand for connection of a circuit whose
`comprising meansfor forming selected combinations of
`address is supplied at the sametime.
`binary digits of the transmitted and of the received
`The reception of the second transfer signal informs
`PCMsignals comprising respectively first level digits
`the control circuit 9 that no changein state has oc-
`characterizing the level of the transmitted PCM signals
`curred in the circuit since T = 32 milliseconds and that
`and secondlevel digits characterizing the level of said
`it is apt to envisage two eventualities:
`received PCM signals; meansfor sequentially detecting
`a. — A, = I the circuit has been engaged for T milli-
`said selectedfirst level digits during a particular time
`slot of a recurrent sequenceoftime slots and in a pre-
`seconds,the hold period is changed to T’ millisec-
`onds;
`.
`determined number of occurences of said particular
`time slot said threshold; means for determining the
`b. — A, — 0 the circuit has been disengaged for T mil-
`level of said threshold in dependence on the second
`liseconds, the control circuit may perform its dis-
`level digits; means for counting with a given recurrence
`connection either immediately, if there is no free
`period thefirst slot pulses during a first predetermined
`slot and a circuit requires a connection, or upon
`period and the secondslot pulses during a second pre-
`termination of T’—T or say 224 milliseconds, if the
`determined period; and means for deriving from said
`hold period has raised to T'=256 milliseconds.
`counting meanscontrolsignals for the connection and
`The course followed by the operations performed by
`disconnection of said slots to and from said trunks.
`the detector during the processing of a slot No.i is
`3. A speech detector for a communication system
`shown in FIG. 3. This diagram summarises the matter
`transmitting and receiving pulse code modulation PCM
`apparent from the foregoing and specifies the condi-
`signals in time slots on a time-division basis, said slots
`tions which could be fulfilled by the different functions
`being connectable and disconnectable on a time assign-
`in the course of a cycle of 1 ms. This cycle begins with
`ment speech. interpolation basis to and from trunks,
`t,, by a transfer of the information A,’ into A,; this is
`comprising a time base generator defining timeslots,
`followed by the transfer into the processing unit 100 of
`on the one handfor a unitary period for processing the
`the word storedin the store 108, during ¢,; by the com-
`comparison ofa signallevel in a trunk of the communi-
`parison between A,’ and A,during ¢2; by the taking into
`cation system with a predetermined threshold level,
`account of the contents of the counters 110 and 130
`and on the other hand for a complete period or com-
`and of the function B, during tg; and finally by the trans-
`plete cycle for sequentially processing the