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` Paper No. 27
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`Entered: January 3, 2019
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`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SPTS TECHNOLOGIES LTD.,
`Petitioner,
`
`v.
`
`PLASMA-THERM LLC,
`Patent Owner.
`____________
`
`Case IPR2017-01674
`Patent 8,802,545 B2
`____________
`
`
`
`Before WILLIAM V. SAINDON, ELIZABETH M. ROESEL, and
`AMANDA F. WIEKER, Administrative Patent Judges.
`
`WIEKER, Administrative Patent Judge.
`
`
`
`
`FINAL WRITTEN DECISION
`
`Finding All Challenged Claims Not Unpatentable
`35 U.S.C. § 318(a) and 37 C.F.R. § 42.73
`and
`Dismissing Patent Owner’s Contingent Motion to Amend
`35 U.S.C. § 316(d) and 37 C.F.R. § 42.121
`
`
`
`
`
`
`IPR2017-01674
`Patent 8,802,545 B2
`
`
`I.
`
`INTRODUCTION
`
`A. Background
`
`SPTS Technologies Limited (“Petitioner”) filed a Petition requesting
`
`an inter partes review of claims 1, 2, 4, and 5 (“challenged claims”) of
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`U.S. Patent No. 8,802,545 B2 (Ex. 1001, “the ’545 patent”). Paper 1
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`(“Pet.”). Plasma-Therm LLC (“Patent Owner”) filed a Preliminary
`
`Response. Paper 6 (“Prelim. Resp.”). We instituted an inter partes review
`
`of challenged claims 1, 2, 4, and 5 on the sole asserted ground of
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`unpatentability, pursuant to 35 U.S.C. § 314. Paper 7 (“Dec. on Inst.”).
`
`After institution, Patent Owner filed a Response (Paper 15, “PO
`
`Resp.”) to the Petition, Petitioner filed a Reply (Paper 18, “Pet. Reply”), and
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`Patent Owner filed a Sur-Reply (Paper 22, “PO Sur-Reply”), with our
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`authorization.
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`With its Patent Owner Response, Patent Owner also filed a
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`Contingent Motion to Amend (Paper 16, “MTA”), Petitioner filed an
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`Opposition to the Motion (Paper 19, “Opp. MTA”), and Patent Owner filed a
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`Reply (Paper 20, “Reply MTA”).
`
`An oral hearing was held on October 10, 2018, and a transcript of the
`
`hearing is included in the record. Paper 26 (“Tr.”).
`
`We issue this Final Written Decision pursuant to 35 U.S.C. § 318(a)
`
`and 37 C.F.R. § 42.73. For the reasons set forth below, we determine that
`
`Petitioner has not shown by a preponderance of the evidence that challenged
`
`claims 1, 2, 4, and 5 of the ’545 patent are unpatentable. Accordingly, we
`
`dismiss as moot Patent Owner’s Contingent Motion to Amend.
`
`
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`2
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`IPR2017-01674
`Patent 8,802,545 B2
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`B. Related Proceedings
`
`The parties identify no related litigation matters pursuant to 37 C.F.R.
`
`§ 42.8(b)(2). Pet. 3–4; Paper 3, 1.
`
`The parties identify the following PTAB proceedings related to
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`“sibling patents” of the ’545 patent: IPR2017-01314 and IPR2107-01457.
`
`Pet. 3–4; Paper 3, 1.
`
`C. The ’545 Patent
`
`The ’545 patent is titled “Method and Apparatus for Plasma Dicing a
`
`Semi-Conductor Wafer” and was issued August 12, 2014 from U.S.
`
`Application No. 13/412,119, filed March 5, 2012. Ex. 1001, (21), (22), (45),
`
`(54). The ’545 patent discloses a method for plasma dicing a semiconductor
`
`wafer. Id. at (54). Dicing is a process by which individual semiconductor
`
`devices (die or chips) are separated from each other after they have been
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`fabricated on a substrate, such as a silicon wafer. Id. at 1:23–26, 2:12–14.
`
`Dicing can be carried out by mechanical means, such as breaking along
`
`scribe lines or sawing, or by plasma etching. Id. at 2:14–20, 2:45–47.
`
`According to the ’545 patent, plasma dicing has a number of benefits over
`
`mechanical dicing, but current plasma etching equipment is not suitable for
`
`processing substrates that are “fixtured for dicing.” Id. at 2:55–63, 3:1–16.
`
`The ’545 patent aims to provide a plasma etching method that is “compatible
`
`with the established wafer dicing technique of handling a substrate mounted
`
`on tape and supported in a frame.” Id. at 3:44–46.
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`3
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`IPR2017-01674
`Patent 8,802,545 B2
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`Figure 3 of the ’545 patent is reproduced below:
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`
`
`Figure 3 of the ’545 patent is a cross-sectional view of work piece 1A,
`
`including substrate 1 adhered to tape 5, which is mounted in rigid frame 6.
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`Ex. 1001, 9:27–29. Substrate 1 has device structures 2 separated by street
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`areas 3. Id. at 8:62–9:7; see also id. at Fig. 1. Device structures 2 are
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`covered with protective material 4, such as photoresist, while street areas 3
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`remain unprotected. Id. During processing, unprotected street areas 3 of
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`substrate 1 are etched away using a reactive plasma etch process to separate
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`devices 2 into individual die. Id. at 9:63–66.
`
`More specifically, the ’545 patent discloses an exemplary method for
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`separating devices 2 into individual die. Id. at 7:6–38. The method includes
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`first and second plasma etch processes, each of which can be a time division
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`multiplexed (“TDM”) etch process. Id. at 7:16–32. According to the
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`’545 patent, a “Bosch or TDM” process “alternates a high rate silicon etch
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`step with a passivation step to control the etch sidewall, [and] is commonly
`
`used to etch deep features into silicon.” Id. at 1:56–59. In the first plasma
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`etch process, a “work piece is exposed to a first plasma etch process using a
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`first etchant gas.” Id. at 7:16–17; see also id. at 4:11–20. This first plasma
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`etch process “terminate[s] after the die are singulated . . . using a standard
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`endpoint technique.” Id. at 7:21–25. The second plasma etch process uses a
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`IPR2017-01674
`Patent 8,802,545 B2
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`second etchant gas and is “a lower etch rate process designed to reduce
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`undercut.” Id. at 7:25–28; see also id. at 13:41–67 (explaining that
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`undercutting occurs at the substrate-insulator interface and affects
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`performance of the singulated die).
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`D. Illustrative Claim
`
`The ’545 patent includes five claims, four of which are challenged.
`
`Claims 1, 4, and 5 are independent claims. Claim 1 is reproduced below,
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`reformatted and with bracketed letters [A] – [L] added to correspond to
`
`Petitioner’s identification of the claim elements:
`
`[A] A method for plasma dicing a substrate, the method
`1.
`comprising:
`[B] providing the substrate having a top surface and a
`bottom surface, the top surface having a plurality of device
`structures and street areas;
`[C] applying photoresist to the plurality of device
`structures and the street areas on the top surface of the
`substrate;
`[D] patterning the applied photoresist to allow the street
`areas to be unprotected;
`[E] placing the bottom surface of the substrate on a
`carrier support to form a work piece;
`[F] loading the work piece into a plasma processing
`chamber;
`[G] exposing the unprotected street areas on the top
`surface of the substrate of the work piece in the plasma
`processing chamber to a first plasma time division multiplex
`process using a first etchant gas;
`[H] terminating the first plasma time division multiplex
`process at a time at which an interface between the bottom
`surface of the substrate and the carrier support is reached,
`[I] said time being determined using an endpoint
`technique; and
`
`
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`5
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`IPR2017-01674
`Patent 8,802,545 B2
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`[J] exposing the work piece in the plasma processing
`chamber to a second plasma time division multiplex process
`using a second etchant gas,
`[K] said exposure of the work piece to the second plasma
`time division multiplexed process occurring after the
`termination of the first plasma time division multiplex process
`and without breaking vacuum from the termination of the first
`plasma time division multiplex process,
`[L] said second etchant gas having a different gas
`composition from said first etchant gas.
`
`Ex. 1001, 15:14–44; see also Pet. 28–31. Independent claims 4 and 5
`
`contain similar limitations. See Ex. 1001, 15:51–16:54; Pet. 17–18.
`
`E. Asserted Grounds of Unpatentability
`
`Petitioner asserts that claims 1, 2, 4, and 5 of the ’545 patent are
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`unpatentable under 35 U.S.C. § 103(a)1 as obvious over the following
`
`references (Pet. 5):
`
`Reference
`
`U.S. Patent No.
`
`Issue Date
`
`Exhibit No.
`
`Fischer
`
`6,406,979 B2
`
`June 18, 2002
`
`Ex. 1005
`
`Donohue
`
`6,071,822
`
`June 6, 2000
`
`Ex. 1006
`
`
`
`Additionally, Petitioner relies upon the Declaration of Dr. John E.
`
`Spencer (Ex. 1009, “the Spencer Declaration”). Patent Owner relies upon
`
`the October 18, 2017, Declaration of Dr. Stanley Shanfield, Ph.D. (Ex. 2001,
`
`
`1 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112–29,
`which was enacted on September 16, 2011, made amendments to 35 U.S.C.
`§§ 102, 103. AIA § 3(b), (c). Those amendments became effective eighteen
`months later on March 16, 2013. Id. at § 3(n). Because the application from
`which the ’545 patent issued was filed before March 16, 2013, any citations
`herein to 35 U.S.C. § 103 are to its pre-AIA version.
`
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`Patent 8,802,545 B2
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`“the First Shanfield Declaration”) and the April 12, 2017, Supplemental
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`Declaration of Dr. Shanfield (Ex. 2010, “the Supplemental Shanfield
`
`Declaration”). The parties also rely upon the May 10, 2018, deposition of
`
`Dr. Shanfield (Ex. 1032) and the March 8, 2018, deposition of Dr. Spencer
`
`(Ex. 2009).
`
`II. DISCUSSION
`
`A. Claim Construction
`
`In this inter partes review, claim terms in an unexpired patent are
`
`given their broadest reasonable interpretation in light of the specification of
`
`the patent in which they appear. 37 C.F.R. § 42.100(b) (2016). Under that
`
`standard, we generally give claim terms their ordinary and customary
`
`meaning, as understood by a person of ordinary skill in the art in the context
`
`of the entire patent disclosure. In re Translogic Tech., Inc., 504 F.3d 1249,
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`1257 (Fed. Cir. 2007).
`
`Petitioner proposes constructions of the following claim terms: “time
`
`division multiplex process”; “without breaking vacuum”; and “the second
`
`etchant gas having a different gas composition from said first etchant gas.”
`
`Pet. 24–27. In its Preliminary Response, Patent Owner responded with a
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`construction for only the phrase “said second etchant gas having a different
`
`gas composition from said first etchant gas.” Prelim. Resp. 13–14.
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`In post-institution briefing, Patent Owner proposes a construction of
`
`“plasma time division multiplex process,” which Petitioner disputes. See PO
`
`Resp. 8–12; Pet. Reply 19–26; PO Sur-Reply 13–18.
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`Upon consideration of the full record before us, we determine that no
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`claim term requires express construction, because the deficiencies in
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`Petitioner’s obviousness showing, outlined in our analysis below, do not turn
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`on the interpretation of any claim term. Vivid Techs., Inc. v. Am. Sci. &
`
`Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999); see also Pet. 23
`
`(“Petitioner’s ground of challenge is not believed to be reliant upon any
`
`particular construction.”).
`
`B. Principles of Law
`
`A claim is unpatentable under 35 U.S.C. § 103(a) if “the differences
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`between the subject matter sought to be patented and the prior art are such
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`that the subject matter as a whole would have been obvious at the time the
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`invention was made to a person having ordinary skill in the art to which said
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`subject matter pertains.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
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`(2007). The question of obviousness is resolved on the basis of underlying
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`factual determinations, including (1) the scope and content of the prior art;
`
`(2) any differences between the claimed subject matter and the prior art;
`
`(3) the level of skill in the art; and (4) objective evidence of nonobviousness.
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`Graham v. John Deere Co., 383 U.S. 1, 17–18 (1966). When evaluating a
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`combination of teachings, we must also “determine whether there was an
`
`apparent reason to combine the known elements in the fashion claimed by
`
`the patent at issue.” KSR, 550 U.S. at 418 (citing In re Kahn, 441 F.3d 977,
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`988 (Fed. Cir. 2006)). Whether a combination of prior art elements would
`
`have produced a predictable result weighs in the ultimate determination of
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`obviousness. Id. at 416–417.
`
`“In an [inter partes review], the petitioner has the burden from the
`
`onset to show with particularity why the patent it challenges is
`
`unpatentable.” Harmonic Inc. v. Avid Tech., Inc., 815 F.3d 1356, 1363 (Fed.
`
`Cir. 2016). The burden of persuasion never shifts to Patent Owner.
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`Dynamic Drinkware, LLC v. Nat’l Graphics, Inc., 800 F.3d 1375, 1378
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`(Fed. Cir. 2015). To prevail, Petitioner must support its challenge by a
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`preponderance of the evidence. 35 U.S.C. § 316(e); 37 C.F.R. § 42.1(d).
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`We analyze the challenge presented in the Petition in accordance with
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`the above-stated principles.
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`C. Level of Ordinary Skill in the Art
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`In the Decision on Institution, we adopted Patent Owner’s proposed
`
`definition of a person of ordinary skill in the art (“POSITA”), based upon
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`the arguments and evidence before us. Dec. on Inst. 8–9; see also Pet. 22;
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`Prelim Resp. 12; Ex. 1001, 1:16–19 (field of plasma etching); Ex. 1009 ¶ 49;
`
`Ex. 2001 ¶ 21. Thus, we preliminarily determined that a POSITA would
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`have had at least a Master’s degree in electrical engineering, chemical
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`engineering, materials science, physics, chemistry, or a similar field, and at
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`least four years of experience in process development or process engineering
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`related to plasma etching. Alternatively, this person would have had a Ph.D.
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`in physics, chemistry, electrical engineering, materials science, or a similar
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`field, along with two years of experience with process development or
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`process engineering related to plasma etching. Dec. on Inst. 8–9.
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`In their post-institution briefing, neither party offers pertinent
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`argument or evidence regarding this assessment. PO Resp. 12–13; see
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`generally Pet. Reply. Accordingly, upon consideration of the full record
`
`before us, we maintain our determination that Patent Owner’s proposed
`
`definition of a POSITA is appropriate, for the reasons given in the Decision
`
`on Institution. See Dec. on Inst. 8–9.
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`D. Obviousness over the Combined Teachings of Fischer and Donohue
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`Petitioner contends that claims 1, 2, 4, and 5 of the ’545 patent are
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`unpatentable as obvious over the combined teachings of Fischer and
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`Donohue. Pet. 27–64. For reasons that follow, we determine Petitioner has
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`not demonstrated by a preponderance of the evidence that the challenged
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`claims are unpatentable.
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` Overview of Fischer (Ex. 1005)
`
`Fischer is a U.S. patent titled “Method for Sectioning a Substrate
`
`Wafer into a Plurality of Substrate Chips,” which discloses a plasma dicing
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`method. Ex. 1005, (54), (57). Fischer explains that prior art mechanical
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`techniques for sectioning a wafer into individual chips were time-consuming
`
`and inflexible. Id. at 1:51–62. Fischer’s disclosed dicing method purports to
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`save time and allow flexibility with respect to the shape of the sectioned die.
`
`Id. at 2:21–29.
`
`Fischer discloses plasma etching as a method for sectioning substrate
`
`wafer 6 into a plurality of substrate chips 20, each of which carries
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`electronic components 19. Id. at 5:18–23, Figs. 2, 3. According to Fischer,
`
`substrate wafer 6 is prepared for sectioning by coating it with material for
`
`components 19, with lateral separating lines 24 between them, and by
`
`mounting the wafer to carrier film 28, which is fixed within frame 30. Id. at
`
`5:41–48, 5:57–58, Fig. 4. Components 19 are then covered by etching
`
`mask 32, and subsequently patterned to form exposed regions 38. Id. at
`
`5:61–6:11, Figs. 4, 5.
`
`The prepared wafer is placed within etching chamber 2 for sectioning.
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`Id. at 6:12–14, Fig. 1. Fischer discloses that working gas A etches exposed
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`regions 38 of the substrate. Id. at 6:14–22. Specifically, Fischer discloses
`
`that “an etching step and a polymerization step are carried out in an
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`alternating manner,” such that in the polymerization step, “the surfaces
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`cleared in the previous etching step, i.e., particularly the surfaces of
`
`regions 38 as well as their lateral surfaces, are uniformly covered with a
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`polymer.” Id. at 6:32–33, 6:44–47. This “polymer layer forms an effective,
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`provisional etch stop for the subsequent etching step. In the following
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`etching step, the polymer is removed again, the polymer from the surface of
`
`regions 38 being deposited in the immediate vicinity, i.e., on the lateral
`
`surfaces or the etching edge, thereby protecting them.” Id. at 6:47–52.
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`Finally, Fischer discloses that “the etching operation is first stopped on the
`
`boundary surface to carrier film 28,” so that substrate wafer 6 is sectioned
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`into individual substrate chips 20. Id. at 6:55–61.
`
` Overview of Donohue (Ex. 1006)
`
`Donohue is a U.S. patent titled “Etching Process for Producing
`
`Substantially Undercut Free Silicon on Insulator Structures,” which
`
`discloses a plasma etching method. Ex. 1006, [54], [57]. Specifically,
`
`Donohue relates to “the etching of different layers such as polysilicon and
`
`silicon which make up the finished semiconductor chip or thin film circuit.”
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`Id. at 1:14–18. Donohue explains that conventional methods for etching
`
`layers of a semiconductor chip often resulted in undesirable undercutting at
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`the silicon-insulator interface. Id. at 1:15–21, 1:61–65, Fig. 4. Therefore,
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`Donohue discloses an etching method that reduces undercut. Id. at 3:19–40.
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`Donohue discloses a two-phase etching method in which “the bulk of
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`the etching is performed by any etching technique known to one skilled in
`
`the art, wherein the present reduced ion plasma etching technique is then
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`11
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`utilized to provide a clearing etch.” Id. at 4:10–13. The initial etching phase
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`may be a Bosch process comprising cyclic etching and polymerizing
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`deposition, which is terminated using “a suitable endpoint detector.” Id. at
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`4:45–47, 9:31–32, 9:65–67. The second, clearing etching phase also may
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`involve “a cyclic etch and polymerizing deposition process.” Id. at 9:43–53,
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`12:24–28. According to Donohue, the disclosed etching method
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`substantially eliminates undercutting, although it results in a slower etch rate
`
`in the clearing phase. Id. at 4:8–17
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` Analysis of Independent Claim 1
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`
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`Petitioner contends that the combined teachings of Fischer and
`
`Donohue would have rendered obvious claim 1. Pet. 27–31 (claim chart),
`
`36–61. Patent Owner disputes Petitioner’s contentions. PO Resp. 22–38.
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`Patent Owner argues, inter alia, that Petitioner failed to explain adequately
`
`why a POSITA would have combined Fischer and Donohue. Id. at 22–30;
`
`see also Pet. Reply 5–14; PO Sur-Reply 3–12.
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`
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`After considering the parties’ arguments and evidence, and the full
`
`record developed during this proceeding, we determine that Petitioner has
`
`not demonstrated that challenged claim 1 is unpatentable by a preponderance
`
`of the evidence.
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`a. Claim Elements
`
`Petitioner contends that Fischer discloses elements A through H of
`
`claim 1, but does not disclose elements I through L. Pet. 28–30 (chart), 38–
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`43. According to Petitioner, elements I through L are taught by Donohue.
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`Id. at 30–31 (chart), 43–51.
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`Patent Owner disputes Petitioner’s contention that Donohue teaches
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`“a second plasma time division multiplex process,” recited in element J,
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`under Patent Owner’s construction of that phrase. PO Resp. 30–34.
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`However, we need not resolve whether Donohue teaches element J, because
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`Petitioner has not shown it would have been obvious to combine Fischer and
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`Donohue, as discussed below.
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`b. Rationales to Combine
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`Petitioner contends that a POSITA would have found it obvious to
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`combine Fischer’s disclosed plasma dicing method with Donohue’s teaching
`
`of sequential etch processes. Pet. 37–38, 42–43, 51. Petitioner provides two
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`rationales for this contention. First, Petitioner asserts that a desire to avoid
`
`undercutting would have led a POSITA to combine the references as
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`proposed. Id. at 52–55. Second, Petitioner asserts that this is merely a
`
`combination of known techniques, with no change in their functions and no
`
`unexpected results. Id. at 56–61.
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`i. Rationale # 1 – Avoiding Undercutting
`
`To evaluate Petitioner’s first rationale—that a desire to avoid
`
`undercutting would have led a POSITA to combine Fischer’s plasma dicing
`
`method with Donohue’s teaching of sequential etch processes—we begin
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`with a discussion of the problems addressed by Fischer and Donohue.
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`Fischer
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`Fischer discloses a method for plasma dicing a substrate. Ex. 1005,
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`(57). Dicing is a relatively gross technique, performed in the prior art with a
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`mechanical saw, where the goal is to separate a large wafer into individual
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`chips, wherein the functional components of the chips have already been
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`patterned onto the wafer prior to dicing. Id. at 1:27–41 (explaining that a
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`plurality of functional device components are produced on one 6–8" wafer at
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`the same time, and the wafer is then diced, i.e., “sectioned into a plurality of
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`substrate chips”), 1:42–50 (saw process). Fischer explains that the prior art
`
`sawing process is time-consuming and inflexible. Id. at 1:51–62.
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`To avoid these problems, Fischer dices the wafer using a gas that is
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`formed into a plasma, which is then accelerated toward the substrate wafer,
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`and reacts with it to locally dissolve portions of the wafer. Id. at 2:37–50.
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`Because the portions of the wafer that contain the functional device
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`components are covered with a protective mask, the plasma dissolves only
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`the areas intended to be diced. Id. at 2:52–55. In this manner, the individual
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`semiconductor chips are separated from the larger wafer by operation of the
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`plasma, rather than by operation of a mechanical saw.
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`Fischer explains that this plasma dicing process may employ a time
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`division multiplex process, in which “an etching step and a polymerization
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`step are carried out in an alternating manner,” to protect the lateral surfaces
`
`and the edges of the wafer from the plasma. Id. at 6:32–54. The process
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`stops when the plasma reaches the carrier film upon which the wafer is
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`mounted. Id. at 6:55–59.
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`Donohue
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`Donohue, by contrast, discloses a plasma etching process. Ex. 1006,
`
`(57); Ex. 2010 ¶ 26. Specifically, Donohue is concerned with forming the
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`functional device components on the front side of the wafer, i.e., the
`
`components that ultimately form the working elements of the individual
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`semiconductor chips. Ex. 1006, 1:15–19. These device components are
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`formed by etching structures into the substrate, through exposed areas of an
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`etching mask. Id. at 1:23–28. Etching is a relatively precise technique,
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`which requires forming “a laterally exact[ly] defined recess . . . in the
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`silicon” substrate, wherein these “recesses must have sidewalls which are to
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`be as vertical as possible.” Id. at 1:29–32.
`
`Donohue explains that when this etching process is performed with
`
`plasma, plasma ions easily enter the recess (also called a trench). Id. at
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`5:38–39. However, Donohue explains that “some ions will make it to the
`
`bottom of the trench. If the bottom of the trench is an insulator, e.g., SiO2,
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`there is no place for the ion charge to leak or bleed off, consequently a
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`positive charge will build up,” leading to “undercut” at the oxide interface.
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`Id. at 5:42–48. In Donohue, “undercutting” refers to the undesired etching
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`away of the lower, lateral edges of the trench sidewalls. See, e.g., id. at
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`Fig. 4; Ex. 2001 ¶ 40.
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`To avoid undercutting at the silicon-insulator interface, Donohue
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`discloses a two-stage plasma etching process. A first, initial etch process
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`performs the bulk of the etching (e.g., a Bosch process, with cyclic etching
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`and polymerizing deposition phases). Ex. 1006, 4:10–17, 4:45–51. The
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`initial etch is terminated, and followed by a second, clearing etch process
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`(e.g., an RIE process, with cyclic etching and polymerizing deposition
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`phases). Id. at 9:43–53, 9:65–67 (terminating the first process based on “a
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`suitable endpoint detector”).
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`Undercutting
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`For reference in the subsequent discussion, we start by describing two
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`types and causes of undercutting, as described in the evidence of record.
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`Donohue discusses a type of undercutting that we refer to as “interface
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`undercutting,” which occurs when positively charged ions become trapped at
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`a substrate/insulator interface, leading to undercutting of the lower, lateral
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`surfaces of the interface. Ex. 1006, 1:61–65, 5:38–48; see also Ex. 1001,
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`13:41–47.
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`Cited prior art to Grivna (Ex. 1021) describes a second type of
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`undercutting, which we refer to as “isotropic undercutting,” that occurs in
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`isotropic etch processes, when the plasma is applied to the substrate in all
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`directions, rather than anisotropically, i.e., in a near vertical direction.
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`Ex. 1021, 5:3–26; see also Ex. 1005, 2:42–46, 6:22–25 (describing
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`anisotropic etching). In Grivna, isotropic etching results in undercutting at
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`the portion of the substrate underlying the trenches; the sidewalls of the
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`trenches do not experience undercutting because they are protected by a
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`dielectric material applied to the trench sidewalls. Id. at Figs. 5–6 (depicting
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`dielectric 51, 55, 59 protections on the sidewalls of trench 50, 54, 58), Fig. 7
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`(depicting undercutting in the gap between the dielectric and backside 27 of
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`wafer 10), 4:15–27; see also Ex. 2010 ¶ 23.
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`The Proposed Combination
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`As described above, Donohue and Fischer concern different aspects of
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`the semiconductor production process—Donohue concerns the front-side
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`fabrication of the functional components of the semiconductor chip, and
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`Fischer concerns the sectioning of a plurality of finished semiconductor
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`chips from the larger wafer, after the fabrication of the individual chips is
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`completed. See, e.g., Ex. 1005, (57); Ex. 1006, (57); Tr. 5:4–5 (“[Donohue]
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`is admittedly not a dicing case.”). As Petitioner notes, however, both
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`Fischer and Donohue utilize plasma in their respective processes. Pet. 52–
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`53. Petitioner contends that, whether plasma etching is performed to form
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`trenches, as in Donohue, or to dice a wafer, as in Fischer, “the undercutting
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`of silicon at the etch stop interface is ‘undesirable.’” Id. Petitioner contends
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`that the undesirability of undercut is recognized by Donohue, the
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`’545 patent, and Grivna. Id. at 52–54 (citing Ex. 1001, 13:48; Ex. 1006,
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`1:61–65; Ex. 1021, 5:11–26); Ex. 1009 ¶¶ 87–88.
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`According to Petitioner, “Donohue explains that the insular properties
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`of the etch stop (oxide layer in the case of an SOI structure) contribute to the
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`problem of undercut,” due to the buildup of positive charge at the insulator
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`interface, at the bottom of the trench. Pet. 53–54 (citing Ex. 1006, 5:44–48).
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`Petitioner and its declarant, Dr. Spencer, contend that Fischer’s carrier
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`film 28, upon which wafer 6 is mounted, also typically comprises an
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`insulator material. Id. at 54; Ex. 1009 ¶¶ 88–89; Ex. 1005, 5:57–58. Thus,
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`Dr. Spencer opines that a “POSITA would expect undercut to occur in the
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`silicon at the interface carrier film 28 of Fischer for the same reasons that
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`Donohue describes undercut occurring in the silicon at its oxide interface.”
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`Ex. 1009 ¶ 90; Pet. 54.
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`To avoid this expected undercut in Fischer’s wafer, Petitioner
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`contends that a “POSITA would look to the solution proposed by Donohue,”
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`namely, “sequentially carrying out first and second TDM etch processes,
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`with the latter having a reduced ion current density.” Pet. 55; Ex. 1009
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`¶¶ 91–92. Petitioner and Dr. Spencer contend that “such a combination
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`would result in exactly what is claimed in independent claim 1 of the
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`‘545 patent.” Pet. 55 (citing Ex. 1009 ¶ 93).
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`Patent Owner’s disputes Petitioner’s contentions. PO Resp. 22–30.
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`Patent Owner argues that Fischer does not suffer from undercutting and,
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`thus, there would be no reason to look to Donohue’s technique for avoiding
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`undercut. Id. at 23. According to Patent Owner, Fischer discloses that the
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`plasma etching “is first stopped on the boundary surface to carrier film 28,”
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`i.e., the process “stops when the insulator carrier film is reached, such that
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`the positive ions do not create a buildup of positive charge that would lead to
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`undercutting.” Id. at 23–24, 27 (citing Ex. 1005, 6:57–59; Ex. 2010 ¶¶ 21–
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`22).
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`Patent Owner also argues that the additional evidence cited by
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`Petitioner is insufficient to demonstrate that Fischer would have suffered
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`from undercutting. Patent Owner argues that Grivna is not relevant to
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`Fischer because Grivna concerns isotropic etching—an etching process in
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`which the plasma etches in all directions—whereas Fischer concerns
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`anisotropic etching, in which the plasma impinges the wafer in a
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`near-vertical direction. Id. at 24–25 (citing Ex. 1021, 5:11–26; Ex. 1005,
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`2:42–46). Patent Owner argues that the undercutting experienced by Grivna
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`relates to this isotropic etch technique (not the buildup of charge, as
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`discussed in Donohue), and would not be experienced in Fischer’s
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`anisotropic process, especially in light of the cyclic polymerization steps
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`Fischer employs to prevent lateral etching or undercut. Id. at 25–26 (citing
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`Ex. 1005, 6:44–54); Tr. 19:9–23. Patent Owner also criticizes Petitioner’s
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`reliance on the ’545 patent, arguing that this constitutes impermissible
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`hindsight. Id. at 24, 26–27.
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`We have considered the parties’ arguments and cited evidence, and
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`we are not persuaded by Petitioner’s contention that a POSITA would have
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`found it obvious to modify Fischer’s plasma dicing process to employ the
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`sequential etching steps disclosed by Donohue, to avoid undercutting.
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`Patent Owner does not dispute that Fischer’s carrier film 28 is an
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`insulator material. See generally PO Resp. Thus, we turn to Petitioner’s
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`contention that a POSITA would expect interface undercutting to occur at
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`that surface, due to its insulative properties. Pet. 54–55. Petitioner’s
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`primary support for this argument is Dr. Spencer’s testimony.2 Id. (citing
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`Ex. 1009 ¶¶ 89–90); Tr. 16:7–10 (“The fact that there would be undercutting
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`that would be desired to be avoided is from the teachings of Donohue and
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`the fact that Grivna says, hey, we don’t want undercutting.”). Dr. Spencer
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`opines that a “POSITA would expect undercut to occur in the silicon at the
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`interface carrier film 28 of Fischer for the same reasons that Donohue
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`describes undercut occurring in the silicon at its oxide interface, and for the
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`same reason that the ‘545 patent admits that undercutting was known to
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`occur,” namely, that the presence of an insulator (carrier film 28) causes the
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`accumulation of positively charged ions, leading to undercutting. Ex. 1009
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`¶ 90.
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`Dr. Spencer’s testimony (Ex. 1009 ¶ 90) lacks supporting evidence
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`and relies on impermissible hindsight. Neither Petitioner nor Dr. Spencer
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`directs us to evidence sufficient to establish that a POSITA would have
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`recognized interface undercutting as a problem that would occur in an
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`anisotropic plasma dicing process as disclosed in Fischer. Although
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`2 Even if the ’545 patent and/or Grivna show that undercutting is undesirable
`as a general matter (Pet. 53–55; Pet. Reply 13–14), this does not demonstrate
`sufficiently that Fischer is likely to suffer from undercutting and, thus, such
`evidence is unpersuasive on this point. Tr. 27:6–11 (“All Petitioner can
`raise is that undercut was known to be bad. Well, all these references, the
`’545 patent, Fischer, Grivna, Donohue, they all understand that. And Patent
`Owner doesn’t dispute that. The key question is, though, whether it happens
`in Fischer, because if there’s no problem to solve in Fischer, there’s no
`reason to go look to the solution of Donohue.”). Nonetheless, we discuss
`these contentions below.
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`Petitioner relies on Grivna (Ex. 1021), Grivna addresses isotropic
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`unde