UNITED STATES PATENT AND TRADEMARK OFFICE
`_________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_________________________
`
`WESTERN DIGITAL CORPORATION
`Petitioner
`
`v.
`
`SPEX TECHNOLOGIES, INC.
`Patent Owner
`_________________________
`
`Case No. IPR2018-00082
`Patent 6,088,802
`_________________________
`
`SUPPLEMENTAL DECLARATION OF MARTIN KALISKI, Ph.D. IN
`SUPPORT OF PETITION FOR INTER PARTES REVIEW
`
`Mail Stop Patent Board
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`_________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_________________________
`
`WESTERN DIGITAL CORPORATION
`Petitioner
`
`v.
`
`SPEX TECHNOLOGIES, INC.
`Patent Owner
`_________________________
`
`Case No. IPR2018-00082
`Patent 6,088,802
`_________________________
`
`SUPPLEMENTAL DECLARATION OF MARTIN KALISKI, Ph.D. IN
`SUPPORT OF PETITION FOR INTER PARTES REVIEW
`
`Mail Stop Patent Board
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`1.
`
`I have been asked to provide this Supplemental Declaration
`
`concerning technical subject matter relevant to the inter partes review of U.S.
`
`Patent No. 6,088,802 (“the ’802 Patent”). Specifically, this Supplemental
`
`Declaration addresses several arguments raised in Patent Owner’s Preliminary
`
`Response (“POPR”) and issues identified by the Patent Trial & Appeal Board in its
`
`decision instituting review of the ’802 Patent in IPR2018-00082 (Paper 11).
`
`2.
`
`Based on my review of the POPR and the institution decision, I
`
`understand that the Board agreed with Patent Owner that the Petition had not
`
`shown that Harari disclosed an identical or equivalent structure to the structure of
`
`interface control device 910 in the ’802 Patent at Figure 9B, and, as a result, the
`
`Board concluded that there was not a reasonable likelihood that Petitioner would
`
`prevail. Subsequent to my initial declaration (Ex. 1015), additional evidence has
`
`come to light that, in my opinion, establishes that Figure 4 in Harari discloses the
`
`same or equivalent structure as interface control device 910.
`
`I.
`
`HARARI FIGURE 4 TEACHES INTERFACE CONTROLLER 910
`FROM FIGURE 9B OF THE ’802 PATENT
`
`[1F.] means for mediating communication of data
`between the host computing device and the
`target means so that the communicated data
`must first pass through the security means
`[11E.] means for mediating communication of data
`between the host computing device and the
`target means so that the communicated data
`must first pass through the security means
`
`1
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`[23E.] means for mediating communication of data
`between the host computing device and the
`target means so that the communicated data
`must first pass through the security means
`In the institution decision, the Board adopted the district court’s
`
`3.
`
`construction of the term “means for mediating communication of data between the
`
`host computing device and the target means so that the communicated data must
`
`first pass through the security means.” Specifically, the Board agreed that this
`
`phrase is governed by 35 U.S.C. § 112 ¶ 6, “where the function is ‘mediating
`
`communication of data between the host computing device and the target means so
`
`that the communicated data must first pass through the security means’ and the
`
`corresponding structure is ‘[i]nterface control device 910 (as shown in Fig. 9B).’”
`
`Paper 11 at 15 (citing Ex. 2003 at 31-38). This is a narrower construction than was
`
`proposed in the petition or by SPEX in the district court.
`
`4.
`
`Applying this construction, the Board found that the Petition had not
`
`shown that Harari disclosed an identical or equivalent structure to the structure in
`
`the ’802 Patent that performs the function in this means-plus-function “means for
`
`2
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`mediating” term and thus found that there was not a reasonable likelihood that
`
`Petitioner would prevail. 1 Paper 11 at 34-36.
`
`5.
`
`Subsequent to my original declaration, two of SPEX’s experts in the
`
`related district court litigation, Dr. V. Thomas Rhyne (Patent Owner’s
`
`infringement and invalidity rebuttal expert) and Mr. Miguel Gomez (also Patent
`
`Owner’s invalidity rebuttal expert), testified regarding the structures in Harari
`
`Figure 4 in comparison to interface controller 910 in Figure 9B of the ’802 Patent
`
`1 The Board acknowledged that Harari’s functional module 42 provides
`
`encryption/decryption and other security features. Paper 11 at 31. The Board’s
`
`institution decision stated that the evidence of record did not establish that Harari’s
`
`functional module 42 (or controller 41) assures that data exchanged between the
`
`host and the daughter card must pass through the functional module for performing
`
`a security operation (such as encryption). Id. My original declaration explained
`
`that one of ordinary skill in the art would know that in order to store encrypted data
`
`it must first pass through the security means in Harari (to be encrypted in the first
`
`place). See Ex. 1015, ¶ 115. And, the record also contained Dumas, which
`
`discloses that the data must pass through the security means, evidencing that it was
`
`known in the art to do so. Id., ¶¶ 184-187. The Board also agreed that Dumas
`
`discloses this limitation in its institution decision. Paper 11 at 41-42.
`
`3
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`and the relationship of the components in Figure 9B to standard PCMCIA and
`
`flash memory interfaces. This testimony was not available at the time of my
`
`original declaration and is relevant to the issue of whether Harari Figure 4
`
`discloses a structure corresponding to interface controller 910 in ’802 Patent Figure
`
`9B (or its equivalent). I have provided that testimony below, omitting objections
`
`for clarity.
`
`6.
`
`First, Dr. Rhyne compared Host Interface 54 of Figure 4 in Harari to
`
`Figure 9B of the ’802 Patent:
`
`Q. Sure. So the host interface 54 in Figure 4 of Harari would perform
`the same function as the blocks that interface with the PCMCIA
`interface in Figure 9B, right?
`A. Did you mean 54 or 12 in -- in Harari's Figure 4?
`Q. No. In -- in Harari's Figure 4, I'm talking about host interface --
`A. Okay.
`Q. -- block 54, and I'm asking you if they perform the same function as
`-- and I'll identify the blocks in Figure 9B of the '802 patent -- the
`PCMCIA I/O controller?
`A. Okay.
`Q. PCMCIA address buffer?
`A. Yep.
`Q. PCMCIA data buffer?
`A. Yep.
`Q. Ready register?
`A. Ready/busy register, right.
`Q. Yes. Command detector and state controller?
`
`4
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`A. Okay. I think I might have to do some reading to decide about
`whether I would include the command detector in it, but everything else
`up to then I would agree with you.
`Q. Okay.
`A. That's just kind of the -- a little -- a more detailed picture of what
`you are required to do really –
`Q. Uh-huh.
`A. -- to build a PCMCIA standard interface.
`Q. Okay. And by the way, there's nothing that's shown in those elements
`I just discussed that's different than a standard PCMCIA interface,
`right?
`A. Those are things that are typically -- that's the way the interface is
`typically implemented I would say.
`Q. Okay.
`A. Some -- there are things there that are required. You have to have
`buffering, and you have to have certain things like -- I think I -- I have
`a whole set of cites to the USB interface standard where it says it's
`stateful and things like that. So you really -- the -- the standard lays
`very well on top of those detail structures in Figure 9B of the '802.
`Ex. 1022 at 128:4-129:23 (emphasis added). Mr. Gomez also compared Host
`
`Interface 54 of Figure 4 in Harari to Figure 9B of the ’802 Patent:
`
`Q. And the PCMCIA IO controller, the PCMCIA address buffer, the
`PCMCIA data buffer, the ready/busy register, command detector, and
`state controller, are those all things that you would expect to find in any
`PCMCIA compliant circuitry that's going to interact with a PCMCIA
`interface?
`A. So you pointed specifically to the IO controller, the address buffer,
`the data buffer, the ready/busy register and command detector –
`Q. And also the state controller.
`A. And also the state controller. In some forms, those will be in -- did
`you point to the configuration registers as well?
`Q. You can add that as well, sure.
`
`5
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`A. Elements of each are likely to exist in a -- I haven't done an analysis
`to determine whether or not any one of these could be eliminated. And
`the implementation of these varies dramatically. But you certainly
`would need a data buffer to move data in and out. And the ready/busy
`register is very important. But I haven't done a complete analysis to
`know whether you could eliminate one of these and still may call it a
`PCMCIA controller or interface.
`Q. Okay. But as a person of ordinary skill in the art prior to 1997 -- I'm
`sorry. As a person of ordinary skill in the art prior to 1997, such a
`person would understand that these elements that we just discussed
`would either be there or substantially be there in any kind of PCMCIA
`interface, correct?
`A. Again, I -- as I said, I would have to think about whether or not you
`could eliminate one or more of these. But generally, these are the
`components that are in a PCMCIA interface.
`Ex. 1023 at 263:16-265:10 (emphasis added).
`
`7.
`
`Second, Dr. Rhyne compared Memory Interface 56 of Figure 4 in
`
`Harari to Figure 9B of the ’802 Patent:
`
`Q. Okay. And then there's -- again, turning back to Figure 4 of the
`Harari patent, there's element 56, which is the memory interface.
`A. Okay.
`Q. And that would perform the same functions as the compact flash I/O
`control, compact flash data buffer, card enable decoder and compact --
`compact flash sector counter blocks, correct?
`A. That would be one way to implement that memory interface.
`Q. The -- the blocks that are shown in Figure 9B, the compact flash
`sector counter, compact flash I/O control, compact flash data buffer and
`card enable decoder, they're -- nothing that's particularly novel about
`that particular combination, right?
`A. I don't think that the inventors claimed any novelty for the way
`they built that interface.
`
`6
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`Ex. 1022 at 129:24-130:15 (emphasis added). Mr. Gomez also compared Memory
`
`Interface 56 of Figure 4 in Harari to Figure 9B of the ’802 Patent:
`
`Q. And would you expect, back in the 1997 time frame, a CompactFlash
`interface circuitry
`to
`include
`the CompactFlash IO control,
`CompactFlash data buffer, card enabled coder and CompactFlash
`sector counter?
`A. Again, I would have to go back and do an analysis that all of those
`are required. I think the CompactFlash sector controller may be
`modified in various forms, and whether it would cull that specifically,
`but generally these are the elements that are part of CompactFlash.
`Ex. 1023 at 265:20-266:7 (emphasis added).
`
`8.
`
`Third, Dr. Rhyne testified that both these interfaces would have to
`
`be configured with registers:
`
`Q. Okay. And these interfaces would have to be, of course, configured
`with registers, right?
`A. Yes.
`Ex. 1022 at 130:16-18 (emphasis added). Mr. Gomez testified similarly with
`
`regard to the configuration registers:
`
`Q. Do any of the elements here that are shown within figure 9B appear
`to be non-standard circuitry for interfacing with either a PCMCIA or a
`CompactFlash interface?
`A. So I think the only thing that I could point at right away is the sharing
`of the configuration registers. That doesn't appear to be standard. But,
`you know, it certainly could be implemented that way.
`Q. Okay. You would have to -- would it be fair to say that you would
`have to configure the interface to the PCMCIA and also configure
`the interface to the CompactFlash?
`A. Yes.
`Ex. 1023 at 266:9-267:2 (emphasis added).
`
`7
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`9.
`
`This testimony is further evidence that a skilled artisan would
`
`understand that Figure 4 of Harari discloses the structure of Figure 9B of the ’802
`
`Patent (or its equivalents) and, importantly, that PCMCIA and flash memory
`
`interfaces typically use these specific structures. I have created the following
`
`annotated figures to illustrate the structural identity between Figure 4 of Harari and
`
`Figure 9B of the ’802 Patent as testified to by Dr. Rhyne and Dr. Gomez:
`
`8
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`10.
`
`Depicted in red is the Host Interface 54 structure in Figure 4 of Harari
`
`compared with the corresponding PCMCIA I/O Controller, PCMCIA address buffer,
`
`PCMCIA data buffer, ready register, state controller, and command detector
`
`structures in Figure 9B of the ’802 Patent. These components are the typical
`
`components for interfacing with PCMCIA.
`
`11.
`
`Depicted in green is the Memory Interface 56 structure in Figure 4
`
`of Harari compared with the corresponding compact flash I/O control, compact flash
`
`data buffer, card enable decoder, compact flash sector counter blocks structures in
`
`Figure 9B of the ’802 Patent. These components are the typical components for
`
`interfacing with flash memory.
`
`12.
`
`Furthermore, both of the PCMCIA and flash memory interfaces
`
`would have to be configured with registers to operate, depicted in both red and
`
`green. Specifically, for both the PCMCIA and memory interfaces to operate, there
`
`would need to be configuration registers, as shown in Figure 9B of the ’802 Patent.
`
`13.
`
`Thus, Harari teaches one of ordinary skill in art in 1997 the structure
`
`of interface control device 910 in Figure 9B of the ’802 Patent. To the extent that
`
`the structures in the ’802 Patent and in Harari are not identical, they are equivalent
`
`in that they each achieve the same function (mediating communication of data
`
`between the host computing device and the target means) in substantially the same
`
`way (by using typical interface components for the PCMCIA and flash memory
`
`9
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`interfaces) to achieve substantially the same result (so that the communicated data
`
`must first pass through the security means). 2 The differences between the
`
`structures, if any, are merely insubstantial (for example, unified or separate
`
`configuration registers) and the overall structure consists of typical components for
`
`interfacing with PCMCIA and components for interfacing with flash memory.
`
`14.
`
`The components from interface control device 910 in Figure 9B of the
`
`’802 Patent are, as Dr. Rhyne and Dr. Gomez testified, known solutions to interface
`
`PCMCIA and flash memory and thus, as interchangeable, standard interfaces to
`
`PCMCIA and to flash memory, would have been obvious to one of skill in the art to
`
`implement. Such a skilled artisan would have been motivated to use these standard
`
`components for interfacing with PCMCIA and flash memory because it would
`
`increase the likelihood of a functional result, result in a simpler, familiar design, and
`
`would lower development costs by avoiding having to develop a brand new solution
`
`to interface with PCMCIA and flash memory. And a skilled artisan would have a
`
`reasonable expectation of success in using these standard components for interfacing
`
`2 While one of ordinary skill in the art would know that in order to store encrypted
`
`data it must first pass through the security means in Harari (to be encrypted in the
`
`first place) (See Ex. 1015, ¶ 115), Dumas also discloses that the data must pass
`
`through the security means as well. Id., ¶¶ 184-187; Paper 11 at 41-42.
`
`10
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
`
`because, as PO’s experts admit, those standard components are the ones typically
`
`used to interface with PCMCIA and flash memory.
`
`15.
`
`Thus, Harari teaches the structure of interface control device 910 from
`
`Figure 9B of the ’802 Patent or its equivalent to one of ordinary skill in the art.
`
`11
`
`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
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`WESTERN DIGITAL CORPORATION, EXHIBIT 1024
`WESTERN DIGITAL CORP. v. SPEX, TECHNOLOGIES, INC.
`IPR2018-00082
`
`
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