(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2005/0134220 A1
`(43) Pub. Date:
`Jun. 23, 2005
`Brohlin et al.
`
`US 2005O134220A1
`
`(54) AREA-EFFICIENT COMPENSATION
`CIRCUIT AND METHOD FOR WOLTAGE
`MODE SWITCHING BATTERY CHARGER
`(76) Inventors: Paul L. Brohlin, Neufahrn (DE);
`Robert Martinez, Lucas, TX (US);
`Richard K. Stair, Richardson, TX (US)
`Correspondence Address:
`TEXAS INSTRUMENTS INCORPORATED
`PO BOX 655474, M/S 3999
`DALLAS, TX 75265
`Appl. No.:
`10/995,742
`
`Filed:
`
`Nov. 22, 2004
`Related U.S. Application Data
`(60) Provisional application No. 60/524,193, filed on Nov.
`21, 2003.
`
`(21)
`(22)
`
`(52) U.S. Cl. .............................................................. 320/128
`
`(57)
`
`ABSTRACT
`
`A feedback-controlled battery charger circuit (500) pro
`vides, alternatively, constant current and constant Voltage to
`a battery (328) being charged. Current and voltage at the
`charger output (326) are sensed in sensing elements (308)
`and compared to preset reference values from reference
`generators for current (330) and voltage (332), thus gener
`ating error Signals for both current and Voltage. These error
`signals are amplified in separate amplifiers (530, 534); then,
`depending on battery Voltage, one of the amplified error
`Signals is automatically selected by a signal Selector (540).
`The Selected error Signal is applied to a single compensation
`amplifier (554) with reactive feedback loop (552, 556); the
`output of the compensation amplifier with feedback (504)
`then controls the output current or Voltage of the output stage
`(306). This output stage is a voltage controlled current
`Source. The output of this Voltage controlled current Source
`is connected through an output filter (318) and Sensing
`elements (308) to the battery (328) being charged.
`
`Publication Classification
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`(51) Int. Cl. ..................................................... H02.J 7/00
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`Compensation Amplifier
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`99TPUT is TAge/396 sensin 6/- 308
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`PWM
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`POS
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`Output
`Filter
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`Apple Inc. v. Qualcomm Incorporated
`IPR2018-01283
`Qualcomm Ex. 2001
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`Patent Application Publication Jun. 23, 2005 Sheet 1 of 6
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`Patent Application Publication Jun. 23, 2005 Sheet 2 of 6
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`Patent Application Publication Jun. 23, 2005 Sheet 3 of 6
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`Patent Application Publication Jun. 23, 2005 Sheet 5 of 6
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`Patent Application Publication Jun. 23, 2005 Sheet 6 of 6
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`US 2005/0134220 A1
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`Jun. 23, 2005
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`AREA-EFFICIENT COMPENSATION CIRCUIT
`AND METHOD FOR WOLTAGE MODE
`SWITCHING BATTERY CHARGER
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`0001. This application claims priority under 35 U.S.C.
`119 of U.S. Patent Application Ser. No. 60/524,193, filed
`Nov. 21, 2003, entitled “Area-Efficient Compensation
`Method for Voltage-Mode Switching Battery Chargers,” the
`entirety of which is incorporated herein by reference.
`BACKGROUND OF THE INVENTION
`0002) 1. Field if the Invention
`0003. This invention relates to battery chargers in gen
`eral, and, in particular, to a compensation method for a dual
`voltage mode, constant current constant voltage (CC-CV),
`DC-DC Step-down Switching battery charger using negative
`feedback for regulation of charging current and Voltage.
`0004 2. Description of the Related Art
`0005 Modern battery chargers are designed to accurately
`regulate both charging current and charging Voltage. One
`class of chargerS is referred to as constant-current, constant
`voltage (CC-CV) chargers.
`0006 Lithium (Li+) battery chargers follow a predeter
`mined charging profile to ensure Safe operation for the user
`and optimal charging of the battery. This profile calls for
`constant current during the bulk charging phase, followed by
`constant Voltage once the battery Voltage reaches a preset
`level. Regulating both current and Voltage requires two
`feedback control loops. In the design of a charger, Some of
`the challenging tasks are (1) compensating these feedback
`loops, (2) Smoothly transitioning between the current loop
`and the Voltage loop, and (3) minimizing the size of com
`pensation components for these loops.
`0007. One known solution, as described in U.S. Pat. No.
`6,570,372 issued May 27, 2003, the entirety of which is
`incorporated herein by reference, uses an active compensa
`tion amplifier with associated feedback components for each
`of current and Voltage. While this approach has the advan
`tages of an active compensation amplifier, including ratio
`metric gain Setting and Small passive components, it requires
`two amplifiers and two Sets of passive feedback compo
`nents, with the resulting die Size and cost penalties.
`0008. A second known solution, as described in U.S. Pat.
`No. 6,166.521 issued Dec. 26, 2000, the entirety of which is
`incorporated herein by reference, uses a transconductance
`amplifier for each of current and Voltage error amplifiers,
`followed by a Summation network and Single passive com
`pensation network. The component values in this passive
`network are too large to be integrated and must be external
`to the die. Another drawback of this approach is the Vari
`ability in gain of the transconductance amplifiers with
`proceSS and temperature variation.
`0009. Additional background may be found in U.S. Pat.
`Nos. 6,697,685; 6,570,372; 6,366,056; 6,166.521; 6,137,
`265; 6,100,667; 5,723,970; 5,710,506; and 5,670,863.
`SUMMARY OF THE INVENTION
`0.010 The invention provides an apparatus and method
`for a feedback-controlled constant-current, constant-voltage
`
`(CC-CV) battery charger. An automatic signal Selector deter
`mines which of an amplified Voltage error or amplified
`current error to connect to a following common active
`compensation amplifier. Advantages over known art include
`reduction in required die area, ability to integrate compen
`sation components, and improved compensation amplifier
`performance.
`0011. In an embodiment of the invention described in
`greater detail below, a common compensation amplifier is
`used for both current and Voltage feedback loops, each loop
`being used alternatively to control its output parameter
`(current or voltage). The frequency and phase response
`tailoring components in the compensation network are in a
`feedback configuration around the compensation amplifier,
`allowing much Smaller component values and further reduc
`ing die area. Further, the amplitude and phase response of
`the compensation amplifier with Such feedback are a func
`tion of component ratioS rather than absolute values, yield
`ing much more accurate and repeatable gain and phase
`characteristics. Both the current Sensing and Voltage Sensing
`points in the circuit follow the output filter of the DC-DC
`converter, allowing use of the same compensation amplifier
`for both parameters. A signal Selector automatically Selects
`the appropriate one of the two error Signals (voltage or
`current), and presents the Selected error Signal to the com
`pensation amplifier.
`0012. As further described below, the disclosed topology
`provides a combination of desirable properties not available
`in the known art, including 1) lower component count, from
`the use of a Single compensation amplifier and feedback
`network, resulting in Smaller die area; 2) active compensa
`tion with rationmetric feedback, which reduces the impact of
`open-loop gain variation in the compensation or input error
`amplifiers; 3) voltage Sense and current Sense elements both
`within the Overall System feedback loop, allowing amplitude
`and phase response of a Single compensation network to be
`optimized for both current and Voltage control; and 4)
`automatic Signal Selector which determines whether Voltage
`control or current control is required, and automatically
`Selects the appropiate errorSignal to be included in the
`feedback loop.
`0013 Further benefits and advantages will become appar
`ent to those skilled in the art which the invention relates.
`
`DESCRIPTION OF THE VIEWS OF THE
`DRAWINGS
`0014 FIG. 1 (prior art) is a block diagram of a charger
`of the type to which the disclosures relate.
`0015 FIG. 2 (prior art) is a graph of a typical charging
`profile of a Lithium Ion (Li+) battery.
`0016 FIG. 3 (prior art) is a block diagram of a known
`DC-DC converter providing compensation using two Sepa
`rate compensation networkS.
`0017 FIG. 4 (prior art) is a block diagram of a known
`DC-DC converter providing compensation using transcon
`ductance amplifiers and passive compensation.
`0018 FIG. 5 is a block of a DC-DC converter employing
`the principles of the invention.
`0019 FIG. 6 is a circuit diagram of an example imple
`mentation of the converter shown in FIG. 5.
`
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`US 2005/0134220 A1
`
`Jun. 23, 2005
`
`0020. Through the drawings, like elements are referred to
`by like numerals.
`
`DETAILED DESCRIPTION
`0021. As shown in FIG. 1, a typical battery charger 100
`has an input voltage applied to the input 106 of an output
`Stage 102. Output stage 102 is a Voltage-controlled current
`source (VCCS) which serves to regulate the flow of current
`from input 106 to a battery 116 which is to be charged.
`Battery charging current is Sensed by a Sensor 114 at the
`output of output stage 102. Sensor 104 outputs a voltage
`representing the charging current to a first input 108 of a
`charger control circuit 104. Voltage on the battery 116 is also
`Sensed, and is applied to a Second input 110 of charger
`control circuit 104. Charger control circuit 104 is adapted
`and configured in response to the inputs 108, 110, to
`determine whether a constant current or constant Voltage
`should be applied to the battery 116 being charged. In
`response to this determination, a control Signal is applied by
`way of feedback to a control input 112 of the VCCS 102, to
`Set the current into or Voltage applied to battery 116 (as
`appropriate) at a selected level. Constant current is applied
`if the battery voltage is below its target fully-charged
`Voltage, constant Voltage is applied when the battery Voltage
`reaches its target fully-charged Voltage.
`0022. The charging profile for a typical Li+ battery is
`detailed in FIG. 2. A pre-conditioning phase 200 begins the
`charging process, during which a low current 214 is applied
`by output stage 102 to the battery 116 being charged. As a
`result of the applied current 214, the voltage on battery 116
`gradually increases as shown by 216, until it reaches a
`minimum charge Voltage level 212. At this point, a current
`regulation phase 202 begins wherein the charge current is
`increased to a constant regulation current level 210, and the
`battery charge Voltage (applied at 110) continues to increase
`as shown at 220, until reaching the regulation or target
`Voltage 208. At this time, the charger enters a Voltage
`regulation phase 204 wherein a constant regulation Voltage
`208 is applied to the battery 106, preventing battery voltage
`from exceeding the target Voltage value. Charge current
`begins to decrease in phase 204, as shown at 222, as battery
`106 approaches its full charge. When the charging current
`reaches a preset minimum level 214, charging is terminated,
`at 206.
`0023 FIG. 3 shows a known battery charger 300 that
`employs two active compensation amplifiers. Charging cur
`rent is provided to a battery load 328 (corresponding to
`battery 116 in FIG. 1) from a supply 346 by an output stage
`306 (analogous to output stage 102 of FIG. 1) comprising a
`power MOSFET transistor 314 and diode 316 connected as
`shown, with an output filter 318 with transfer function H(s)
`serving to smooth the flow of current. The amount of
`average current is controlled by the duty cycle of a Square
`wave generated by a pulse-width-modulation (PWM) com
`parator 350 which drives the gate of transistor 314 by means
`of a driver 312. The comparator has two inputs, one con
`nected to a Summing node 348 and one connected to receive
`a ramp signal from a ramp generator 310. For Sensing the
`charge current and charge Voltage, a Sensing Stage 308 is
`provided at the output of stage 306. During the constant
`current (CC) mode (current regulation phase 202 in FIG. 2),
`the Voltage developed acroSS a current Sense resistor 320
`(analogous to sensor 114 and connected in Series with filter
`
`318 at the output of stage 306), is indicative of the charge
`current applied to the load 328. A reference voltage 330, set
`to the Voltage representing the desired charging current in
`CC mode, is connected in Series with the Voltage generated
`by the resistor, and is subtracted from it. This differential
`between the voltage of resistor 320 and the reference voltage
`330 is applied as an input voltage to a current compensation
`amplifier 302, the reference voltage 330 being set so that the
`differential is Zero when the charge current is at its target
`value. An amplifier 334 and feedback components 336 and
`338 are connected as shown to form an error amplifier for
`the current error. Similarly, a fraction of the output Voltage,
`Set by a Voltage divider comprising a resistor 322 and a
`resistor 324, is fed back as an input to a Voltage compen
`sation amplifier 304, where it is compared in amplifier 340
`to a reference Voltage from a reference generator 332
`representing the desired regulation Voltage for a constant
`voltage CV mode (in the voltage regulation phase 204 of
`FIG. 2). Feedback components 342 and 344, connected as
`shown, control the gain of the resulting error amplifier for
`the regulation Voltage. The outputs of both compensation
`amplifiers 302, 304 are summed at a summing node 348
`which, as previously indicated, serves as an input (shown as
`the inverted input) to the PWM comparator 350, thereby
`controlling the duty cycle of (and average current through)
`power PMOS transistor 314. This topology has the advan
`tage of having an active compensation amplifier, but the
`disadvantage of requiring two compensation amplifiers and
`two sets of reactive components, greatly increasing die size
`or requiring the use of external components.
`0024 FIG. 4 shows another known battery charger 400
`that employs two transconductance amplifiers and a single
`passive compensation network. It has an output Stage 306
`and a Sensing Stage 308 whose configurations and operations
`are identical with those of corresponding stages 306, 308 of
`charger 300 of FIG. 3, described above. A current loop
`transconductance amplifier 402 and a Voltage loop transcon
`ductance amplifier 404 generate error Voltages for current
`and voltage respectively. Unlike the amplifiers 302, 304 of
`charger 300 (see FIG. 3), there is no feedback from the
`outputs to the inputs of error amplifiers 402 and 404, so they
`amplify (modify amplitude and phase response) but do not
`compensate the error Signals. The error Signal outputs are
`Summed at a Summing node 406 and applied to a passive
`compensation network 408, as shown. Source 410 serves the
`same function as source 346. The topology of charger 400
`has the advantage that it uses a single compensation net
`work, but this network has much larger component values
`for reactive elements than the active compensation charger
`300 of FIG. 3. In charger 400, passive compensation is
`performed after Summing the currents at node 406 from the
`voltage and current error amplifiers 402, 404. One disad
`Vantage of this topology is that the gain of the feedback
`loops is largely dependent upon the transconductance of
`NMOS transistors in the error amplifiers, which can vary
`Significantly with proceSS and temperature. Typically, cur
`rent through these NMOS transistors is made large to
`increase gain. This causes the output (driving) impedance of
`the amplifier to be low. Passive compensation components
`(for example, a capacitor) connected to the amplifier output
`are typically low reactance (large capacitance value, large
`physical size) and external to the integrated circuit. Another
`disadvantage of this topology is that the passive compensa
`tion network limits amplifier performance.
`
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`US 2005/0134220 A1
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`Jun. 23, 2005
`
`FIG. 5 illustrates a charger incorporating the prin
`0.025
`ciples of the invention. In FIG. 5, a DC-to-DC step-down
`converter 500 comprises an input stage 502, a compensation
`amplifier 504, an output stage 306, a sensing stage 308, a
`current reference 330, and a voltage reference 332, config
`ured as shown, to retain the advantages of active compen
`sation while requiring only a single, common compensation
`amplifier and a single, common Set of reactive elements, for
`reduced die Size and improved performance over the known
`art. For comparison purposes, like elements of FIGS. 3, 4
`and 5 are given like numbers.
`0026. The battery 328 to be charged requires a constant
`current (CC) during the first phase of charging (phase 202 in
`FIG. 2), and a constant voltage (CV) during the second
`phase of charging (phase 204 in FIG. 2). When the battery
`Voltage is below a certain desired target value equal to its
`fully-charged voltage 208, constant current 218 of a precise
`amount appropriate to the battery being charged is applied.
`When the battery voltage just exceeds this target value 208,
`a shift to constant voltage mode (204) occurs. The battery
`charger 500 thus determines which mode to use based on the
`voltage of the battery 328 it is charging. Means 308 for
`Sensing both the current flowing into the battery, and the
`Voltage applied to the battery, are therefore required. The
`Sensed values of current or Voltage are compared to preset
`reference levels 330,332 for each (appropriate to the battery
`being charged), and a feedback loop with high gain is used
`to drive the output current or Voltage to its desired target
`value.
`0027 Current flowing into the battery 328 is sensed by
`resistor 320 in the sensing stage 308. The current through
`resistor 320 is nearly equal to the current I
`flowing into
`the battery, since resistor 322 and input 528 to amplifier 530
`of input stage 502 both have very high impedance. The
`voltage drop across resistor 320 is therefore, by Ohm’s law,
`essentially equal to IBAT times the resistance of resistor
`32O.
`0028. During the CC mode of operation 202, the current
`flowing through resistor 320 and hence into battery 328 is
`accurately controlled. A voltage Vs acroSS resistor 320
`occurs when the current is at its target value. The Voltage
`acroSS resistor 320 increases as current deviates above the
`desired value, and decreases as current deviates below the
`desired value. The current regulation Set Voltage at Voltage
`Source 330 is Set to Vs and Serves, as previously
`described, to Subtract Vs from the Voltage acroSS resistor
`320 applied as an input to the amplifier 530. The differential
`voltage at input 526 and input 528 of amplifier 530 is thus
`near Zero when the current into the battery 328 is at its target
`value. Amplifier 530 then amplifies this error voltage so that
`relatively Small deviations in current away from the target
`value develop fairly large Voltage Swings at the output 532
`of amplifier 530.
`0029. Similarly, during CV mode 204, the voltage
`applied to the battery 328 at output 326 is controlled. As with
`the configurations of FIGS. 3 and 4, a series connection of
`resistor 322 and resistor 324, connected between the output
`326 and ground, together form a voltage divider in FIG. 5.
`The voltage from the common node between resistors 322,
`324 is applied as an input 546 to amplifier 534. Because the
`current into amplifier 534 at input 546 is negligible, this
`divider provides a fractional indication of the battery 328
`
`voltage to input 546 (the non-inverting input) of amplifier
`534. A reference Voltage V vs
`is applied at 332 as a
`reference voltage to input 548 (the inverting input) of
`amplifier 534.
`0030 The value of Vs is chosen so that a voltage
`V is present at input 546 of amplifier 534 when the
`desired target output voltage (208 in FIG. 2) is present at
`output 326. Voltage Source 332 generates a stable reference
`Voltage equal to this V vs, which is connected to input 548
`of amplifier 534. Thus, the differential input to amplifier 534
`is Zero when the Voltage at output 326 is at its target value
`for CV mode 204. Amplifier 534 then amplifies this error
`Voltage, So that Small deviations from the target value in
`Voltage at output 326 develop large Voltage Swings at the
`output 538 of amplifier 534.
`0031 Current and voltage error amplifiers 530 and 534
`can be chosen to have gain of typically 10 to 20 dB,
`amplifying respectively the errors in battery current (during
`CC mode 202) or output voltage (during CV mode 204). The
`error Voltage to be used at a given time, either from amplifier
`530 or amplifier 534, depends on whether the CC or CV
`mode is called for, as determined by the battery Voltage at
`output 326.
`0032) Output 532 of amplifier 530 and output 538 of
`amplifier 534 are provided as inputs to a signal Selection
`circuit 540. This circuit may be configured and adapted to
`function like an ideal diode “OR” circuit, to pass to an output
`542 the higher of the two voltages at its inputs 532,538.
`During the CC mode 202, the battery voltage is below the
`desired target; hence the voltage at output 538 of amplifier
`534 is near Zero. The charge current is driven to its target
`level, causing the differential input of amplifier 530 to be
`near zero, and the output 532 of amplifier 530 to be at
`whatever Voltage causes the desired target current in resistor
`320. Signal selector circuitry 540 then passes this voltage
`from input 532 to output 542, as it is the higher of the two
`Voltages. The Voltage at 542 thus Serves as an error Voltage,
`representing the difference between the desired current and
`the actual current, and can Swing over a wide range while
`remaining above the near-zero voltage at 538 from amplifier
`534.
`0033. During the CC mode 202, the battery voltage
`continues to rise according to the battery charging charac
`teristic curve (see 220 in FIG. 2), eventually nearing the
`desired fully-charged Voltage 208. AS it reaches this target
`voltage 208, the output 538 of amplifier 534 rises until it
`exceeds the output 532 of amplifier 530. When the output
`voltage from amplifier 534 exceeds that from amplifier 530,
`the output 538 of amplifier 534 dominates (is higher) and is
`passed through to the output 542 of Signal Selector circuitry
`540. At this time, error amplifier 534 takes control, reducing
`the charge current as needed (see 222 in FIG. 2) to maintain
`a constant Voltage 224 at output 326. AS Soon as the output
`current is reduced even slightly, the output 532 of amplifier
`530 falls to near Zero due to its now-negative differential
`input voltage, and the CV mode 204 is active.
`0034) The smooth transition from CC mode 202 to CV
`mode 204 is thereby advantageously handled automatically
`and in a Stable manner. Additionally, in the case where both
`Voltage and current parameters are above their respective
`target values, operation of the circuit correctly drives both
`downward until one or the other reaches its set point. This
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`US 2005/0134220 A1
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`Jun. 23, 2005
`
`behavior is important in the case, for example, where the
`load is a capacitor only, with no battery connected.
`0035. The error voltage 542 at the output of the signal
`selector circuitry 540, in either CC or CV mode, is further
`amplified and filtered in a compensation amplifier Stage 504
`which comprises an amplifier 554 and negative feedback
`elements 552 and 556 connected as shown. Elements 552
`and 556 are resistive and/or reactive components which set
`the gain and phase response of amplifier 504. If elements
`552 and 556 are resistive only, the frequency and phase
`response are essentially flat; if elements 552 and/or 556
`include capacitance or inductance, a non-flat response is
`achieved. Providing a control loop with a non-flat response
`can insure closed-loop Stability. The DC gain of the com
`pensation amplifier Stage 504 is advantageously Set, in
`conjunction with the gain of the input Stage 502, to cause a
`large error Voltage to be generated with even a very Small
`deviation from the desired target current (in CC mode 202)
`or target voltage (in CV mode 204). The amplitude and
`phase response of the compensation amplifier 504 is fre
`quency dependent and compensates for the phase shift in the
`output filter 318, providing system stability and rapid but
`controlled response to transients away from target current or
`Voltage.
`0.036 The single, common compensation amplifier 504
`as used in the illustrated embodiment of FIG. 5 has a
`Significant advantage over those prior art topologies which
`use two separate compensation amplifiers, especially when
`reactive components are used in each loop to tailor phase
`and frequency response. Some of these reactive components
`may be physically too large to be integrated. It is advanta
`geous to not only use a Single shared compensation ampli
`fier, but also to maximize the required reactance (hence
`minimizing capacitance value and physical size) needed to
`achieve the desired filtering, and minimize driving current.
`Gain accuracy of the compensation amplifier is also an
`important consideration, to provide consistency in operation
`from one device to the next. AS is well known, the gain of
`an integrated amplifier comprising MOS transistors varies
`widely, due to variations in the gain of individual transistors
`and process variations. One classic approach to reducing
`Such gain variation is the use of negative feedback around an
`amplifier with high open-loop gain. The gain of the amplifier
`with such feedback is essentially set by the ratio of the
`feedback reactance to the input reactance (reactance of 556
`divided by reactance of 552 in FIG. 5). This rationmetric
`feedback minimizes the impact on gain of amplifier varia
`tion. The prior-art transconductance amplifier typically has
`wide variation in parameters which Significantly affect over
`all response of the compensated amplifier. Also, the typical
`low output impedance of the transconductance amplifiers
`requires a lower reactance capacitor (higher value, larger
`physical size) than the equivalent compensation amplifier
`using rationetric feedback.
`0037. An active compensation network can use reactive
`elements (for example, capacitors) with much Smaller values
`(hence, physical size) than known passive topologies. This
`is because the input impedance of the amplifier 554 at input
`558 is very high, allowing high-value resistors in the case
`where element 552 is a resistor. When element 556 is a
`capacitor, the amplitude response of the compensation
`amplifier 504 decreases with increasing frequency (low-pass
`filter), while phase shift increases with increasing frequency.
`
`This resistor-capacitor integrator network is commonly used
`for low-pass filtering and phase response tailoring in a
`control System Such as the present disclosure.
`0038. The output of compensation amplifier 504 is con
`nected as an input to the inverting input of the PWM
`(pulse-width-modulation) comparator 350. The non-invert
`ing input of PWM comparator 350 is driven by a saw tooth
`ramp generator 310, with amplitude suitably chosen to be
`roughly equal to the Voltage Swing at output 560 of amplifier
`554. The output of PWM comparator 350 is therefore a
`Square wave which has a duty cycle directly related to the
`error voltage at output 560, and which ranges about from 0%
`to 100%. This square wave is buffered by driver 312, the
`output of which drives the gate of the power PMOS tran
`Sistor 314, which has its Source connected to the Supply
`voltage 346. As the battery current or voltage deviates from
`its nominal target value, the duty cycle of current flow in
`transistor 314 varies from (or from nearly) 0% to 100%.
`When transistor 314 is conducting, it provides current
`through output filter 318 and resistor 320 to the output 326
`(and hence to charge the battery 328). The amount of
`average current flowing into battery 328 is directly con
`trolled by the conducting duty cycle of transistor 314. When
`transistor 314 is turned off (non-conducting), diode 316
`provides a path for current to flow from ground to output
`filter 318.
`0039 The current pulses provided by transistor 314 are
`filtered by output filter 318, which is, in the example
`embodiment, a Series inductor driving a capacitor to ground.
`This filter greatly reduces the ripple current flowing from
`output 326, reducing the ripple Voltage impressed on the
`battery due to its internal impedance. The output of the
`output filter 318 is connected to the input of resistor 320.
`0040 Though not a requirement, the illustrated output
`filter 318 precedes the current sense resistor 320. The phase
`and frequency response of the output filter is therefore inside
`the current Sense control loop. This filter, in conjunction
`with the filter formed by feedback networks 556,552 around
`amplifier 554, thus provides a Second-order loop response in
`the CC mode 202. Because the voltage sense point at input
`546 is also after the output filter 318, a second-order
`response is achieved in CV mode 204, as well. Having the
`current Sense and Voltage Sense elements both after the
`output filter is another advantage of the disclosed embodi
`ment over known art. It allows optimization of the Single
`compensation amplifier for both CC and CV modes of
`operation.
`0041
`FIG. 6 illustrates an exemplary implementation
`600 of the input stage 502 (having both current and voltage
`error amplifiers) and compensation amplifier stage 504 of
`battery charger 500 of FIG. 5 using MOS integrated circuit
`techniques. For simplicity, FIG. 6 omits elements such as
`reference voltage generators 330, 332, output stage 306, and
`current and voltage sensing resistors 320, 322, 324, shown
`in FIG. 5 and which can be constructed in accordance with
`known techniques.
`0042. The differential voltage representing current,
`which goes to near-Zero when the output current is at its
`target value, connects to input 526 and input 528, connected
`to MOS transistors 612 and 614, respectively, in a current
`input stage 602. Transistors 612, 614 are configured as a
`differential pair, with a current Source 620 providing current
`
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`US 2005/0134220 A1
`
`Jun. 23, 2005
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`to the common Source node for transistors 612, 614. A
`current mirror comprising transistors 616, 618 causes the
`current in resistor 622 to equal that in transistor 612. The
`resulting Voltage at output 532 is an amplified version of the
`difference between the voltages at inputs 526, 528, with a
`nominal gain of suitably 10 to 20 dB.
`0043. Similarly, the differential voltage representing out
`put Voltage, which goes to near-Zero when the output Voltage
`is at its target value, is connected to inputs 546 and 548, then
`to MOS transistors 628 and 626, respectively, in a voltage
`input stage 604. Transistors 628, 626 are configured as a
`differential pair, with a current Source 634 providing current
`to the common Source node for transistors 628, 626. A
`current mirror comprising transistors 630, 632 causes the
`current in resistor 636 to equal that in transistor 630. The
`resulting voltage at output 538 is an amplified version of the
`difference between the voltages at inputs 546, 548, with a
`nominal gain of suitably 10 to 20 dB.
`0044 Signal selector circuitry 606 comprises a differen
`tial pair of transistors 640 and 642, whose sources are
`connected together and provided with current by a current
`Source 644, in a signal selector stage 606. Inputs 532 and
`538 are applied to the gates of transistors 640, 642, respec
`tively. Inputs 532, 538 are at a nominal voltage near mid
`Supply only when the differential inputs of the respective
`input stages 602 and 604 are near Zero volts. Inputs 532,538
`will both be near this nominal voltage at the transition from
`CC to CV mode. At other times, one of 532 and 538 will be
`at a relatively very low voltage, while the other will seek that