United States Patent (19)
`Bryson
`
`US006144187A
`Patent Number:
`11
`(45) Date of Patent:
`
`6,144,187
`Nov. 7, 2000
`
`54) POWER MEASUREMENT FOR ADAPTIVE
`BATTERY CHARGER
`
`75 Inventor: Steven W. Bryson, Cupertino, Calif.
`73 Assignee: Fairchild Semiconductor Corporation,
`South Portland, Me.
`21 Appl. No.: 09/352,437
`9
`22 Filed:
`Jul. 13, 1999
`Related U.S. Application Data
`Provisional application No. 60/108,274, Nov. 12, 1998.
`Int. Cl. ................................................... H02. 7700
`2) U.S. C. ...
`... 320/137; 320/164
`Field of Search ..................................... 320/137, 164,
`320/160, 161, 162, 163
`References Cited
`U.S. PATENT DOCUMENTS
`5,465,039 11/1995 Narita et al. ............................ 320/164
`
`56)
`
`5,600,230 2/1997 Dunstan .......................... 32O/DIG. 21
`5,698,964 12/1997 Kates et al. ............................. 320/164
`5,723,970 3/1998 Bell ......................................... 320/140
`OTHER PUBLICATIONS
`OMicro, OZ950–DS-1.05, “Smart Battery Charger Con
`troller”, Apr. 29, 1998, pp. 1-15.
`Primary Examiner Shawn Riley
`ASSistant Examiner-Lawrence Luk
`Attorney, Agent, or Firm Townsend and Townsend and
`Crew LLP
`ABSTRACT
`57
`A highly flexible adaptive battery charger circuit that opti
`mizes the efficiency of battery charging. The battery charger
`provides internal multiplier circuitry to measure input power
`allowing it to be used with AC adapters having different
`wattage. It further includes circuitry to digitally adjust
`threshold levels for the various control loops within the
`charger circuitry.
`
`20 Claims, 3 Drawing Sheets
`
`ACPOWER
`SOURCE
`
`AC
`ADAPTER
`
`-
`
`RS
`W
`
`1
`MP1
`A. E. go
`
`RS2
`W
`
`TO BATT.
`SEED
`
`ic
`
`100
`
`- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
`
`
`
`128
`
`--
`
`DC-DC CONV
`! N/
`116
`CONTROL
`! 102
`126
`- - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
`!
`l-
`122
`
`:
`
`:
`:
`
`--
`s
`118
`
`104 106
`
`IAA
`
`110
`
`-
`
`BATERY
`
`!
`
`!
`:
`}
`
`:
`:
`
`!
`
`:
`
`108
`
`14
`
`P
`DAC
`
`DAC
`
`W
`DAC
`
`130
`
`BUS
`NTRFC
`!
`LOGIC
`:
`- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
`
`112
`
`CONTROLLER
`
`-74
`
`Apple Inc. v. Qualcomm Incorporated
`IPR2018-01283
`Qualcomm Ex. 2002
`Page 1 of 9
`
`

`

`US. Patent
`
`Nov. 7, 2000
`
`Sheet 1 0f 3
`
`6,144,187
`
`Dm._.<EMn_O
`
`thm0%
`
`wO_>mD
`
`o:
`
`>mm._|_.<m_
`
`
`vmm omw
`
`www—
`
`ES.
`
`22E
`
`
`
`.>ZOO00100
`
`AOEHZOO
`
`9.5
`
`Curr—.2.
`
`0100..
`
`w:
`
`F.GE
`
`mmjoEzooV
`
`on:
`
`O<
`
`mmbu<0<
`
`mOmDOm
`
`mw>>0n_O<
`
`.2F
`
`Page 2 of 9
`
`Page 2 of 9
`
`
`
`

`

`U.S. Patent
`
`Nov. 7, 2000
`
`Sheet 2 of 3
`
`6,144,187
`
`BATERY
`VOLTAGE
`
`VO
`
`O
`
`I(RS2)
`
`FIG. 2
`
`202
`
`
`
`CLK
`
`N-
`
`N+
`
`CLKA CLKB
`LEVEL
`SHIFT
`
`FIG. 3
`
`-OUT
`
`Page 3 of 9
`
`

`

`U.S. Patent
`US. Patent
`
`Nov. 7, 2000
`Nov. 7,2000
`
`Sheet 3 of 3
`Sheet 3 0f3
`
`6,144,187
`6,144,187
`
`3.
`308
`
`s
`FIG.4
`
`Page 4 of 9
`
`I300
`
`l302
`
`l304
`
`2
`NM-
`
`REFIN.
`
`Page 4 of 9
`
`

`

`6,144,187
`
`1
`POWER MEASUREMENT FOR ADAPTIVE
`BATTERY CHARGER
`
`CROSS-REFERENCES TO RELATED
`APPLICATIONS
`This application is a Non-Provisional of Ser. No. 60/108,
`274, filed Nov. 12, 1998, and claims priority therefrom.
`
`2
`control loop adapted to couple to the battery to control
`current delivered to the battery at a Selected current magni
`tude, a power-control loop adapted to couple to the battery
`and the electronic device to control the power drawn by the
`charger circuit to a Selected power level; and a combine
`circuit configured to combine outputs of the Voltage-control
`loop, current-control loop and power-control loop, wherein,
`the power control loop includes a current Sense circuit
`having first and Second input terminals adapted to couple
`acroSS a current Sense resistor, a Voltage input terminal
`configured to monitor an input Supply Voltage, and a mul
`tiplier circuit having a first input coupled to an output of the
`current Sense circuit, a Second input coupled to the Voltage
`input terminal, and an output, the multiplier circuit being
`configured to generate at its output a signal representative of
`the power drawn from the charger circuit.
`In another embodiment, the present invention provides a
`method of charging a battery for a battery-operated elec
`tronic device, the method including the Steps of controlling
`the battery voltage to a Selected Voltage level; controlling
`current delivered to the battery to a Selected current mag
`nitude, controlling total input power to the battery and the
`battery-operated electronic device to a Selected power level,
`wherein the Step of controlling total input power includes the
`Steps of Sensing an amount of input current flowing to the
`battery and the electronic device, detecting an amount of
`input Voltage Supplied by a Source of power, and multiplying
`the Sensed input current with the detected input voltage to
`arrive at the total input power.
`Abetter understanding of the nature and advantages of the
`adaptive battery charging according to the present invention
`may be gained with reference to the following detailed
`description and the accompanying drawings.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a simplified system level block diagram of the
`battery charger according to one embodiment of the present
`invention;
`FIG. 2 illustrates the Voltage-current-power characteris
`tics of the battery charger of the present invention;
`FIG. 3 is a circuit diagram of an exemplary current Sense
`amplifier for use in the battery charger circuit of the present
`invention; and
`FIG. 4 is a circuit diagram of an exemplary analog
`multiplier for use in the input power monitoring loop of the
`present invention.
`
`BACKGROUND OF THE INVENTION
`The present invention relates in general to integrated
`circuits, and in particular to an input power measurement
`circuit for an adaptive battery charger.
`With the proliferation of battery operated portable elec
`tronic devices. the demand for Smaller and more efficient
`battery chargerS has increased. To extend the life of the
`battery it is desirable to charge the battery even when the
`electronic device (e.g., laptop computer) is active and draw
`ing power. One type of battery charger maximizes its
`efficiency by directing charge from the power Source to the
`battery when the electronic device is powered up and
`operating, and depending on the level of power demanded
`by the electronic device. To implement this type of adaptive
`battery charging requires an accurate measurement of the
`input power available to the portable device. Existing bat
`tery chargers, such as one described in U.S. Pat. No.
`5,698,964, assume a power source with a constant DC
`Voltage, and measure the input power by a simple Sensing of
`the input current. This technique, however, fails to address
`applications wherein the battery charger may be used in
`Systems with varying power Supply Voltage levels.
`Further, existing battery charger Systems use fixed thresh
`old levels to control the battery charging current and charg
`ing Voltage. New types of batteries Such as lithium ion
`batteries, however, have a variable charging cycle. That is,
`ideally a lithium battery is initially charged at a very fast rate
`up to e.g., 85-90%. Once it reaches that level, the charging
`must Slow down to avoid over charging and over heating of
`the battery. Existing battery chargers with fixed charging
`threshold levels cannot Support this type of variable charg
`ing.
`There is a need for a more efficient and flexible battery
`charging circuitry that can operate with varying power
`Supply Voltage levels.
`
`15
`
`25
`
`35
`
`40
`
`45
`
`SUMMARY OF THE INVENTION
`The present invention provides method and circuitry for
`accurately measuring the input power to a portable elec
`tronic device and its associated battery, to maximize battery
`charging efficiency. Broadly, the present invention provides
`a current Sense circuit that detects and measures the amount
`of current Supplied to the portable device, battery, a Voltage
`Sense circuit that detects the DC input Voltage level, and a
`multiplier circuit that calculates the total input power level.
`The circuit further includes digital decoders in the power
`loop to allow the charger to accommodate AC adapters with
`different power levels. Thus, the invention allows for adap
`tive battery charging even in those Systems that may have
`varying DC input voltage levels. The circuit further provides
`circuitry that allows a controller to programmably adjust the
`battery charging cycle.
`Accordingly, in one embodiment, the present invention
`provides a battery charger circuit for an electronic device
`operated by a battery, the circuit including a Voltage-control
`loop adapted to couple to the battery to control a voltage
`level of the battery to a Selected Voltage level; a current
`
`50
`
`55
`
`60
`
`65
`
`DESCRIPTION OF THE SPECIFIC
`EMBODIMENTS
`Referring to FIG. 1, there is shown a simplified system
`level block diagram of the battery charger according to one
`embodiment of the present invention. An AC adapter 100
`receives power from an AC Source and Supplies power to the
`System. A current Sense amplifier 102 has its inputs coupled
`acroSS a Sense resistor RS1 that is inserted along the current
`path between AC adapter 100 and both battery 110 and the
`battery operated electronic device (not shown). An output of
`current sense amplifier 102 is fed into one input of a
`multiplier 104 whose other input couples to the voltage
`output of AC adapter 100. Multiplier 104 multiplies a signal
`representing the sensed current drawn from adapter 100 by
`a signal representing the Voltage Supplied by adapter 100,
`and arrives at a total input power Signal at its output. The
`output of multiplier 104 connects to the negative input of an
`amplifier 106. A digital-to-analog converter P DAC 108 for
`
`Page 5 of 9
`
`

`

`3
`the power loop has its output connected to the positive input
`of amplifier 108. P DAC 108 receives digital inputs from
`controller 112 via bus interface logic 114. The combination
`of the input power measurement circuitry (current Sense
`amplifier 102 and multiplier 104) with amplifier 106 and
`P DAC 108 forms the power control loop within the battery
`charger circuit of the present invention.
`The battery charger circuit further includes a current
`control loop made up of amplifier 116 whose inputs couple
`acroSS a Second current Sense resistor RS2. The output of
`amplifier 116 Supplies a Signal representing the current
`delivered to the battery to the inverting input of amplifier
`118. A digital-to-analog converter I DAC 120 for the
`current loop has its output connected to the non-inverting
`input of amplifier 118. I DAC 120 receives digital inputs
`from controller 112 via bus interface logic 114. A voltage
`control loop includes amplifier 122 that receives the battery
`Voltage at its inverting input and the output of a digital-to
`analog converter V DAC 124 at its non-inverting input.
`V DAC 124 receives digital inputs from controller 112 via
`bus interface logic 114. A combine or “ORing” circuit 126
`receives all of the outputs of amplifiers 106, 118 and 122.
`The exemplary implementation for combine circuit 126
`includes three common-collector PNP bipolar transistors
`having their emitter terminal connected together and each
`having its base terminal connected to an output of a respec
`tive loop amplifier. The output of combine circuit 126 drives
`a pulse width modulated (PWM) DC-DC converter control
`circuit 128. PWM control circuit 128 supplies the control
`Signal to the gate terminal of power transistorS MP1 and
`MN1 that regulate the charging of the battery. While the
`circuit shows a PWM type control circuit, it is to be
`understood that other types of battery charger control circuit
`Such as those using hysteretic control and the like can be
`used.
`The operational overview of the battery charger circuit of
`the present invention is as follows. Depending on the State
`of the battery, the charger circuitry of the present invention
`controls at any time one of three parameters: battery voltage,
`battery current or total input power. If there is adequate
`power available from the charger, and if the battery has been
`discharged, the circuit output reaches the current control
`limit before the Voltage limit, causing the System to regulate
`current. AS the battery charges, the Voltage rises until the
`Voltage limit is reached, and the charger Switches to regu
`lating Voltage. On the other hand, if there is not enough
`power available for both the battery-operated electronic
`device and the battery charging, the circuit regulates charg
`ing current at Such a level as to respect the maximum power
`limit. When the voltage limit is reached, the charger will
`Similarly Switch to regulating Voltage. The circuit of the
`present invention operates Such that transitions from current
`to Voltage regulation, or from power to Voltage regulation,
`are performed automatically by the charger.
`FIG. 2 illustrates the Voltage-current-power characteris
`tics of the battery charger according to the present invention.
`The horizontal axis in the V-I-P diagram of FIG. 2 is current
`delivered to the battery and the vertical axis is the battery
`Voltage. The Voltage control loop monitors the battery to
`ensure that its Voltage is held at a Selected Voltage Set point
`(VO) as set by controller 112 via V DAC 124. The current
`control loop monitors current delivered to the battery to
`ensure that it regulates at a Selected current-limit Set point
`(IO) as set by controller 112 via I DAC 120. The power
`regulation loop monitors total input power, to both the
`battery and the battery-operated device, to ensure that total
`power drawn from the charger never exceeds a Selected
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`6,144,187
`
`4
`maximum power set point (PO) as set by control 112 via
`P DAC 108. Assuming that there is adequate power avail
`able from the charger, the current control loop is in control
`as long as the battery voltage is below V0. When the battery
`Voltage reaches V0, the current loop no longer regulates, and
`the Voltage control loop takes over. If on the other hand there
`is not adequate power available from the charger, the power
`control loop is in control, and limits the charging of the
`battery in order to guarantee enough power for the battery
`operated device. Thus, at all times, the adaptive charger
`circuitry according to the present invention makes the most
`efficient use of the available power depending on the needs
`of the battery and the battery-operated device.
`An advantageous feature of the adaptive battery charger
`of the present invention is its ability to vary the rate of
`battery charging during the charge cycle. This allows the
`charger circuit to operate with lithium-ion batteries that
`require a fast rate of charging up until the battery is charged
`to a large part of its capacity, and then a reduced rate of
`charging for the last portion. The circuit accomplishes this
`by the use of separate DACs for the three control loops. Each
`DAC sets the threshold voltage for the amplifier in each
`control loop. Controller 112 Supplies the digital control
`signal to each DAC that adjusts the loop threshold levels V0,
`I0, and P0. In case of the voltage control loop, the battery
`Voltage is fed to the non-inverting input of amplifier 122.
`The Voltage at the inverting input of amplifier 122 is Set by,
`e.g., an 8-bit V DAC 124. Controller 112 Supplies a charg
`ing Voltage CV command acroSS buS 130. The charging
`Voltage CV command may provide, for example, a 10 V
`offset, and 32 mV Steps, So that the charging Voltage can be
`anywhere from, e.g., 10 V to (10 V+232 mV)=18.16 V.
`Because a lithium-ion (Li') battery's typical per-cell voltage
`is 4.2V maximum. this exemplary charger would thus by
`best Suited for 3- and 4-cell batteries. It can also be used for
`several different cell counts with NiMH batteries.
`For the current control loop, amplifier 118 controls the
`battery current while the charger is regulating current. AS
`explained above, battery current is Sensed by monitoring the
`voltage across sense resistor RS2 with amplifier 116
`designed Such that it removes the common mode battery
`Voltage. The battery current is fed to the non-inverting input
`of amplifier 118. The voltage at the amplifier's inverting
`input is set by, e.g., an 8-bit I DAC 120, which is controlled
`by a charging current CI command Supplied by controller
`112. The charging current CI command may provide, for
`example, 32 mA Steps, So that the charging current can be
`anywhere from 0 A to 232 mA=8.16 A.
`In case of the power control loop, amplifier 106 controls
`the Systems total power consumption (ie..e., battery-operated
`device plus battery charging). Input voltage is monitored at
`the output of adapter 100, and input current is sensed by
`monitoring the Voltage acroSS Sense resistor RS1 with ampli
`fier 102 that is designed to remove the common mode input
`Voltage. A more detailed description of the design of current
`sense amplifier 102 is provided below in connection with
`FIG. 3. The Sensed input current and Sensed input voltage
`are then multiplied together with multiplier 104, and the
`result is fed to the non-inverting input of amplifier 106. An
`exemplary circuit implementation for an analog multiplier
`Suitable for use in the input power measurement circuit of
`the present invention will be described hereinafter in con
`nection with FIG. 4. The voltage at the inverting input of
`amplifier 10 is set by, e.g., a 4-bit P DAC 108, which is
`controlled by a charging power CP command Supplied by
`controller 112. The charging power CP command may
`provide, for example, a 25 W offset, and 5 W steps, so that
`
`Page 6 of 9
`
`

`

`6,144,187
`
`15
`
`25
`
`S
`the total power drawn can be anywhere from 25 W to (25
`W+15*5 W)=100 W. A sudden surge in power required by
`the battery-operated device may result in a momentary
`overload on AC adapter 100. This has no ill effects, however,
`because the power loop recovery time is designed to be
`much shorter than the adapter's thermal time constant, and
`the minimum adapter output Voltage equals the battery
`Voltage, which is Sufficient to run the battery-operated
`device.
`It is to be understood that the size of each DAC and the
`offset and Step values given herein for each control loop are
`for illustrative purposes only, and that those skilled in the art
`appreciate that different size DACs with different steps and
`offsets can be used to achieve the goals of the invention.
`Further, those skilled in the art will also appreciate that there
`are other various types of circuitry that can be used to adjust
`the control loop thresholds. For example, reprogrammable
`memory elements Such as electrically erasable program
`mable read only memory (EEPROM) cells can be used to
`program the desired threshold level for each loop in the
`circuit.
`The actual control of the battery charging is performed by
`pulse-width-modulated (PWM) DC-DC converter controller
`128. PWM control circuit 128 drives two external
`MOSFETs, an N-channel (MN1)and a P-channel (MP1),
`which Switch the voltage from the input source. This
`Switched voltage feeds an inductor L1, which filters the
`Switched rectangular wave. PWM control circuit 128 sets
`the pulse width of the Switched Voltage So that it Supplies the
`desired voltage or current to battery 110. PWM control
`circuit 128 includes a comparator (not shown) that compares
`the lowest of three input Signals from the three control loops
`with a ramp, to determine the pulse width of the Switched
`Signal, Setting the battery Voltage or current. When the
`current-sense amplifier is in control of the PWM, the PWM
`35
`comparator adjusts the duty cycle of the Switches, regulating
`the average battery current and keeping it proportional to the
`error Voltage. When the Voltage error amplifier is in control
`of the PWM, the PWM comparator adjusts the duty cycle of
`the Switches, regulating the battery Voltage and keeping it
`proportional to the error voltage. When the power error
`amplifier is in control of the PWM, the PWM comparator
`adjusts the duty cycle of the Switches, regulating the total
`power drawn from the charger. The loop determines whether
`the total power available from the wall adapter is sufficient
`to provide both the load and battery charging needs. If not,
`the charging power to the battery is reduced by the amount
`needed to keep the total demand within the AC-DC output
`power limit of the adapter. Those skilled in this art appre
`ciate that battery charging control techniques other than
`PWM (e.g., hysteretic control, etc.) can also be used in
`conjunction with the adaptive battery charging technique of
`the present invention.
`Another advantageous feature of the battery charger cir
`cuit of the present invention is its ability to operate with
`varying types of AC adapters. In measuring the total input
`power, instead of assuming a constant DC input voltage, the
`battery charger circuit of the present invention provides a
`multiplier to multiply the Sensed input current with whatever
`DC input voltage level that is supplied by AC adapter 100.
`60
`This enables the battery charger to operate with various AC
`adapters. e.g., 40 W, 50 W, or 75 W. Because of the large
`common mode signal at the output of adapter 100, current
`sense amplifier 102 and multiplier 104 are designed to
`accommodate this type of input signal. FIG. 3 shows an
`exemplary circuit implementation for current Sense ampli
`fier 102. A level shift circuit 200 receives the signals IN- and
`
`6
`IN+ from across sense resistor RS1. With the aid of non
`overlapping clock signals generated by clock generator 202,
`a Switched-capacitor circuit using high Voltage MOS tran
`sistors inside level shift circuit 200, commutates the high
`Voltage input from e. g., 20 volt range down to e.g., 5 volt
`range. The output of level shift circuit 200 is applied to a
`Switched-capacitor integrating differential amplifier 204.
`The output of integrating differential amplifier 204 is then
`applied to a sample and hold circuit 208 that extracts the
`current information from one phase of the clock. FIG. 4
`shows an exemplary circuit implementation for multiplier
`100. According to this embodiment, an analog multiplier is
`implemented by log amplifiers 300 and 302 respectively
`receiving the current input and the Voltage input. A third log
`amplifier 304 buffers a reference Voltage. A Summing ampli
`fier 306 receives the outputs of the three log amplifiers. The
`output of Summing amplifier 306 is then applied to an
`anti-log amplifier 308 to generate the final output.
`In conclusion, the present invention provides a highly
`flexible adaptive battery charger circuit that optimizes the
`efficiency of battery charging. The battery charger provides
`internal multiplier circuitry to measure input power allowing
`it to be used with AC adapters having different wattage. It
`further includes circuitry to digitally adjust threshold levels
`for the various control loops within the charger circuitry.
`While the above is a complete description of the preferred
`embodiment of the present invention, it is possible to use
`Various alternatives, modifications and equivalents.
`Therefore, the scope of the present invention should be
`determined not with reference to the above description but
`should, instead, be determined with reference to the
`appended claims, along with their full Scope of equivalents.
`What is claimed is:
`1. A battery charger circuit for an electronic device
`operated by a battery, the circuit comprising:
`a Voltage control loop adapted to couple to the battery to
`control a voltage level of the battery to a Selected
`Voltage level;
`a current control loop adapted to couple to the battery to
`control current delivered to the battery at a Selected
`current magnitude;
`a power control loop adapted to couple to the battery and
`the electronic device to control the power drawn by the
`charger circuit to a Selected power level; and
`a combine circuit configured to combine outputs of the
`Voltage control loop, current control loop and power
`control loop,
`wherein, the power control loop comprises:
`a current Sense circuit having first and Second input
`terminals adapted to couple acroSS a current Sense
`resistor,
`a Voltage input terminal configured to monitor an input
`Supply Voltage, and
`a multiplier circuit having a first input coupled to an
`output of the current Sense circuit, a Second input
`coupled to the Voltage input terminal, and an output, the
`multiplier circuit being configured to generate at its
`output a signal representative of the power draw from
`the charger circuit.
`2. A battery charger circuit for an electronic device
`operated by a battery, the circuit comprising:
`a Voltage control loop adapted to couple to the battery to
`control a voltage level of the battery to a Selected
`Voltage level;
`a current control loop adapted to couple to the battery to
`control current delivered to the battery at a Selected
`current magnitude;
`
`40
`
`45
`
`50
`
`55
`
`65
`
`Page 7 of 9
`
`

`

`6,144,187
`
`5
`
`25
`
`35
`
`40
`
`15
`
`7
`a power control loop adapted to couple to the battery and
`the electronic device to control the power drawn by the
`charger circuit to a Selected power level; and
`a combine circuit configured to combine outputs of the
`Voltage control loop, current control loop and power
`control loop,
`wherein, the power control loop comprises:
`a current Sense circuit having first and Second input
`terminals adapted to couple acroSS a current Sense
`resistor,
`a voltage input terminal configured to monitor an input
`Supply Voltage,
`a multiplier circuit having a first input coupled to an
`output of the current Sense circuit a Second input
`coupled to the Voltage input terminal and an output, the
`multiplier circuit being configured to generate at its
`output a signal representative of the power draw from
`the charger circuit;
`a first amplifier having a first input coupled to the
`output of the multiplier circuit, a Second input, and
`an output; and
`a first digital-to-analog converter having an output
`coupled to the Second input of the first amplifier and
`a plurality of inputs configured to receive digital
`power control Signal,
`wherein, the Selected power level is Set by the digital
`power control Signal.
`3. The battery charger circuit of claim 2 wherein the
`current control loop comprises:
`a Second amplifier having first and Second terminals
`adapted to couple acroSS a Second current Sense resis
`tor,
`a third amplifier having a first input coupled to an output
`of the Second amplifier; and
`a Second digital-to-analog converter having an output
`coupled to a Second input of the third amplifier, and a
`plurality of inputs configured to receive digital current
`control Signal,
`wherein, the Selected current magnitude is Set by the
`digital current control Signal.
`4. The battery charger circuit of claim 3 wherein the
`Voltage control loop comprises:
`a fourth amplifier having a first input adapted to be
`coupled to the battery, a Second input, and an output;
`and
`a third digital-to-analog converter having an output
`coupled to the Second input of the fourth amplifier and
`a plurality of inputs configured to receive digital Volt
`age control signal,
`wherein, the Selected Voltage level is Set by the digital
`Voltage control Signal.
`5. The battery charger circuit of claim 4 further compris
`ing a charger control circuit having an input coupled to an
`output of the combine circuit and an output coupled to
`control the battery voltage or current or input power.
`6. The battery charger circuit of claim 5 wherein the
`charger control circuit is a pulse-width-modulated DC-DC
`converter controller configured to compare the output of the
`combine circuit with a ramping Signal.
`7. The battery charger circuit of claim 6 wherein the
`combine circuit comprises circuitry configured to perform a
`logical OR function.
`8. The battery charger circuit of claim 7 wherein the
`circuitry configured to perform a logical OR function com
`65
`prises three common-collector bipolar transistors having
`their emitter terminal coupled together, and each having a
`
`45
`
`50
`
`55
`
`60
`
`8
`base terminal coupled to respective output of first, third and
`fourth amplifiers.
`9. The battery charger circuit of claim 4 wherein the first
`digital-to-analog converter (DAC)is a 4-bit DAC, and the
`Second and third digital-to-analog converters are each 8-bit
`DACS.
`10. The battery charger circuit of claim 1 wherein the
`multiplier circuit comprises an analog multiplier circuit
`comprising:
`a first log amplifier having an input coupled to receive the
`output of the current Sense circuit;
`a Second log amplifier having an input coupled to receive
`the input Supply Voltage;
`a Summing amplifier having a first input coupled to an
`output of the first log amplifier, and a Second input
`coupled to an output of the Second log amplifier; and
`an anti-log amplifier having an input coupled to an output
`of the Summing amplifier.
`11. The battery charger circuit of claim 10 wherein the
`current Sense circuit comprises:
`a level shift circuit having first and Second inputs coupled
`to receive a current Signal acroSS the current Sense
`resistor, the level shift circuit being configured to
`reduce a high Voltage common mode component of the
`current Signal to a lower Voltage, and
`an integrating differential amplifier coupled to the level
`shift circuit.
`12. The battery charger of claim 11 wherein the level shift
`circuit comprises Switched-capacitor circuitry configured to
`commutate the high Voltage common mode component of
`the current Signal to the lower Voltage in response to
`non-overlapping clock signals.
`13. The battery charger of claim 12 wherein the current
`Sense circuit further comprises a Sample and hold circuit
`coupled to the integrating differential amplifier.
`14. An adaptive battery charger circuit comprising:
`a current control loop having an amplifier with a first input
`coupled to a signal representing battery current and a
`Second input coupled to an output of a digital-to-analog
`converter,
`a voltage control loop having an amplifier with a first
`input coupled to a signal representing battery Voltage
`and a Second input coupled to an output of a digital
`to-analog converter; and
`a power control loop having an amplifier with a first input
`coupled to a signal representing input power and a
`Second input coupled to an output of a digital-to-analog
`COnVerter.
`15. The adaptive battery charger circuit of claim 14
`further comprising:
`a combine circuit configured to combine outputs of the
`current control loop, Voltage control loop and power
`control loop; and
`a charger control circuit having an input coupled to the
`combine circuit and an output coupled to battery
`charging circuitry.
`16. The adaptive battery charger circuit of claim 15
`wherein each digital-to-analog converter Sets a threshold
`level for its respective control loop in response to a digital
`control Signal from a System controller.
`17. A method of charging a battery for a battery-operated
`device, comprising the Steps of:
`Sensing an input current Supplied by a power Supply
`SOurce,
`Sensing an input voltage Supplied by a power Supply
`SOurce,
`
`Page 8 of 9
`
`

`

`6,144,187
`
`1O
`
`15
`
`9
`calculating an input power by multiplying the Sensed
`input current with the Sensed input Voltage;
`detecting a magnitude of current being delivered to the
`battery;
`detecting a voltage level of the battery; and
`varying an amount of charge being Supplied to the
`battery in response to the charging needs of the
`battery and the power needs of the battery-operated
`device.
`18. The method of claim 17 wherein the step of varying
`comprises the Steps of:
`regulating the magnitude of current being delivered to the
`battery as long as the Voltage level of the battery is
`below a Selected level, and the calculated input power
`is below a maximum level;
`regulating the Voltage level of the battery when the
`voltage level of the battery reaches the selected level,
`and as long as the calculated input power is below the
`maximum level; and
`limiting the amount of charge being Supplied to the
`battery when the calculated input power reaches the
`maximum level.
`19. A battery charging System for a battery-operated
`device, comprising:
`an AC adapter configured to convert an AC power Signal
`to a DC power Signal; and
`an adaptive battery charger circuit coupled to the AC
`adapter, the charger circuit comprising:
`a power control loop configu