United States Patent (19)
`Balakrishnan
`
`USOO5737152A
`11) Patent Number:
`(45) Date of Patent:
`
`5,737,152
`Apr. 7, 1998
`
`54 SUSPENSION WITH MULTI-LAYERED
`INTEGRATED CONDUCTOR TRACE ARRAY
`FOR OPTIMIZED ELECTRICAL
`PARAMETERS
`
`Inventor: Arun Balakrishnan, Fremont, Calif.
`75
`73) Assignee: Quantum Corporation, Milpitas, Calif.
`
`(21 Appl. No.: 720,833
`22 Filed:
`Oct. 3, 1996
`G11BS/48
`(51) Int. Cl. ...
`52 U.S. C. ........................................................... 360/104
`58) Field of Search .................................... 360/103-106,
`360/108
`
`56
`
`References Cited
`U.S. PATENT DOCUMENTS
`4,761,699 8/1988 Ainslie et al. .......................... 360/103
`4,819,094 4/1989 Oberg..................
`... 360/104
`4,996,623 2/1991 Erpelding et al.
`..., 360/104
`5,001583 3/1991 Matsuzaki .......
`... 360/104
`5,006,946 4/1991 Matsuzaki ...
`... 360/104
`5,034,091
`7/1991 Trasket al. .
`156/643
`5,196,377 3/1993 Wagner et al. .
`437/225
`5,231,756 8/1993 Tokita et al. ........
`29,830
`5,391842 2/1995 Benninet al. ......
`174/260
`5,473.488 12/1995 Gustafson et al...
`... 360/104
`5,49597 2/1996 Bennin et al. .......................... 360/04
`
`5,519,552 5/1996 Kohira et al. ........................... 360/104
`5,528,819 6/1996 McKay et al.
`... 36004
`5,530,604 6/1996 Pattanaik ......
`... 360/104
`5.539,596 7/1996 Fontana et al. ...
`... 360,06
`5,597.496
`1/1997 Masaichi et al. ....................... 360/104
`OTHER PUBLICATIONS
`Excerpt, Dorf, Ed., The Electrical Engineering Handbook,
`CRC Press, Boca Raton, FL. O.1993, pp. 884–885.
`Primary Examiner-Jefferson Evans
`Attorney, Agent, or Firm-David B. Harrison; Debra A.
`Chun
`ABSTRACT
`57
`A head suspension has an integrated multi-layer trace con
`ductor array for supporting and electrically interconnecting
`a read/write head to electronic circuitry in a disk drive. The
`electrical micro strip transmission line characteristics of the
`conductor array is controlled by the selective placement and
`connection of the trace paths within the multiple layers in
`order to control and balance electrical parameters including
`array inductance, inter-trace capacitance, and trace capaci
`tance to a ground plane. The ground plane may further
`comprise a solid sheet of material or an arrangement of
`grounded traces disposed in proximity to signal-carrying
`traces of the micro strip transmission line in order to control
`and obtain desired electrical characteristics.
`
`11 Claims, 6 Drawing Sheets
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`Isa
`as 7
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`se-6-e GD-CD-e- se
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`U.S. Patent
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`Apr. 7, 1998
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`Sheet 1 of 6
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`5,737,152
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`U.S. Patent
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`Apr. 7, 1998
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`Sheet 2 of 6
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`5,737,152
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`Ées
`Y st 9t
`Yaz a A1
`EY V S VV VM
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`HSN
`bt
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`, DELECTRIC
`GROUND PLANE (STEEL)
`FIG. -3B
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`U.S. Patent
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`Apr. 7, 1998
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`Sheet 4 of 6
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`5,737,152
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`62
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`27
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`62
`X
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`27
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`0
`-60
`FIG. - 4A
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`0
`FIG. - 4B
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`-60
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`CAPACITANCE, pF
`
`FIG. -5A
`
`CAPACITANCE AND INDUCTANCE
`WS. CONDUCTOR OVERLAP
`
`15
`
`O
`
`5
`O
`-20
`O
`20
`40
`60
`CONDUCTOR OVERLAP, MICRONS
`CAPACITANCE AND INDUCTANCE
`WS. CONDUCTOR OVERLAP
`
`30
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`80
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`INDUCTANCE, in
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`20
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`10
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`O
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`FIC. -6B
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`CHARACTERISTIC
`MPEDANCE,
`OHMS
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`140
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`120
`100
`BO
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`60
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`-20
`
`O
`20
`40
`60
`CONDUCTOR OVERLAP, MICRONS
`CHARACTERISTIC MPEDANCE WS. CONDUCTOR
`OVERLAP IN TWO-LAYER GEOMETRY
`--- - - - - -- m M --
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`8O
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`-
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`-
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`100
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`100
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`40
`20 -20
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`FI G. -5 C
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`O
`20
`40
`60
`CONDUCTOR OVERLAP, MICRONS
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`80
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`100
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`U.S. Patent
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`Apr. 7, 1998
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`Sheet 5 of 6
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`5,737,152
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`FIG. -6
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`VARATION IN CIRCUIT PARAMETERS
`WITH NO OF PARALLEL CONDUCTORS
`
`
`
`RESISTANCE (OHMS)
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`FIG. same 7A
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`NO OF PARALLEL CONDUCTORS
`
`
`
`VARATION IN CIRCUIT PARAMETERS
`WITH NO. OF PARALLEL CONDUCTORS
`
`1
`FI C. th 7B
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`NO. OF PARALLEL CONDUCTORS
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`
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`VARATION IN CIRCUIT PARAMETERS
`WITH NO, OF PARALLE CONDUCTORS
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`CAPACITANCE (pf)
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`FIC. me 7C
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`NO. OF PARALLEL CONDUCTORS
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`U.S. Patent
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`Apr. 7, 1998
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`Sheet 6 of 6
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`5,737,152
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`DIELECTRIC (POLYIMIDE)
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`DIELECTRIC (POLYIMIDE)
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`1.
`SUSPENSION WITH MULTI-LAYERED
`NTEGRATED CONDUCTOR TRACE ARRAY
`FOR OPTIMIZED ELECTRICAL
`PARAMETERS
`
`REFERENCE TO RELATED APPLICATION
`This is related to copending U.S. patent application Ser.
`No. 08/720,836 filed on Oct. 3, 1996, which is a
`continuation-in-part of U.S. patent application Ser. No.
`08/621431, filed on Mar. 25, 1996, the disclosure thereof
`being incorporated herein by reference, and which claims
`the benefit of Provisional Application No. 60/008.028 filed
`Oct. 27, 1995.
`
`FELD OF THE INVENTON
`This invention relates generally to structure and method
`for controlling electrical impedance characteristics of a trace
`conductor array formed integrally with a flexure of a head
`suspension assembly. More particularly, the present inven
`tion relates to an integrated suspension and conductor struc
`ture wherein the suspension traces are arranged and config
`ured in multiple layers so as to obtain, tune and control
`electrical parameters, particularly inductance and/or capaci
`tance,
`
`BACKGROUND OF THE ENVENTON
`Contemporary disk drives typically include a rotating
`rigid storage disk and ahead positioner for positioning a data
`transducer at different radial locations relative to the axis of
`rotation of the disk, thereby defining numerous concentric
`data storage tracks on each recording surface of the disk. The
`head positioner is typically referred to as an actuator,
`Although numerous actuator structures are known in the art,
`in-line rotary voice coil actuators are now most frequently
`employed due to their simplicity, high performance, and
`their ability to be mass balanced about their axis of rotation,
`the latter being important for making the actuator less
`sensitive to perturbations. A closed-loop servo system within
`the disk drive is conventionally employed to operate the
`voice coil actuator and thereby position the heads with
`respect to the disk surface.
`An air bearing surface supports the transducer at a small
`distance away from the surface of the moving medium.
`Single writefread element designs typically require two wire
`connections while dual designs having separate reader and
`writer elements require four wire connections. Magnetore
`sistive (MR) heads in particular generally require four wires.
`The combination of an air bearing slider and a read/write
`transducer is also known as a read/write head or a recording
`head.
`Sliders are generally mounted to a gimbaled flexure
`structure attached to the distal end of a suspension's load
`beam structure. A spring biases the load beam and the head
`towards the disk, while the air pressure beneath the head
`pushes the head away from the disk. An equilibrium distance
`defines an "air bearing” and determines the "flying height"
`of the head. By utilizing an air bearing to support the head
`away from the disk surface, the head operates in a hydro
`dynamically lubricated regime at the head/disk interface
`rather than in a boundary lubricated regime. The air bearing
`maintains a spacing between the transducer and the medium
`which reduces transducer efficiency. However, the avoid
`ance of direct contact vastly improves the reliability and
`useful life of the head and disk components. Demand for
`increased areal densities may nonetheless require that heads
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`2
`be operated in pseudo contact or even boundary lubricated
`contact regimes, however.
`Currently, flying heights are on the order of 0.5 to 2
`microinches. The magnetic storage density increases as the
`head approaches the storage surface of the disk. Thus, a very
`low flying height is traded against device reliability over a
`reasonable service life of the disk drive. At the same time,
`data transfer rates to and from the storage surface are
`increasing; and, data rates approaching 200 megabits per
`second are within practical contemplation.
`O
`The disk drive industry has been progressively decreasing
`the size and mass of the slider structures in order to reduce
`the moving mass of the actuator assembly and to permit
`closer operation of the transducer to the disk surface. the
`former giving rise to improved seek performance and the
`latter giving rise to improved transducer efficiency that can
`then be traded for higher areal density. The size (and
`therefore mass) of a slider is usually characterized with
`reference to a so-called standard 100% slider (“minislider").
`The terms 70%, 50%, and 30% slider ("microslider",
`"nanoslider"and "picoslider", respectively) therefore refer
`to more recent low mass sliders that have linear dimensions
`that are scaled by the applicable percentage relative to the
`linear dimensions of a standard minislider. Smaller slider
`structures generally require more compliant gimbals, hence
`the intrinsic stiffness of the conductor wires attached to the
`slider can give rise to a significant undesired bias effect.
`To reduce the effects of this intrinsic wire stiffness or bias.
`integrated flexure/conductor structures have been proposed
`which effectively integrate the wires with an insulating
`flexible polymeric resinous flexure such that the conductors
`are exposed at bonding pads positioned at the distal end of
`the flexure in the proximity of the head. U.S. Pat. No.
`5.006,946 to Matsuzaki discloses an example of such a
`configuration. U.S. Pat. No. 5,491,597 to Bennin et al.
`discloses a further example in point. While such wiring
`configurations do enjoy certain performance and assembly
`advantages, the introduction of the disclosed flexible poly
`meric resinous material in the flexure and gimbal structure
`raises a number of challenging design issues. For example,
`the thermal expansion properties of the resinous material is
`not the same as the prior art stainless steel structures; and,
`the long-term durability of such resinous structures, includ
`ing any requisite adhesive layers, is unknown. Therefore,
`hybrid stainless steel flexure and conductor structures have
`been proposed which incorporate most of the benefits of the
`integrated conductor flex-circuit flexure structures while
`remaining largely compatible with prior art fabrication and
`load beam attachment methods. Such hybrid designs typi
`cally employ stainless steel flexures having deposited insu
`lating and conductive trace layers for electrical interconnec
`tion of the head to the associated drive electronics, e.g., a
`proximately located preamplifier chip and downstream read
`channel circuitry typically carried on a circuit board (along
`with other circuitry) attached to the head/disk assembly.
`As taught by U.S. Pat. No. 5.491,597 to Bennin et al.,
`entitled: "Gimbal Flexure and Electrical Interconnect
`Assembly", the disclosed prior approach called for use of a
`spring material for the conductive trace layers, such as
`beryllium-copper alloy, which admittedly has higher elec
`trical resistance than pure annealed copper, for example. On
`the other hand, pure annealed copper, while a satisfactory
`electrical conductor at high frequencies, also manifests high
`ductility rather than spring-like mechanical resilience, and
`therefore lacks certain mechanical spring properties desired
`in the interconnect trace material. Traces formed of pure
`copper plated or deposited onto e.g. a nickel base layer
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`provide one alternative to the beryllium-copper alloy relied
`upon by the Bennin et al. approach.
`These hybrid flexure designs employ relatively lengthy
`runs of conductor trace pairs or four-wire sets which extend
`from bonding pads at the distal, head-mounting end of the
`flexure to the proximal end of the flexure, to provide a
`conductive path from the read/write head along the length of
`the associated suspension structure to the preamplifier or
`read-channel chip(s). Because the conductor traces are posi
`tioned extremely close to, but electrically isolated from, the
`conductive stainless steel flexure structure which is in turn
`grounded to the load beam, and because of the relatively
`high signal rates being transferred, the conductor trace
`inductance and mutual coupling, as well as conductor trace
`resistance and trace capacitance to ground, can give rise to
`unwanted signal reflections, distortion, and inefficient
`signal/power transfer. The unwanted signal reflections tend
`to deleteriously affect the performance of the read/write
`head, interconnect structure, and driver?preamplifier circuit.
`Micro strip line technology teaches that the loop and
`inter-conductor capacitance may be changed by changing
`the dimensions of and/or spacing between micro strips
`forming a transmission line. However, in the case of inte
`grated trace array wiring schemes for use with head suspen
`sion load beams, the dimensions of the conductors are
`governed by mechanical constraints including the space
`available on the flexure for the trace interconnect array, and
`the trace conductor dimensions cannot be changed very
`much insofar as impedance matching or tuning is concerned.
`While the Bennin et al. 597 patent discussed above
`includes an embodiment of FIGS. 6-8 calling for stacking of
`traces to form a multi-level array of trace sets, there is no
`teaching of using conductor traces arranged in multi-level
`arrays in order to obtain desired electrical parameters, such
`as capacitance and/or inductance, for example.
`The invention to be described provides, inter alia, a
`flexure for a suspension in a disk drive which includes a
`multiple layered integrated conductor array having reduced
`resistance and controllably tuned inductance and capaci
`tance parameters in order to improve trace array electrical
`performance.
`SUMMARY OF THE INVENTION WITH
`OBJECTS
`A general object of the present invention is to provide a
`low-profile, robust and reliable high performance suspen
`sion assembly having a multi-layered integral conductor
`trace array for electrically interconnecting a read/write head
`to associated read/write circuitry which overcomes limita
`tions and drawbacks of the prior art.
`Another general object of the present invention is to
`provide an integrated suspension and conductor structure
`having controlled multiple layer trace geometries relative to
`a ground plane in a manner achieving improved micro-strip
`signal transmission line characteristics thereby overcoming
`limitations and drawbacks of the prior art.
`A more specific object of the present invention is to
`provide a method for reducing resistance, and for controlling
`capacitance, mutual inductance and overall impedance of an
`integrated flexure/multi-layered conductor structure for use
`with a read/write head in a disk drive.
`Still another object of the present invention is to provide
`an integrated flexure and multi-layer conductor trace array
`providing separate optimization of capacitance and induc
`tance of the conductors of both the read and the write
`elements of a dual-element read/write head.
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`Another object of the present invention is to provide an
`improved suspension and multi-layer conductor trace array
`for supporting and electrically connecting to read/write head
`elements carried on a slider in a hard disk drive.
`A suspension assembly in accordance with principles of
`the present invention includes a flexure having a multiple
`layer integrated trace conductor array along the flexure. The
`multi-layer conductor traces replace prior art discrete
`twisted wire pairs which would normally extend along the
`length of the associated suspension. The conductor trace
`geometry and relative location in a multiple layer trace array
`relative to the flexure ground plane and to other traces
`enables control of inter-trace capacitance, balance of trace
`capacitance to ground, and reduction of trace inductance
`parameters over other approaches, thereby enabling a par
`ticular electrical parameter to be effectively tuned to achieve
`a desired operating condition. The invention provides
`improved electrical performance in a multi-layer trace con
`ductor array without materially altering suspension design or
`adversely affecting the suspension's mechanical perfor
`aC.
`In one preferred form, an integrated flexure/conductor
`structure supports a read/write head adjacent to a storage
`medium and electrically interconnects the head to read/write
`circuitry. In this approach the flexure/conductor structure
`includes a generally planar conductive flexure member
`having a gimbal for supporting the read/write head. A first
`electrical insulation layer is formed on the flexure member.
`A first electrical trace path is formed on the first electrical
`insulation layer. A second electrical insulation layer is
`formed on the first electrical trace path. A second electrical
`trace pathis formed on the second electrical insulation layer.
`In this approach the second electrical trace path is laterally
`offset relative to the first electrical trace path in order to
`control and reduce inter-trace electrode capacitance, while
`minimizing increase in inductance of the trace array.
`In an alternative preferred form, an integrated load beam
`assembly supports a read/write head/slider assembly adja
`cent to a storage medium and electrically interconnects the
`head to read/write circuitry. The load beam assembly com
`prises a generally planar conductive member extending to
`proximity of the read/write head/slider assembly; a first
`electrical insulation layer disposed on the conductive mem
`ber; at least one electrical trace path disposed on the first
`electrical insulation layer; and, a ground plane structure
`connected to the generally planar conductive member and
`disposed in overlying and surrounding relation, and spaced
`away from the at least one electrical trace path to form a
`multi-layer shielded transmission line structure.
`In another preferred form, an integrated flexure/conductor
`structure supports a read/write head/slider assembly adja
`cent to a storage medium and electrically interconnects the
`head to read/write circuitry. In this approach the flexure?
`conductor structure also comprises a generally planar con
`ductive flexure member having a gimbal for supporting the
`read/write head/slider assembly. A first electrical insulation
`layer is formed on the flexure member. First and second
`electrical trace paths are formed on the first electrical
`insulation layer. A second electrical insulation layer is
`formed on the first and second electrical trace paths. Third
`and fourth electrical trace paths are formed on the second
`electrical insulation layer. The third and fourth electrical
`trace path are laterally offset relative to each other and are
`longitudinally aligned with and overlying respectively the
`first and second electrical trace paths; and, the first electrical
`trace path is connected in parallel with the fourth electrical
`trace path, and the second electrical trace path is connected
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`5
`in parallel with the third electrical trace path, thereby
`equalizing trace path capacitance to a ground plane provided
`by the flexure member.
`In a further preferred form, an integrated flexure/
`conductor structure supports a read/write head/slider assem
`bly adjacent to a storage medium and electrically intercon
`nects the head to read/write circuitry. The flexure/conductor
`structure comprises a generally planar conductive flexure
`member having a gimbal for supporting the read/write
`head/slider assembly. A first electrical insulation layer is
`disposed on the flexure member. First and second electrical
`trace paths are disposed on the first electrical insulation layer
`in a laterally spaced apart relation. A second electrical
`insulation layer is disposed on the first and second electrical
`trace paths. Third and fourth electrical trace paths are
`disposed on the second electrical insulation layer in a
`laterally spaced apart relation. A third electrical insulation
`layer is disposed on the third and fourth electrical trace
`paths. Fifth and sixth electrical trace paths are disposed on
`the third electrical insulation layer in a laterally spaced apart
`relation. In this arrangement the first, third and fifth electri
`cal trace paths are longitudinally and laterally aligned rela
`tive to each other and are electrically connected in parallel
`to form a supply path, while the second, fourth and sixth
`electrical trace paths are longitudinally and laterally aligned
`relative to each other and are also connected in parallel to
`form a return path, thereby reducing inductance without
`Substantially increasing inter-electrode capacitance between
`the supply path and the return path. Other trace paths and
`layers may be added to this structure in order further to
`reduce trace array inductance.
`These and other objects, advantages, aspects, and features
`of the present invention will be more fully appreciated and
`understood upon consideration of the following detailed
`description of preferred embodiments presented in conjunc
`tion with the accompanying drawings.
`BRIEF DESCRIPTION OF THE DRAWTINGS
`In the Drawings:
`FIG. 1 is an enlarged, diagrammatic plan view of a disk
`drive including a suspension assembly having a multi-layer
`conductive trace array incorporating principles of the
`present invention.
`FIG. 2 is an enlarged diagrammatic plan view of a first
`preferred embodiment of integrated flexure/conductor load
`beam structure having tuned conductive traces in accordance
`with principles of the present invention.
`FIG. 3 is an enlarged plan view of a flexure of the FIG.
`2 load beam structure having integral wiring incorporating
`the tuned conductive trace array.
`FIG. 3A is a greatly enlarged plan view of a read/write
`head connection region of the FIG. 3 flexure trace array and
`wherein the head slider is shown in dashed line outline.
`FIG. 3B is a greatly enlarged view in elevation and
`cross-section taken along section line 3B-3B in FIG. 3.
`FIG. 3C is a greatly enlarged view in perspective of a
`slider end of the FIG. 2 load beam structure showing the
`slider attached to the flexure gimbal, and showing electrical
`gold ball connections between the flexure trace array and the
`read/write head connection pads of the slider.
`FIG. 4A is a greatly enlarged diagrammatic view in
`elevation and cross section of an embodiment of the inven
`tion alternative to the one shown in FIG. 3B, showing the
`traces to be laterally offset in order to tune inductance and
`inter-trace capacitance parameters.
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`FIG. 4B is a variant trace geometry of the FIG. 4A
`embodiment, showing the traces fully displaced laterally so
`that there is no actual overlap between the traces of the
`plural trace layers.
`FIG. 4C is an enlarged diagrammatic view in elevation
`and cross section of another embodiment of the invention
`which is similar to the embodiment of FIGS. 4A and 4B,
`with the signal paths being formed as a series of interleaved
`and offset traces.
`FIG. 5A is a graph of data plotting inter-conductor capaci
`tance as a function of controlled trace overlap as shown in
`FIGS. 4A and 4.B.
`FIG. 5B is a graph of data plotting trace inductance as a
`function of controlled trace overlap as shown in FIGS. 4A
`and 4.B.
`FIG.SC is a graph of data plotting characteristic imped
`ance of the micro-strip transmission line of FIGS. 4A and 4B
`as a function of trace conductor overlap in a two-layer
`geometry.
`FIG. 6 is a greatly enlarged diagrammatic view in eleva
`tion and cross section of another embodiment of the inven
`tion alternative to the ones shown in FIG. 3B and FIGS. 4A
`and 4.B. In this embodiment the multiple layers of traces
`include multiple layers of dielectric films between trace
`layers.
`FIG. 7A is a graph of data plotting resistance as a function
`of the number of parallel trace conductors in a trace array of
`the type shown in FIG. 6.
`FIG. 7B is a graph of data plotting inductance as a
`function of the number of parallel trace conductors in a trace
`array of the type shown in FIG. 6.
`FIG. 7C is a graph of data plotting capacitance as a
`function of the number of parallel trace conductors in a trace
`array of the type shown in FIG. 6.
`FIG. 8 is a greatly enlarged diagrammatic view in eleva
`tion and cross section of a further embodiment of the
`invention alternative to the embodiments of FIGS. 3B,
`4A-B and 6, wherein trace conductor parallel path pairs are
`laterally spaced and aligned with second parallel path pairs
`in order to equalize capacitance to the flexure substrate.
`FIG. 9 is a greatly enlarged diagrammatic view in eleva
`tion and cross section of yet another self-shielding embodi
`ment of the invention alternative to the one shown in FIG.
`3B, wherein the traces are shown in a middle layer of a
`multiple layer trace array and wherein lower and upper
`traces forma Faraday (electrostatic) shield around the active
`service loop trace pairs.
`DETALED DESCRIPTION OF PREFERRED
`EMBODMENTS
`Referring to the drawings, where like characters designate
`like or corresponding parts throughout the views, FIG. 1
`presents a diagrammatic top plan view of a headidisk
`assembly (HDA) of a hard disk drive 30. The hard disk drive
`30 employs at least one load beam assembly 10 having a
`flexure 14 including a trace interconnect array 16 as a first
`preferred embodiment of the present invention. FIG. 1
`shows the load beam assembly 10 with the flexure 14 and
`trace interconnect array 16 employed within its intended
`operating environment.
`In the present example disk drive 30 includes e.g. a rigid
`base 32 supporting a spindle 34 (and spindle motor, not
`shown) for rotating at least one storage disk36 in a direction
`shown by the curved arrow. Drive 30 also includes a rotary
`actuator assembly 40 rotationally mounted to the base 32 at
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`a pivot point 35. The actuator assembly 40 includes a voice
`coil 42 which, when selectively energized by control cir
`cuitry (not shown), moves and thereby positions an actuator
`E-block 44 and head arms 46 (and load beam assemblies 10)
`at radial track positions defined on the facing surfaces of
`storage disks 36. At least one of the load beam assemblies
`10 is secured at its proximal end 17 to a distal end of a head
`arm 46, e.g. by conventional ball-swaging techniques.
`Conventionally, but not necessarily, two load beam
`assemblies 10 are attached to head arms 46 between disks
`36; and, one load beam structure 10 is attached to head arms
`above and below the uppermost and lowermost disks of a
`disk stack comprised of multiple disks 36 spaced apart on
`spindle 34. The interconnect structure 16 connects to a
`flexible trace/film segment 50 which extends to a ceramic
`hybrid circuit substrate 52 secured to a side of the E-block
`44. The ceramic hybrid circuit 52 secures and connects a
`semiconductor chip 54 forming a read preamplifier/write
`driver circuit. Most preferably, the chip 54 is nested between
`the ceramic substrate of the hybrid circuit 52 and the E-block
`sidewall, and is secured to the sidewall by a suitable
`conductive adhesive or thermal transfer compound such that
`heat generated during operation of the chip 54 is dissipated
`into the E-block by conduction, and outwardly into the
`ambient air volume by convection.
`As shown in FIGS. 2, 3, 3A, 3B and 3C, the load beam
`assembly 10 includes a generally planar formed stainless
`steel load beam 12 and a flexure 14. In the present example.
`the flexure 14 is formed of thin stainless steel sheet material
`which is e.g. approximately 20-microns thick. An array of
`two pairs of conductive traces 60 and 62 of approximately
`10-microns thick copper conductor forms part of an inter
`connect structure 16 which extends from the proximal end
`17 of flexure 14 to another connection pad array 22 located
`at the slider-supporting distal end 18 of the load beam
`35
`assembly 10. A transducer head slider 20 is attached to the
`gimbal 14 by a suitable adhesive at the distal end 18 of the
`load beam structure 10. As shown in FIG. 3C the connection
`pads 22 at the distal end 18 are provided for connection by
`e.g. ultrasonically-welded gold ball bonds 56 to aligned
`connection pads 24 of a dual-element (four conductor) thin
`film magneto-resistive read/write structure 26 formed on a
`trailing edge of the slider body 20. Preferably, although not
`necessarily, the slider body 20 is a 30% slider.
`Interconnect structure 16 includes a high dielectric poly
`imide film base 25 interposed between the conductive traces
`60 and 62 of the conductor array 16 mounted to the stainless
`steel flexure 14. The dielectric layer is preferably about
`10-microns thick. In accordance with principles of the
`present invention, the flexure 14, in addition to providing a
`gimbal mounting for the read/write head, defines one or
`more openings or troughs 28 of controlled width (w) and
`placement relative to the conductive traces 60 and 62 of the
`conductor structure 16. These longitudinal openings 28
`defined along flexure 14 are arranged and spaced relative to
`the conductor array 16 in a manner enabling e.g. inductance,
`capacitance and resistance components of line impedance of
`the conductor structure to be tuned by varying the width
`dimension (w) relative to the array 16 as discussed herein
`after in connection with FIGS. 7A,7B and 7C. Accordingly,
`the present invention provides a method for tuning and
`controlling the electrical properties of impedance, including
`inductance, capacitance and resistance components, of the
`conductor array 16 arising from integration thereof with the
`stainless steel flexure 14.
`At high data signal frequencies the interconnect structure
`16 behaves as a micro strip transmission line for carrying the
`
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`signals passing between the read/write head and read/write
`preamplifier/driver chip 54. Accordingly, the geometry of
`the openings or recesses 28 is also an important factor for
`controlling impedance along the signal path of trace con
`ductor structure 16, as discussed hereinafter in connection
`With FIGS. 6A-6D.
`As shown in FIG. 3B, interconnect array 16 includes, in
`this embodiment, at least one pair of conductive traces 60
`and 62 which are arranged overlay alignment in two layers
`of the interconnect trace array 16. A first insulating polyim
`ide (a flexible polymeric resinous material) layer 25 isolates
`the first (inner) trace 60 from the thin stainless steel flexure
`14. A second insulating polyimide layer 27 separates and
`electrically isolates the first trace 60 from a second (outer)
`trace 62. Although not strictly required, an additional insu
`lation layer of about 4-microns thickness (not shown) may
`be provided to protect the trace 62. Since the thickness
`dimension of the dielectric layer 27 between the traces 60
`and 62 is on the order of 10 microns in the present example,
`the inductance is greatly reduced, which may be very
`desirable, particularly for current carrying trace pairs lead
`ing to an inductive write element in the head structure. On
`the other hand, the FIG. 3B arrangement creates signifi
`cantly greater inter-trace conductor capacitance levels than
`present when the traces are arranged in a side-by-side
`arrangement with e.g. a minimum separation along adjacent
`trace edges of approximately 10 microns.
`FIGS. 4A and 4B illustrate a variation upon the FIG. 3B
`multi-layer arrangement. In FIGS. 4A and 4B, the inner
`conductor 60 has been laterally displaced to the side of the
`outer conductor 62. This arrangement controllably reduces
`inter-trace capacitance. The amount of lateral displacement
`or offset of the inner trace 60 relative to the outer trace 62
`may be used to tune or reduce the inter-trace capacitance in
`order to reach an acceptable level. In this example, the
`conductor traces are e.g. 100 microns wide. FIGS. 5A, 5B
`and 5C present the changes respectively in capacitance,
`inductance and impedance as a function of overlap, wherein
`100 microns represents complete overlap of the traces 60
`and 62 as shown in FIG. 3B, and 0 represents complete
`lateral separation of t