Paper 38
`Trials@uspto.gov
`Date: November 10, 2022
`571-272-7822
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`APPLE INC.,
`Petitioner,
`
`v.
`
`QUALCOMM INCORPORATED,
`Patent Owner.
`____________
`
`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B21
`____________
`
`Before TREVOR M. JEFFERSON, DANIEL J. GALLIGAN, and
`SCOTT B. HOWARD, Administrative Patent Judges.
`
`Opinion for the Board filed by Administrative Patent Judge
`SCOTT B. HOWARD.
`
`Opinion Concurring filed by Administrative Patent Judge
`DANIEL J. GALLIGAN.
`
`HOWARD, Administrative Patent Judge.
`
`
`JUDGMENT
`Final Written Decision on Remand
`Determining All Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`
`
`
`1 The parties may not use this style heading in any subsequent papers
`without prior authorization.
`
`
`Trials@uspto.gov
`Date: November 10, 2022
`571-272-7822
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`APPLE INC.,
`Petitioner,
`
`v.
`
`QUALCOMM INCORPORATED,
`Patent Owner.
`____________
`
`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B21
`____________
`
`Before TREVOR M. JEFFERSON, DANIEL J. GALLIGAN, and
`SCOTT B. HOWARD, Administrative Patent Judges.
`
`Opinion for the Board filed by Administrative Patent Judge
`SCOTT B. HOWARD.
`
`Opinion Concurring filed by Administrative Patent Judge
`DANIEL J. GALLIGAN.
`
`HOWARD, Administrative Patent Judge.
`
`
`JUDGMENT
`Final Written Decision on Remand
`Determining All Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`
`
`
`1 The parties may not use this style heading in any subsequent papers
`without prior authorization.
`
`
`
`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
`
`
`INTRODUCTION
`I.
`In these inter partes reviews, instituted pursuant to 35 U.S.C. § 314,
`Apple Inc. (“Petitioner” or “Apple”) challenges claims 1, 2, 5–9, 12, 13, and
`16–22 (“the challenged claims”) of U.S. Patent No. 8,063,674 B2 (Ex. 1001,
`“the ’674 patent”), owned by Qualcomm Incorporated (“Patent Owner”).
`The references applied against the challenged claims are identical in
`each of the cases. A joint hearing was held for these cases. The parties rely
`on the same declarants submitting identical declarations in each case for
`testimonial evidence. The briefing on remand is substantially the same.
`Under these circumstances, we determine that a combined Final Decision
`will promote a just, speedy, and inexpensive resolution of these proceedings.
`
`IPR2018-01315 Procedural History
`A.
`Petitioner filed a Petition to institute an inter partes review of claims
`1, 2, and 5–7 of the ’674 patent pursuant to 35 U.S.C. §§ 311–319. Paper 22
`(“Petition” or “Pet.”). Patent Owner filed a Preliminary Response. Paper 6.
`We instituted an inter partes review of claims 1, 2, and 5–7 on all grounds of
`unpatentability alleged in the Petition. Paper 7 (“Institution Decision” or
`“Inst. Dec.”).
`After institution of trial, Patent Owner filed a Response (Paper 12,
`“PO Resp.”), Petitioner filed a Reply (Paper 16, “Pet. Reply”), and Patent
`Owner filed a Sur-reply (Paper 19, “PO Sur-reply”).
`A joint hearing for IPR2018-01315 and IPR2018-01316 was held on
`October 11, 2019. Paper 25 (“Tr.”).
`
`2 Unless otherwise noted, all citations are to IPR2018-01315. We note that
`identical exhibits and substantially identical papers were filed in each of the
`proceedings.
`
`2
`
`
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`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
`
`
`IPR2018-01316 Procedural History
`B.
`Petitioner filed a Petition to institute an inter partes review of claims
`8, 9, 12, 13, and 16–22 of the ’674 patent pursuant to 35 U.S.C. §§ 311–319.
`IPR2018-01316, Paper 2 (“1316 Pet.”). Patent Owner filed a Preliminary
`Response. IPR2018-01316, Paper 6. We instituted an inter partes review of
`claims 8, 9, 12, 13, and 16–22 on all grounds of unpatentability alleged in
`the Petition. IPR2018-01318, Paper 7 (“1316 Inst. Dec.”).
`After institution of trial, Patent Owner filed a Response (IPR2018-
`01316, Paper 12, “1316 PO Resp.”), Petitioner filed a Reply (IPR2018-
`01316, Paper 16, “1316 Pet. Reply”), and Patent Owner filed a Sur-reply
`(IPR2018-01316, Paper 19, “1316 PO Sur-reply”).
`
`C.
`
`The Final Written Decision, the Federal Circuit Appeal, and
`the Remand Proceeding
`We issued a consolidated Final Written Decision which held all of the
`challenged claims unpatentable. Paper 26 (“Final Decision,” “Final Dec.”).
`In particular, we concluded that, based on the language of 35 U.S.C.
`§ 311(b) and our rules, applicant admitted prior art could form the basis of
`an inter partes review petition. Final Dec. 18–22. Based on the
`combination of AAPA3 and Majcherczak, we determined that Petitioner had
`proven by a preponderance of the evidence that the challenged claims were
`unpatentable as obvious. Id. at 22–54. Additionally, we held that Petitioner
`failed to prove the challenged claims were unpatentable as obvious in view
`of Steinacker, Doyle, and Park. Id. at 59–81.
`
`
`3 AAPA refers to the specific applicant admissions identified by Petitioner
`in the ’674 Patent. See footnote 9, infra.
`
`3
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`
`Patent Owner filed a Notice of Appeal of the Final Written Decision
`with the United States Court of Appeals for the Federal Circuit. Paper 27.
`In that Notice of Appeal, Patent Owner indicated that the issues on appeal
`may include, inter alia, the “determination that alleged Applicant Admitted
`Prior Art (AAPA) is eligible for use in inter partes review proceedings.” Id.
`at 1.
`
`On February 1, 2022, the Federal Circuit issued a decision in the
`appeal vacating our Final Decision and remanding for further proceedings.
`Qualcomm Inc. v. Apple Inc., 24 F.4th 1367 (Fed. Cir. 2022). Specifically,
`the Federal Circuit held that we “incorrectly interpreted § 311(b)’s ‘prior art
`consisting of patents or printed publications’ to encompass [applicant
`admitted prior art] contained in the challenged patent.” Id. at 1376–77.
`However, because “the use of [applicant admitted prior art] can be
`permissible in an inter partes review,” the Federal Circuit remanded with
`instructions “to determine whether Majcherczak forms the basis of Apple’s
`challenge, or whether the validity challenge impermissibly violated the
`statutory limit in Section 311.” Id. at 1377.
`With regard to the ground involving Steinacker, Doyle, and Park, the
`Federal Circuit held that “there was no error in the Board’s finding that
`Apple made an insufficient showing of a motivation to combine Doyle with
`Steinacker—a prerequisite to its proposed three-way combination of Doyle
`with Steinacker and with Park.” 24 F.4th at 1377.
`Following the remand from the Federal Circuit, we held a conference
`call with the parties. See Paper 28, 2 (Order on Conduct of Proceedings on
`Remand). During the conference, we authorized the parties to submit two
`rounds of simultaneous briefing. See id. Petitioner and Patent Owner,
`
`4
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`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
`
`respectively, submitted Opening Briefs on Remand. Paper 31 (“Pet.
`Remand Br.”); Paper 32 (“PO Remand Br.”). The parties also each
`submitted a Responsive Brief on Remand. Paper 37 (“Pet. Resp. Remand
`Br.”); Paper 39 (“PO Resp. Remand Br.”).
`Patent Owner requested an oral hearing on remand, which we took
`under advisement. See Paper 28 at 2–3. Given the nature of the issue on
`remand, no additional oral argument was held. See Patent Trial and Appeal
`Board, Standard Operating Procedure 94 at 7 (“In most cases, an additional
`oral hearing will not be authorized. Normally, the existing record and
`previous oral argument will be sufficient.”), 8 (indicating no additional oral
`argument when there was an “Erroneous Application of Law”).
`The Board has jurisdiction under 35 U.S.C. § 6(b). This Final Written
`Decision on Remand issues pursuant to 35 U.S.C. § 318(a). For the reasons
`that follow, we determine that Petitioner has shown by a preponderance of
`the evidence that the challenged claims are unpatentable.
`
`Real Party in Interest
`D.
`Petitioner identified Apple Inc. as the real party in interest. Pet. 64.
`Patent Owner identified Qualcomm Incorporated as the real party in
`interest. Paper 3, 2 (Patent Owner’s Mandatory Notices).
`
`Related Proceedings
`E.
`The parties identified the following patent litigation proceedings in
`which the ’674 patent was asserted: In re Certain Mobile Electronic
`
`
`4 Available at https://www.uspto.gov/sites/default/files/documents/
`sop_9_%20procedure_for_decisions_remanded_from_the_federal_
`circuit.pdf.
`
`5
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`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
`
`Devices and Radio Frequency and Processing Components Thereof (ITC
`Inv. No. 337-TA-1093) and Qualcomm Inc. v. Apple Inc., Case No. 3:17-cv-
`02398 (S.D. Cal.). Pet. 64–65; Paper 3, 2. 5
`
`The ’674 Patent
`F.
`The ’674 patent is titled “Multiple Supply-Voltage Power-Up/Down
`Detectors.” Ex. 1001, code (54). According to the ’674 patent, “many
`newer integrated circuit devices include dual power supplies: one lower-
`voltage power supply for the internally operating or core applications, and a
`second higher-voltage power supply for the I/O circuits and devices.” Id. at
`1:22–25.
`The ’674 patent further states that “[i]n order to facilitate
`communication between the core and I/O devices, level shifters are
`employed.” Id. at 1:28–29. “Because the I/O devices are connected to the
`core devices through level shifters, problems may occur when the core
`devices are powered-down.” Id. at 1:29–32. An example of such a problem
`described in the ’674 patent is how stray currents while the core is powering
`down can cause the level shifters to “send a signal to the I/O devices for
`transmission” resulting in the I/O devices “transmit[ting] the erroneous
`signal into the external environment.” Id. at 1:34–40.
`One prior art solution identified in the ’674 patent is the use of
`“power-up/down detectors to generate a power-on/off-control (POC) signal
`internally [which] instructs the I/O devices when the core devices are shut
`down.” Ex. 1001, 1:55–58. Figure 1 of the ’674 patent is reproduced below.
`
`5 According to Petitioner, the district court proceeding and the ITC
`investigation have been dismissed. Paper 15, 1 (Petitioner’s Updated
`Mandatory Notices).
`
`6
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`Figure 1 “is a circuit diagram illustrating a conventional POC system for
`multiple supply voltage devices” which is identified as being prior art. Id. at
`4:18–19, Fig. 1.
`The ’674 patent identifies a number of issues associated with the
`Figure 1 design. For example, when I/O power supply 104 is on and core
`power supply 103 is off, powering on the core power supply results in “a
`period in which all three transistors within power up/down detector 100 are
`on,” resulting in a virtual short “to ground causing a significant amount of
`current to flow from I/O power supply 104 to ground.” Ex. 1001, 2:21–29.
`“This ‘glitch’ current consumes unnecessary power.” Id. at 2:29–30.
`Although the glitch current can be reduced by reducing the size of transistors
`M1-M3, such a reduction limits “the actual amount of current that can pass
`through the transistors” and reduces their switching speeds, which
`“translates into less sensitivity in detecting power-up/down of core supply
`voltage 103 or longer processing time for power-up/down events.” Id. at
`2:31–39; see also id. at 2:63–3:11.
`
`7
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`
`According to the ’674 patent, these problems can be solved by using
`“one or more feedback circuits coupled to the up/down detector” that “are
`configured to provide feedback signals to adjust a current capacity of said
`up/down detector.” Ex. 1001, 3:31–34. An example of such a feedback
`circuit is shown in Figure 4, reproduced below:
`
`
`Figure 4 “is a circuit diagram illustrating another POC network configured
`according to the teachings of the present disclosure.” Id. at 4:28–30. The
`’674 patent describes the operation of the feedback circuit in Figure 4 as
`follows:
`
`The feedback network 310 comprises a transistor M8
`connected in parallel to the transistor M4. The transistor M8 is
`also configured as a p-type transistor, such that when the
`feedback signal from the inverting amplifier 400 is high, the
`transistor M8 is switched off, and when the feedback signal is
`low, the transistor M8 is switched on. Thus, when the Vcore 301
`is off, producing a high detection signal, the inverting amplifier
`400 inverts that signal to a logic low which causes the transistor
`M8 to switch on. As the Vcore 301 is powered-on, the detection
`signal changes to a logic low, which changes the feedback
`signal from the inverting amplifier 400 to a logic high, which,
`in turn, turns the transistor M8 off. While the transistor M8 is
`
`8
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`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
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`
`off, the power up/down detector 306 has a decreased current
`capacity, i.e., smaller current will flow through the transistor
`M8 because of the amplified low signal. The voltage level
`caused by the Vcore 301 on the gate terminals of M4 and M5
`could in some glitch or stray signal situations, cause leakage
`through M4 and M5. Because the feedback signal for the
`transistor M8 is received from the inverting amplifier 400,
`when the Vcore 301 powers-down, the feedback signal will
`switch quickly from a logic high to a logic low, which will then
`switch the transistor M8 on. Thus, in the circuit configuration
`depicted in FIG. 4, the power up/down detector 40 will detect
`the Vcore 301 powering down more quickly than the existing
`POC networks.
`Id. at 6:4–28.
`
`Illustrative Claim
`G.
`Petitioner challenges claims 1, 2, and 5–9, 12, 13, and 16–22 of the
`’674 patent. Pet. 1; 1316 Pet. 1. Claim 1 is independent, is illustrative of the
`subject matter of the challenged claims, and reads as follows:
`1.
`A multiple supply voltage device comprising:
`a core network operative at a first supply voltage; and
`a control network coupled to said core network wherein
`said control network is configured to transmit a control signal,
`said control network comprising: an up/down (up/down)
`detector configured to detect a power state of said core network;
`processing circuitry coupled to said up/down detector and
`configured to generate said control signal based on said power
`state;
`
`one or more feedback circuits coupled to said up/down
`detector, said one or more feedback circuits configured to
`provide feedback signals to adjust a current capacity of said
`up/down detector;
`at least one first transistor coupled to a second supply
`voltage, the at least one more first transistor being configured to
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`9
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`
`switch on when said first supply voltage is powered down and
`to switch off when said first supply voltage is powered on;
`at least one second transistor coupled in series with the at
`least one first transistor and coupled to said first supply voltage,
`the at least one second transistor being configured to switch on
`when said first supply voltage is powered on and to switch off
`when said first supply voltage is powered down;
`at least one third transistor coupled in series between the
`at least one first transistor and the at least one second transistor.
`Ex. 1001, 8:44–9:3 (the ’674 patent).
`
`References/Basis
`Steinacker, 7 Doyle, 8 and Park9
`
`Prior Art and Asserted Grounds
`H.
`Petitioner asserts that claims 1, 2, and 5–9, 12, 13, and 16–22 are
`unpatentable on the following grounds:
`Claims Challenged
`35 U.S.C. §
`1, 2, 5–9, 12, 13, 16–
`103(a)6
`22
`1, 2, 5, 6, 8, 9, 12, 13,
`17–21
`
`103(a)
`
`AAPA,10 Majcherczak11
`
`
`6 The Leahy-Smith America Invents Act (“AIA”) included revisions to 35
`U.S.C. §§ 102, 103 that became effective on March 16, 2013. Because the
`’674 patent issued from an application filed before March 16, 2013, we
`apply the pre-AIA versions of the statutory bases for unpatentability.
`7 Steinacker, US 7,279,943 B2, issued Oct. 9, 2007 (Ex. 1005).
`8 Doyle, US 4,717,836, issued Jan. 5, 1988 (Ex. 1006).
`9 Park, J. C. & Mooney, V. J. (Nov. 2006). Sleepy Stack Leakage
`Reduction. IEEE Transactions on Very Large Scale Integration (VLSI)
`Systems, 14(11), 1250–1263 (Ex. 1007).
`10 Petitioner identifies Figure 1 and the text at column 1, line 22 through
`column 2, line 39 of the ’674 patent as Applicant Admitted Prior Art. See
`Pet. 37, 43, 46.
`11 U.S. Pub. No. US 2002/0163364 A1, published Nov. 7, 2002 (Ex. 1008).
`
`10
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`
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`IPR2018-01315, IPR2018-01316
`Patent 8,063,674 B2
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`
`35 U.S.C. §
`103(a)
`
`Claims Challenged
`7, 16, 22
`
`References/Basis
`AAPA, Majcherczak,
`Matthews12
`Additionally, Petitioner relies on the testimony of Robert W. Horst, Ph. D.
`(Ex. 1003; Ex. 1018) and Jacob Robert Munford (Ex. 1016). Patent Owner
`filed Dr. Horst’s cross-examination as Exhibits 2003 and 2006. Patent
`Owner relies on the testimony of Dr. Massoud Pedram (Ex. 2002).
`Petitioner filed Dr. Pedram’s cross-examination as Exhibit 1017.
`
`II. ANALYSIS
`
`A. Legal Principles
`In Graham v. John Deere Co. of Kansas City, 383 U.S. 1 (1966), the
`Supreme Court set out a framework for assessing obviousness under
`35 U.S.C. § 103 that requires consideration of four factors: (1) the “level of
`ordinary skill in the pertinent art,” (2) the “scope and content of the prior
`art,” (3) the “differences between the prior art and the claims at issue,” and
`(4) “secondary considerations” of non-obviousness such as “commercial
`success, long-felt but unsolved needs, failure of others, etc.” Id. at 17–18. 13
`“While the sequence of these questions might be reordered in any particular
`case,” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 407 (2007), the U.S.
`Court of Appeals for the Federal Circuit has repeatedly emphasized that “it
`is error to reach a conclusion of obviousness until all those factors are
`considered,” WBIP, LLC v. Kohler, 829 F.3d 1317, 1328 (Fed. Cir. 2016).
`
`
`12 U.S. Patent No. 6,646,844 B1, issued Nov. 11, 2003 (Ex. 1009).
`13 Neither party presented objective evidence of non-obviousness. See Pet.;
`PO Resp. Accordingly, we do not consider that factor in the following
`analysis.
`
`11
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`Level of Ordinary Skill in the Art
`B.
`The level of ordinary skill in the art is “a prism or lens” through which
`we view the prior art and the claimed invention. Okajima v. Bourdeau, 261
`F.3d 1350, 1355 (Fed. Cir. 2001). Factors pertinent to a determination of the
`“level of ordinary skill in the art include (1) educational level of the
`inventor; (2) type of problems encountered in the art; (3) prior art solutions
`to those problems; (4) rapidity with which innovations are made; (5)
`sophistication of the technology; and (6) educational level of workers active
`in the field.” Envtl. Designs, Ltd. v. Union Oil Co. of Cal., 713 F.2d 693,
`696–697 (Fed. Cir. 1983) (citing Orthopedic Equip. Co. v. All Orthopedic
`Appliances, Inc., 707 F.2d 1376, 1381–82 (Fed. Cir. 1983)). Not all such
`factors may be present in every case, and one or more of these or other
`factors may predominate in a particular case. Id. Moreover, “[t]hese factors
`are not exhaustive but are merely a guide to determining the level of
`ordinary skill in the art.” Daiichi Sankyo Co. Ltd, Inc. v. Apotex, Inc., 501
`F.3d 1254, 1256 (Fed. Cir. 2007).
`Dr. Horst testifies that a person having ordinary skill in the art would
`have had “at least an undergraduate degree in electrical engineering, or a
`related field, and three years of experience in circuit and system design.”
`Ex. 1003 ¶ 33. Additionally, Dr. Horst testifies that “a person of ordinary
`skill with less than the amount of experience noted above could have had a
`correspondingly greater amount of educational training such a graduate
`degree in a related field.” Id.
`In our Institution Decisions, “we adopt[ed] Dr. Horst’s definition of
`the level of ordinary skill in the art, with the exception of the language ‘at
`least.’” Inst. Dec. 13; 1316 Inst. Dec. 13. Patent Owner agrees with our
`
`12
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`formulation, see PO Resp. 9; 1316 PO Resp. 9, and Petitioner did not
`address it in its Reply. See generally Pet. Reply; 1316 Pet. Reply.
`Accordingly, we find on the record as a whole that a person of
`ordinary skill in the art would have an undergraduate degree in electrical
`engineering, or a related field, and three years of experience in circuit and
`system design. Additionally, a person of ordinary skill with less than the
`amount of experience noted above could have had a correspondingly greater
`amount of educational training such a graduate degree in a related field.
`
`C. Claim Construction
`In this inter partes review, we construe claim terms in an unexpired
`patent according to their broadest reasonable construction in light of the
`specification of the patent in which they appear. 37 C.F.R. § 42.100(b)
`(2017). 14 “Under a broadest reasonable interpretation, words of the claim
`must be given their plain meaning, unless such meaning is inconsistent with
`the specification and prosecution history.” Trivascular, Inc. v. Samuels, 812
`F.3d 1056, 1062 (Fed. Cir. 2016). In addition, the Board may not “construe
`claims during [an inter partes review] so broadly that its constructions are
`unreasonable under general claim construction principles.” Microsoft Corp.
`v. Proxyconn, Inc., 789 F.3d 1292, 1298 (Fed. Cir. 2015) (emphasis
`omitted), overruled on other grounds by Aqua Products, Inc. v. Matal, 872
`
`
`14 We apply the district court claim construction standard to petitions filed
`on or after November 13, 2018. See Changes to the Claim Construction
`Standard for Interpreting Claims in Trial Proceedings Before the Patent
`Trial and Appeal Board, 83 Fed. Reg. 51340 (Oct. 11, 2018) (to be codified
`at 37 C.F.R. pt. 42). Because Petitioner filed its petitions before November
`13, 2018 (see Pet.; 1316 Pet.), we apply the broadest reasonable
`interpretation (BRI) standard.
`
`13
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`F.3d 1290 (Fed. Cir. 2017) (en banc). An inventor may provide a meaning
`for a term that is different from its ordinary meaning by defining the term in
`the specification with reasonable clarity, deliberateness, and precision. In re
`Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994).
`Use of the word means in a claim gives rise to a rebuttable
`presumption that 35 U.S.C. § 112, sixth paragraph, analysis applies to
`interpret the claim. Williamson v. Citrix Online, LLC, 792 F.3d 1339, 1348
`(Fed. Cir. 2015). Construing a means-plus-function claim term is a two-step
`process, wherein we first identify the claimed function and then determine
`what structure, if any, disclosed in the specification corresponds to the
`claimed function. Id. at 1348–51. Our rules specifically require that a
`petition for inter partes review identify how each challenged claim is to be
`construed, including identification of the corresponding structure for means-
`plus-function limitations. See 37 C.F.R. § 42.104(b)(3) (“Where the claim
`to be construed contains a means-plus-function . . . limitation as permitted
`under 35 U.S.C. 112[(6)], the construction of the claim must identify the
`specific portions of the specification that describe the structure, material, or
`acts corresponding to each claimed function.”). 15 “[S]tructure disclosed in
`the specification is ‘corresponding’ structure only if the specification or
`prosecution history clearly links or associates that structure to the function
`recited in the claim.” Med. Instrumentation & Diagnostics Corp. v. Elekta
`
`
`15 37 C.F.R. § 42.104(b)(3) refers to § 112(f). Section 4(c) of the AIA
`redesignated 35 U.S.C. § 112, sixth paragraph as 35 U.S.C. § 112(f).
`Because the ’674 patent has a filing date before the effective date of this
`provision of the AIA, we use the citation § 112, sixth paragraph.
`
`14
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`AB, 344 F.3d 1205, 1210 (Fed. Cir. 2003) (quoting B. Braun Med. Inc. v.
`Abbott Labs., 124 F.3d 1419, 1424 (Fed. Cir. 1997)).
`Petitioner proposes a claim construction for “processing circuitry.”
`Pet. 10; 1316 Pet. 5. Petitioner also contends that the claims contain several
`means-plus-function limitations. 1316 Pet. 6–9.
`Patent Owner does not believe the term “processing circuitry” or the
`means-plus-function limitations need to be construed. PO Resp. 8; 1316 PO
`Resp. 8–9.
`Having considered the evidence presented, we conclude that, with the
`exception of the means-plus-function limitations, no express claim
`construction of any term is necessary. See Nidec Motor Corp. v. Zhongshan
`Broad Ocean Motor Co., 868 F.3d 1013, 1017 (Fed. Cir. 2017) (stating that
`“we need only construe those claim limitations ‘that are in controversy, and
`only to the extent necessary to resolve the controversy’” (quoting Vivid
`Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).
`With regard to the means-plus-function limitations, we are persuaded
`by Petitioner’s identification of both the function set forth in the claim and
`the structure in the written description that is linked to the function, and
`adopt them as our own. See 1316 Pet. 6–9.
`
`D. Obviousness over AAPA in View of Majcherczak
`Overview of AAPA
`1.
`The ’674 patent describes a prior art “power-up/down detector[] to
`generate a power-on/off-control (POC) signal internally.” Ex. 1001, 1:55–
`57, Fig. 1. The prior art design is shown in Figure 1, reproduced below.
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`Id. at Fig. 1. “FIG. 1 is a circuit diagram illustrating a conventional POC
`system for multiple supply voltage devices” and is identified as prior art. Id.
`at 4:18–19, Fig. 1. According to the ’674 patent, the POC “is made up of
`three functional blocks: power-up/down detector 100, signal amplifier 101,
`and output stage 102. Power-up/down detector 100 has PMOS transistor M1
`and NMOS transistors M2-M3.” Id. at 1:60–63.
`
`Overview of Majcherczak
`2.
`Majcherczak is titled “Power Supply Detection Device” and relates
`“to a power supply detection device for an integrated circuit using at least
`two power supply voltages.” Ex. 1008, code (54), ¶ 1. Majcherczak
`describes a voltage detection device that detects when the core voltage is
`powered down or there is an excessively slow build-up of the voltage.
`Ex. 1008, code (57), ¶¶ 8–11.
`Figure 2 of Majcherczak is shown below.
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`Figure 2 shows a detection device “compris[ing] an output stage E3
`following the input stage E1, to obtain the desired output levels for the
`inverse detection signal CORE-OFFn.” Ex. 1008 ¶¶ 35–37.
`
`3.
`
`Using Applicant Admitted Prior Art During an Inter
`Partes Review
`The Updated Guidance and the Use of Applicant
`a.
`Admitted Prior Art in Inter Partes Review
`Proceedings
`Prior to briefing on remand, the Director issued guidance discussing
`how the PTAB will treat a petitioner’s reliance on statements made in the
`specification of a challenged patent. See June 9, 2022 USPTO
`Memorandum Updated Guidance on the Treatment of Statements of the
`Applicant in the Challenged Patent in Inter Partes Reviews Under § 311
`(“Updated Guidance”). 16 The Updated Guidance supersedes prior guidance
`(Updated Guidance, 1); accordingly, we apply the Director’s Updated
`
`
`16 Available at https://www.uspto.gov/sites/default/files/documents/
`2022060912updatedAAPAmemo.pdf.
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`Patent 8,063,674 B2
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`Guidance. See Updated Guidance, 1 (“The guidance in this Memorandum
`shall be followed by all members of the Patent Trial and Appeal Board
`(PTAB or Board).”); 35 U.S.C. § 3(a)(2)(A) (authorizing the Director to
`“provid[e] policy and management supervision for the Office”), cited by
`Updated Guidance at 2; Arthrex, Inc. v. Smith & Nephew, Inc., 941 F.3d
`1320, 1331 (Fed. Cir. 2019), rev’d on other grounds, United States v.
`Arthrex, 141 S.Ct. 1970 (2021) (The Director may “issue policy directives
`and management supervision of the Office” including “instructions that
`include exemplary applications of patent laws to fact patterns, which the
`Board can refer to when presented with factually similar cases.”).
`Section 311(b) of Title 35 of the U.S. Code limits the “basis” of an
`inter partes review to “prior art consisting of patents or printed
`publications.” 35 U.S.C. § 311(b) (2018); accord Updated Guidance 2.
`“[B]ecause admissions are not prior art, and therefore cannot form the basis
`of an IPR, it is ‘impermissible for a petition to challenge a patent relying on
`solely AAPA without also relying on a prior art patent or printed
`publication.’” Updated Guidance 2 (quoting Qualcomm, 24 F.4th at 1377).
`However, “[i]f an IPR petition relies on admissions in combination with
`reliance on one or more prior art patents or printed publications, those
`admissions do not form ‘the basis’ of the ground and must be considered by
`the Board in its patentability analysis.” Id. at 4 (emphasis added).
`The Updated Guidance further provides guidance on how to
`determine if the challenged patent contains an admission:
`Admissions may include statements in the specification
`of the challenged patent such as “It is well known that . . . ,” “It
`is well understood that . . . ,” or “One of skill in the art would
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`readily understand that . . .,” or may describe the technology as
`“prior art,” “conventional,” or ,”well-known.”
`Updated Guidance 4 (citing McCoy v. Heal Sys., LLC, 850 F. App’x 785,
`789 (Fed. Cir. 2021) (non-precedential)). The Updated Guidance further
`provides that the patent owner may dispute whether the statement constitutes
`an admission: “Of course, parties may dispute the significance or meaning
`of statements in the specification or other evidence, including disputing
`whether specification statements constitute admissions or evidence of the
`background knowledge possessed by a person of ordinary skill in the art.”
`Id. at 4–5.
`
`Petitioner’s Arguments
`b.
`Petitioner argues that the ’674 patent describes AAPA as
`“conventional.” Pet. Remand Br. 1–3. Petitioner further argues that
`Majcherczak teaches both the alleged invention of the ’674 patent—a
`feedback network—and a number of other claim limitations. Id. at 3–6; Pet.
`Resp. Remand Br. 2.
`Petitioner also argues that “[t]he Petition’s use of [Patent Owner]’s
`admissions to show what was known to a skilled artisan before the alleged
`invention falls squarely within permissible use of AAPA under the Guidance
`and relevant Federal Circuit precedent.” Pet. Remand Br. 6. Specifically,
`Petitioner argues that “Majcherczak is at the heart of the Petition’s relevant
`obviousness argument for every challenged claim” and no claim is
`challenged relying solely on AAPA. Id. According to Petitioner, “[b]oth the
`Federal Circuit’s decision and the Guidance explicitly permit such use.
`[Updated] Guidance, 3 (‘Admissions are “permissible evidence in an inter
`partes review for establishing the background knowledge possessed by a
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`person of ordinary skill in the art.”’ (quoting Qualcomm, 24 F.4th at
`1376)).” Id. at 7.
`Petitioner further argues that the number of limitations taught by
`AAPA is not relevant. Pet. Remand Br. 8; Pet. Resp. Remand Br. 2–3.
`According to Petitioner, “there is no basis for treating admissions any
`differently than other sources of proof of a skilled artisan’s knowledge, such
`as expert testimony, background references, and so on.” Pet. Remand Br. 8
`(citing Koninklijke Philips v. Google, LLC, 948 F.3d 1330, 1337 (Fed. Cir.
`2020); Dow Jones & Co. v. Ablaise Ltd., 606 F.3d 1338, 1349-50 (Fed. Cir.
`2010)). Petitioner further argues that “as the [Updated] Guidance explains,
`‘the order in which the petition presents the obviousness combination (e.g.,
`prior art modified by admission or admission modified by prior art)’ is not
`relevant.” Id. (citing Updated Guidance 5; see also In re Mouttet, 686 F.3d
`1322, 1333 (Fed. Cir. 2012)); see also Pet. Resp. Remand Br. 1 (arguing
`how the ground is styled is irrelevant). According to Petitioner, if the
`stylization of the grounds or use of the short hand “AAPA grounds” had
`been determinative, the Federal Circuit would not have remanded the
`proceeding. Pet. Resp. Remand Br. 1–2.
`Petitioner also argues that if we adopt Patent Owner’s test that “the
`‘basis’ of a thing is something fundamental to it, or on which the thing
`rests,” Majcherczak is the “basis” of Ground 2. 17 Pet. Resp. Remand Br. 3–
`5 (quoting PO Remand Br. 5–7). Specifically, Petitioner
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