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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________
`INTEL CORPORATION
`PETITIONER,
`V.
`QUALCOMM INCORPORATED
`PATENT OWNER.
`____________________
`ACTION NO. IPR2018-01334; IPR2018-01335; IPR2018-01336
`** REVISED **
`
` DEPONENT: BILL LIN, PH.D.
`
` TAKEN:
`
`MAY 5, 2022
`
` REPORTER: DANNIELLE COPELAND
`REGISTERED DIPLOMATE REPORTER
`CERTIFIED REALTIME REPORTER
`CALIFORNIA CSR 14444
`
`STENOGRAPHICALLY REPORTED REMOTELY VIA ZOOM
`VIDEOCONFERENCE
`
` JOB NUMBER 209692
`
`TSG Reporting - Worldwide 877-702-9580
`
`QUALCOMM EXHIBIT 2010
`Intel v. Qualcomm
`IPR2018-01334
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________
`INTEL CORPORATION
`PETITIONER,
`V.
`QUALCOMM INCORPORATED
`PATENT OWNER.
`____________________
`ACTION NO. IPR2018-01334; IPR2018-01335; IPR2018-01336
`** REVISED **
`
` DEPONENT: BILL LIN, PH.D.
`
` TAKEN:
`
`MAY 5, 2022
`
` REPORTER: DANNIELLE COPELAND
`REGISTERED DIPLOMATE REPORTER
`CERTIFIED REALTIME REPORTER
`CALIFORNIA CSR 14444
`
`STENOGRAPHICALLY REPORTED REMOTELY VIA ZOOM
`VIDEOCONFERENCE
`
` JOB NUMBER 209692
`
`TSG Reporting - Worldwide 877-702-9580
`
`QUALCOMM EXHIBIT 2010
`Intel v. Qualcomm
`IPR2018-01334
`
`
`
` I N D E X
`
`Page 2
`
` EXAMINATION: PAGE
`
` BY MR. NIGHTINGALE 4
` BY MR. HAAG 36
`
` CERTIFICATE 41
`
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`Page 3
` THE REMOTE DEPOSITION OF BILL LIN, PH.D., TAKEN
` PURSUANT TO NOTICE HERETOFORE FILED, VIA ZOOM
` VIDEOCONFERENCE, ON MAY 5, 2022, AT APPROXIMATELY 8:01
` A.M., UPON ORAL EXAMINATION, AND TO BE USED IN
` ACCORDANCE WITH THE FEDERAL RULES OF CIVIL PROCEDURE.
`
` *** *** ***
` APPEARANCES
` VIA ZOOM VIDEOCONFERENCE
`
` FOR THE PLAINTIFFS:
` Joshua Nightingale, Esq.
` Jones Day
` 500 Grant Street
` Pittsburgh, PA 15219
`
` FOR THE DEFENDANTS:
` Joseph Haag, Esq.
` WilmerHale
` 2600 El Camino Real
` Palo Alto, CA 94306
`
` ALSO PRESENT:
` ANN CHAPLIN, QUALCOMM COUNSEL
`
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` BILL LIN, PH.D., AFTER BEING FIRST DULY SWORN,
` WAS EXAMINED AND DEPOSED AS FOLLOWS:
`
` EXAMINATION
`
` BY MR. NIGHTINGALE:
` Q. Good morning, Dr. Lin.
` A. Good morning.
` Q. Dr. Lin, could you please state your name
` for the record?
` A. My name is Bill Lin.
` Q. Dr. Lin, what is your home address?
` A. 1005 Valley Side Lane, Encinitas,
` California 92024.
` Q. Thank you.
` What is your work address?
` A. My work address is 9500 Gilman Drive,
` La Jolla, California 92093.
` Q. Dr. Lin, you've had your deposition taken
` before; is that correct?
` A. Yes.
` Q. Do you know how many times you've been
` deposed?
` A. Off the top of my head, I'm not 100 percent
` sure. Maybe about eight times, around that; eight,
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` nine times.
` Q. So you know the drill.
` I'm going to be asking you a series of questions
` today. Because we're taking your deposition remotely,
` it is important that we don't talk over each other so
` that the court reporter can accurately record your
` testimony. So today, if you wouldn't mind, please let
` me finish my questions before answering, and I'll try
` to make sure that I don't interrupt or speak over you.
` Does that sound fair?
` A. Yes.
` Q. Dr. Lin, you understand that the testimony
` you are providing today is under oath, correct?
` A. Yes.
` Q. Is there anything that would prevent you
` from giving truthful and accurate testimony today?
` A. No.
` Q. Today we are discussing the inter partes
` review proceeding for U.S. Patent Number 8,838,949.
` And I am uploading a document with the file name "'949
` patent.PDF." Just give me a second.
` Dr. Lin, if you could please download the document
` that I uploaded, this document bears the label Intel
` 1001.
` A. I have a clean copy, if that's okay.
`
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` Q. That's great. Thank you.
` A. Get a pair of reading glasses, in case I
` need to magnify.
` Q. Dr. Lin, do you recognize the document
` labeled Intel 1001 as the '949 patent?
` A. Yes.
` Q. Is it okay if I refer to this document as
` the '949 patent today?
` A. Yes.
` Q. For your work in this case, you're being
` compensated at your normal hourly consulting rate; is
` that correct?
` A. Yes.
` Q. What your normal hourly consulting rate?
` A. $650.
` Q. And you're being paid that hourly rate for
` all work performed in connection with this matter; is
` that right?
` A. Correct.
` Q. And that would include today's testimony?
` A. Yes.
` Q. What did you do to prepare for your
` deposition today?
` A. I reviewed my declaration, obviously. I
` reviewed the '949 patent, and I reviewed the various
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` things that I cited to in my declaration, including the
` prior art.
` Q. I have uploaded a document with the file
` name "remand declaration.PDF." This document bears the
` label IPR2018-01334, Intel v. Qualcomm, Intel 1026.
` Dr. Lin, I believe you have a clean printout of
` this document, but if you don't, can you please go
` ahead and download it?
` A. I have a clean copy. Thank you.
` Q. And you recognize the document labeled
` Intel 1026 as the remand declaration that you submitted
` in this case; is that correct?
` A. Yes.
` Q. Can you look at page 36 of your remand
` declaration?
` A. Yes.
` Q. Is that your signature on page 36?
` A. Yes.
` Q. How much time did you spend preparing this
` remand declaration?
` A. Oh, it's -- it's already a number of weeks
` ago. I don't remember precisely right now, honestly.
` Q. Can you give me a ballpark estimate?
` A. Actually, I can't. I just don't remember.
` Q. Did you write this remand declaration?
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` A. I worked with the -- the lawyers to draft
` the -- the declaration together, and these are my
` words.
` Q. You intended to be truthful and honest in
` providing the opinions in this remand declaration; is
` that correct?
` A. Yes.
` Q. Today we'll be discussing the Svensson and
` Bauer prior art references. I believe you already have
` clean copies of those, but I am going to go ahead and
` upload both of these references into the chat.
` A. I confirm that I have both, clean copies of
` both Bauer and Svensson.
` Q. I have uploaded a document with the file
` name "Svensson.pdf," document bearing the label Intel
` 1010.
` Dr. Lin, you have just told me that you have a
` clean copy of Svensson.
` Do you recognize the document labeled Intel 1010
` as the Svensson prior art reference?
` A. Yes. I do.
` Q. I have also uploaded a document with the
` file name "Bauer.PDF." This document bears the label
` Intel 1009.
` Dr. Lin, you have confirmed that you have a clean
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` copy of Bauer, which is labeled Intel 1009.
` Do you recognize this document bearing the labeled
` Intel 1009 as the Bauer prior art reference?
` A. Yes.
` Q. And did you review Svensson in preparing
` your remand declaration?
` A. Yes.
` Q. Did you review Bauer in preparing your
` remand declaration?
` A. Yes.
` Q. Can you turn to Figure 1 of Svensson?
` A. Yes.
` Q. Figure 1 of Svensson depicts a
` multi-processor system; is that correct?
` A. Yes.
` Q. Figure 1 of Svensson depicts a component
` labeled ARM CPU 102; is that correct?
` A. That is correct.
` Q. Svensson refers to the component labeled
` ARM CPU 102 as a host processor; is that correct?
` A. I believe that's correct.
` Q. Figure 1 of Svensson depicts a component
` labeled DSP CPU 104; is that correct?
` A. That is correct.
` Q. Does Svensson refer to the component
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` labeled DSP CPU 104 as a client processor?
` A. I have to double-check, but it's possible.
` I have to double-check, if you can point me to a
` particular passage, I can -- I can verify.
` Q. If you want to take a look at Column 3,
` lines 49 through 50 of Svensson, that might help you.
` A. Yes. I agree.
` I agree that Svensson refers to the DSP as a
` client processor.
` Q. Does Svensson refer to the component
` labeled DSP CPU 104 as a slave 104?
` A. Yes. At least at one place it refers to it
` as a DSP slave CPU.
` Q. Does Svensson also refer to the component
` labeled DSP CPU 104 as a slave 104?
` A. Yes.
` Q. Can you turn to Figure 2 of Svensson?
` A. Yes. I'm there.
` Q. Does Figure 2 of Svensson depict a
` flowchart?
` A. It does.
` Q. Does the flowchart of Svensson Figure 2
` depict a step in which a slave processor is booted up?
` A. Are you referring to the -- the flowchart
` box 208?
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` Q. Well, my question is: Does the flowchart
` of Figure 2 depict a step in which a slave processor is
` booted up?
` A. Give me a moment.
` So Figure 2 does depict a step in which the -- the
` slave processor is booted.
` Q. In which step of Svensson Figure 2 is the
` slave processor booted up?
` MR. HAAG: Objection to form.
` THE WITNESS: Well, the particular
` description in the patent -- in the specification is
` that the -- the slave 104 is allowed to boot in step
` 208.
` BY MR. NIGHTINGALE:
` Q. Does the flowchart of Svensson Figure 2
` depict a step in which an operating system is started
` in the slave processor?
` A. There is a step in the flowchart where the
` slave processor is allowed to boot and start the
` operating system.
` Q. In which step of Svensson's Figure 2 is the
` operating system started in the slave processor?
` A. So in Step 210 of Figure 2, the
` specification says that the -- the slave 104 is allowed
` to boot up and start the operating system.
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` Q. Dr. Lin, can you turn to page 30 of your
` declaration.
` A. Yes. I'm there.
` Q. In the second full sentence on page 30 of
` your declaration, you state, "Instead, the intermediate
` storage area is available for loading whenever the host
` processor is running."
` Do you see that?
` A. Yes.
` Q. Does Svensson describe that the
` intermediate storage area is available for loading
` whenever the host processor is running?
` A. The answer is yes.
` Q. Which portions of Svensson describe that
` the intermediate storage area is available for loading
` whenever the host processor is running?
` A. So in the passage I cited here, Column 8,
` lines 30 -- I mean lines 29 to 32, it talks about with
` the OS-friendly bootloader described here, one can --
` one can load and execute new software in a slave
` processor virtually any time the host is running.
` Q. Are there any other portions of Svensson
` that describe the intermediate storage area as being
` available for loading whenever the host processor is
` running?
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` A. You know, at the -- at the high -- high --
` highest -- at the level, Svensson describes a
` scatter-loading process from the intermediate storage
` area to the external memory where the software image is
` loaded, and so that's described throughout the Svensson
` in a number of places.
` And this particular passage I cited here just
` reaffirms that one can load and execute new software
` basically any time the host processor is running.
` Q. So I understand -- I understand your
` testimony as being that Column 8, lines 29 through 32
` of Svensson describe that the intermediate storage area
` is available for loading whenever the host processor is
` running.
` My subsequent question is: Are there any other
` portions of Svensson that describe that the
` intermediate storage area is available for loading
` whenever the host processor is running?
` A. So the -- the -- the specification of
` Svensson clearly describes the -- the loading process
` from the intermediate storage area to the -- to the
` external memory, and -- and this is being done, you
` know, through the scatter-loading process that Svensson
` describes.
` And so -- so I think it's clear in this passage
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` here that -- that the -- since the whole patent is
` about -- about the scatter-loading, that this passage
` here is clear that -- that whenever the host is
` running, you can -- you can load new programs, and
` Svensson spends the rest of the specification
` describing how that loading process works.
` Q. So you referred to "the passage."
` Is the passage that you're referring to Column 8,
` lines 29 through 32 of Svensson?
` A. So you -- if you want me to spend some time
` going through, I can, but the -- my opinion is that the
` Svensson patent describes a loading -- a
` scatter-loading process that goes from the intermediate
` storage area to the -- to the -- the claims system
` memory in the external RAM, and so that is what is
` the -- what is described throughout Svensson, and this
` passage here confirms that this can be done multiple
` times with the host processor running.
` Q. Besides from Column 8, lines 29 though 32
` of Svensson, are there any other portions of the
` reference that describe that the intermediate storage
` area is available for loading whenever the host
` processor is running?
` A. So I've also cited also in the passage
` here, from lines 17 to 21, that that makes the same
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` point.
` Q. Dr. Lin, you said lines 17 through 21.
` Do you have a column for that?
` A. Column 8, please.
` Q. So your testimony is that Column 8, lines
` 17 through 21 of Svensson describes that the
` intermediate storage area is available for loading
` whenever the host processor is running; is that
` correct?
` A. My testimony is that Svensson, the entire
` patent, you know, throughout, describes the -- the
` scatter-loading process in which the -- the host
` can trans- -- can, together with the slave processor,
` transfer a software image through a scatter-loading
` process from intermediate storage area to the -- to the
` external memory. And so these passages reaffirm that
` this can be done any time.
` Q. Are there any other portions of Svensson
` that you would like to point out that specifically
` describe the intermediate storage area is available for
` loading whenever the host processor is running?
` A. Yeah, if you want -- if you allow me some
` time, I can go through the -- the Svensson patent.
` So at the high level, the -- the specification
` goes through steps of how an OS-friendly bootloader can
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` be used to -- to load -- scatter-load a program through
` the intermediate storage area to the external memory,
` as the -- as the system memory where the software image
` is located.
` So I think that is described throughout. And my
` opinion, as an expert in the field, is that that is
` described throughout, and these passages I'm referring
` to here makes it clear that this -- this can be -- this
` processes, as described in Svensson, can be done
` multiple times.
` Q. Dr. Lin, if you do want to take any time,
` that is fine by me.
` I just would like to understand exactly which
` portions of Svensson you're relying on for your opinion
` that the intermediate storage area is available for
` loading whenever the host processor is running.
` A. Thank you for giving me the time to look
` through this.
` So I guess I'm not quite understanding the
` question because the -- the patent, you know, in the
` whole detailed description describes the process of the
` OS-friendly bootloader, and the process is right in --
` in the specification -- throughout the Svensson
` specification, you know, describes the OS-friendly
` bootloader, and it describes the OS-friendly bootloader
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`
` using the internal memory to -- to -- for loading
` images.
` And so my opinion is that it describes how the
` OS-friendly bootloader uses the intermediate storage
` area for -- for the scatter-loading process, and then
` the lines that I referred to in Column 8 confirms that
` it can be done virtually any time.
` Q. Okay.
` So you're -- you can't give me any other specific
` portions that support your statement that the
` intermediate storage area is available for loading
` whenever the host processor is running?
` MR. HAAG: Objection.
` THE WITNESS: No. That's not what I'm
` saying.
` I'm saying that the description throughout
` the specification in -- in -- you know, starting with
` the detailed description, describes exactly this
` process of the OS-friendly bootloader to be able to --
` to scatter-load software images using the intermediate
` storage area.
` And -- and so I think in Column 8, in the
` lines 29 through 32 and 17 to 21, it refers clearly to
` the OS bootloader, and it clearly states that with
` the -- with the OS-friendly bootloader described here,
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` one can execute and -- one can load and execute new
` software virtually any time the host processor is
` running.
` So I think it's clear to any reader that --
` that Svensson describes using the intermediate storage
` area for the scatter-loading process, and Column S
` says -- Column 8 says that the process that was
` described earlier can be -- can be -- can be used to
` load and execute new software any time host processor
` is running.
` So to me, this is very clear.
` BY MR. NIGHTINGALE:
` Q. Does Bauer describe that the intermediate
` storage area is available for loading whenever the host
` processor is running?
` A. Give me a moment.
` I would have to look into more details, but Bauer
` is really about the -- the idea of a file format where
` the header information containing all the address
` location of the data segments are captured, and so
` Bauer really provides a way to describe where the
` header section information are arranged in such a way
` that the header can be read before the sections are
` processed.
` And so in Bauer and Svensson in combination, the
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`Intel v. Qualcomm
`IPR2018-01334
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` file format and the separate receipt idea from Bauer
` can be combined with the scatter-loading process
` described in the -- in Svensson.
` So I think the -- the process of loading through
` the intermediate storage area is mostly described in --
` in the -- in Svensson, but just let me double-check one
` more time.
` Can you repeat your question one more time,
` please?
` Q. Sure.
` My question is: Does Bauer describe that the
` intermediate storage area is available for loading
` whenever the host processer is running?
` A. Well, Bauer refers to the same figure as in
` Svensson, just labeled as Figure 2 in Bauer, and it
` mainly talks about the -- the file format, but it does
` talk about the intermediate storage area as being part
` of the same system diagram that also appear in -- in
` Svensson.
` Q. Is your answer yes?
` A. Well, the -- the Bauer reference does -- is
` not talking about the details of the scatter-loading
` process. It's describing the same architecture with
` the same components of the architecture shown in
` Svensson.
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`
` The focus of Bauer is about the file format.
` Q. So is your answer to my question "Does
` Bauer describe that the intermediate storage area is
` available for loading whenever the host processer is
` running," is your answer no?
` A. There isn't a particular passage that
` say -- say that.
` Q. Can you turn to Paragraph 37 of your
` declaration.
` A. There is -- oh, Paragraph 37. Okay. Thank
` you. I'm getting there.
` Yes. I'm there.
` Q. In Paragraph 37, you state, "From the
` description of the multiprocessor systems in Bauer and
` Svensson, it is clear that the intermediate storage
` area is physically separate from the system memory (DSP
` XRAM 210/110) from which the executable image is
` executed."
` Do you see that?
` A. Yes.
` Q. In that sentence you mention an
` intermediate storage area disclosed in Svensson and
` Bauer; is that correct?
` A. Yes.
` Q. You also mention a DSP XRAM disclosed in
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`
` Svensson and Bauer; is that correct?
` A. Yes.
` Q. In Bauer, is the DSP XRAM labeled with
` numeral 210?
` A. In Bauer, yes, I believe so.
` Q. In Svensson, is the DSP XRAM labeled
` numeral 110?
` A. Yes.
` Q. Dr. Lin, your opinion is that the
` intermediate storage area in Svensson is physically
` separate from the DSP XRAM 110 --
` A. Yes.
` Q. -- is that correct?
` A. Yes.
` Q. Does Svensson describe the intermediate
` storage area as being physically separate from the DSP
` XRAM 110?
` A. Yes.
` Q. Which portions of Svensson describe the
` intermediate storage area as being physically separate
` from the DSP XRAM 110?
` A. I think Svensson makes clear that the
` intermediate storage area is part of an internal
` memory, and the -- Svensson makes clear that the DSP
` XRAM is external memory, and internal -- something
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`TSG Reporting - Worldwide 877-702-9580
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`QUALCOMM EXHIBIT 2010
`Intel v. Qualcomm
`IPR2018-01334
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`
` that's internal to the processor versus something
` that's external to the processor, I think it's clear
` that they're physically separate.
` Q. Are there any other portions of Svensson
` that you're relying on for your opinion that the
` intermediate storage area is physically separate from
` the DSP XRAM 110?
` A. So -- yeah, so I want to repeat that.
` I think Svensson makes clear that 108 is internal
` memory, and it is drawn to be physically separate, as a
` separate box. And it clearly refers to the XRAM, where
` the X refers to external, so it clearly refers to the
` XRAM as being external memory, and it's drawn as two
` separate memories.
` And I think it is clear to a person of ordinary
` skill in the art that these are two physically
` separated -- separated memories.
` Q. Do any other portions of Svensson describe
` the intermediate storage area as being physically
` separate from the DSP XRAM 110?
` A. Give me a moment.
` So again, I think it is clearly drawn as two --
` physically, two separate memories. And I think in --
` for example, in -- starting at the bottom of Column 3,
` line 64, to top of Column 4 through lines 9, it clearly
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` describes the -- the memory 108 as being internal. So
` it says the DSP includes internal single-access RAM and
` dual-access RAM 108, as well as external ram, XRAM 110.
` So I think it makes it very clear that -- that
` they're two physically separated memories. So I think
` a person of ordinary skill in the art would understand
` this to be physically separate.
` Q. Do any other portions of Svensson describe
` the intermediate storage area as being physically
` separate from the DSP XRAM 110?
` MR. HAAG: Objection to form.
` THE WITNESS: Well, again, I think the --
` the specification -- specification is clear that
` they're physically separated memories. It refers to,
` in multiple places, that 108 is internal. It refers to
` 110 as being external. And it consistently refers to
` them as -- as two different entities, and they're drawn
` different -- as separate entities in Figure 1.
` And I think, also, a person of ordinary
` skill in the art would understand them to be physically
` separate because in Figure 1 the ARM CPU can access one
` memory but cannot access the other one, so that also is
` clear that -- to a person of ordinary skill in the art
` that they are physically separated.
` BY MR. NIGHTINGALE:
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` Q. Are there any other portions of Svensson
` that describe the intermediate storage area as being
` physically separate from the DSP XRAM 110?
` A. I think I can go on and on, but I think if
` you go throughout the specification, it -- it
` consistently refers to 108 as internal memories, and it
` consistently 110 as being external memory.
` I can point to another place in Column 5 where --
` where it refers to it this way. So if you look at
` Column 5 in the paragraph starting at line 22 through
` 37, I think you, again, see that the specification
` refers to, quote, internal, quote, memory, and -- and,
` again, it refers to external, in quotes, XRAM 110.
` So I think it consistently repeats this -- this
` description throughout the specification. And my
` opinion and my answer is that a person of ordinary
` skill in the art would -- would understand that these
` are physically separated memories.
` Q. Dr. Lin, your opinion is that the
` intermediate storage area in Bauer is physically
` separate from the DSP XRAM 210; is that correct?
` A. Yes.
` Q. Does Bauer describe the intermediate
` storage area as being physically separate from the DSP
` XRAM 210?
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` A. Well, the -- as -- as I just said, and I
` will say it again, Svensson is explicit in referring to
` 108 as internal memory, and Svensson is explicit in
` referring to the XRAM 110 as the external memory. I
` think that's clear.
` I think Svensson is also clear that it permanently
` reserves the intermediate storage area for the
` scatter-loading process. And so I think -- I think
` that also means that the internal storage area is
` physically -- physically separated from the external
` memory.
` Q. Dr. Lin, your answer just then referenced
` Svensson, but my question was: Does Bauer describe the
` intermediate storage area as being physically separate
` from the DSP XRAM 210?
` A. Thank you for that clarification.
` Yes. So if you look at -- in Bauer Paragraph 36,
` Paragraph 36 is describing the same figure that also
` appears in Svensson. And in Paragraph 36 it clearly
` refers to the DSP includes, quote, internal
` single-access RAM and dual-access RAM, as well as an
` external RAM, XRAM 210. And then it describes the
` intermediate storage area, indicated by the dashed
` line, may be defined within the memory 208, which is
` the internal memory.
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`
` So I think this is clear also.
` Q. Are there any other portions of Bauer that
` describe the intermediate storage area as being
` physically separate from the DSP XRAM 210?
` A. Yeah. I think a person of ordinary skill
` in the art reading the passage 36 and looking at the
` Figure 2 and seeing that the two memories are
` physically drawn separately in the figure and seeing
` that in Paragraph 36, that one is referred to as
` internal memory and the other one is referred to as
` external memory as distinct memories would -- would
` understand that these are physically separated
` memories.
` Q. Are there any other portions of Bauer that
` describe the intermediate -- excuse me -- intermediate
` storage area as being physically separate from the DSP
` XRAM 210?
` A. I think Paragraph 36 is the primary
` location that describes Figure 2, which -- which
` describes and shows the two memories being physically
` separated.
` Q. Dr. Lin, can you please turn now to
` Paragraph 29 of your declaration.
` A. Yes.
` Q. The last sentence of Paragraph 29 reads,
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` "Thus, I do not understand these passages as limiting
` the scope of the term 'hardware buffer' to exclude the
` use of all temporary or intermediate buffers."
` Do you see that?
` A. I see that.
` Q. The passages -- excuse me.
` The passages to which you're referring are from
` the '949 patent; is that correct?
` A. Give me a moment to review my -- what I've
` written here.
` Yes.
` Q. Does the background section of the '949
` patent discuss intermediate buffers?
` A. Does the -- let me pull that up.
` And sorry, can you -- can you repeat the question,
` please?
` Q. Sure.
` Does the background section of the '949 patent
` discuss intermediate buffers?
` A. So are -- are you referring to -- can you
` point me to where in section -- where in the '949 that
` you are referring to?
` Q. Why don't you take a look at Column 2,
` lines 35 through 41 of the '949 patent.
` A. Yeah. I see that, lines 35 to 41.
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` Q. Correct.
` If you can take a look at Column
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