`radio base stations
`
`Zhongping Zhang, Franz Heiser, Jürgen Lerzer and Helmut Leuschner
`
`WCDMA, one of the technologies selected for the air interface of the
`3GPP standard, is widely used in emerging third-generation mobile com-
`munication systems. This interface supports data rates of up to 2 Mbit/s
`on a common 5 MHz frequency carrier. Moreover, with the introduction of
`HSDPA, the peak service rate for packet access in the downlink can be
`increased to more than 10 Mbit/s.
`Ericsson’s radio base station has been designed to comply with the
`3GPP standard. The kernel part of WCDMA technology has been imple-
`mented in the baseband of the radio base station. Compared to previous
`generations, the baseband signals in WCDMA are spread with a high
`chip-rate code at 3.84 megachips per second on a 5 MHz frequency band.
`This is much wider than the frequency band used in GSM, cdmaOne and
`CDMA2000, or PDC. Therefore, to process the signals, more advanced
`technology is deployed in WCDMA baseband. Ericsson’s baseband tech-
`nology uses the very latest ASIC, DSP, and FPGA technologies.
`Numerous requirements are being channeled toward the baseband
`platform, both to support a technical implementation of WCDMA and to
`satisfy operator and radio network management points of view. Being the
`kernel in WCDMA, the baseband platform must be able to efficiently han-
`dle the entire life cycle of an RBS, from initial deployment, with a low-
`cost, low-content focus, to subsequent scaling for newly developed ser-
`vices and traffic growth. Moreover, it must do so while networks are
`evolving and expanding with more users and new mixes of end-user ser-
`vices. New radio network functions and features will also be added
`through base station hardware and software to perfect the WCDMA sys-
`tem.
`The authors describe the implementation of Ericsson’s WCDMA base-
`band. They also show how it has been prepared to grow with and meet
`the needs of future developments by facilitating small, incremental
`upgrades and thanks to a flexible architecture that supports the expan-
`sion of the uplink and downlink together with critical functionality that
`resides in loadable hardware.
`
`Figure 1
`Indoor RBS and baseband subrack.
`
`32
`
`Architecture of the radio
`base station
`The functionality of a radio base station
`(RBS) is divided into two main parts: user-
`plane functions and control-plane functions.
`The user-plane functions are associated with
`transport, baseband, radio and the antenna.
`The control-plane functions pertain to the
`transmission of user data and operation and
`maintenance (O&M) data. Ericsson’s RBS is
`based on the connectivity packet platform
`(CPP, formerly called Cello packet plat-
`form)—that is, the RBS employs the infra-
`structure of hardware and software modules
`provided in CPP.1
`Figure 1 shows a typical indoor RBS with
`power subrack, baseband subrack, radio fre-
`quency subrack and power amplifier sub-
`rack.2 User-plane signals from the radio net-
`work controller (RNC) via the Iub interface
`are input directly via CPP boards to the
`baseband parts, whereas control-plane sig-
`nals are input to the baseband parts via the
`traffic and O&M control parts of the main
`processor. Figure 2 shows the architecture
`of the Ericsson RBS3000.3 Please note that
`for simplicity’s sake the CPP parts and main
`processor are not shown.
`The architecture can be broken down into
`a cell-specific part and a non-cell-specific
`part. The cell-specific part contains trans-
`ceiver (TRX) boards, multicarrier power
`amplifier (MCPA) boards and antenna in-
`terface unit (AIU) boards, whereas the com-
`mon part contains boards for baseband pro-
`cessing. In Figure 2, the baseband process-
`ing has been split between the transmitter
`(TX) and random access and receiver (RAX)
`boards. The TX board handles downlink
`processing and enables coding, spreading
`and modulation. The RAX board handles
`uplink processing and enables demodula-
`tion, de-spreading and decoding.
`
`Baseband functions
`The physical layer functions on the baseband
`boards have been implemented to include
`• the mapping and de-mapping of physical
`channels and transport channels;
`• multiplexing and demultiplexing;
`• channel coding and decoding;
`• spreading and de-spreading;
`• modulation and demodulation;
`• physical layer procedures; and
`• physical layer measurements.
`In addition, the baseband boards in a radio
`base station perform the following functions:
`
`Ericsson Review No. 1, 2003
`
`Intellectual Ventures Inc. LLC Ex. 2011
`Ericsson Inc. v. Intellectual Ventures
`IPR2018-01380
`
`
`
`• radio base station configuration;
`• cell control;
`• the distribution of system information;
`• radio link configuration for dedicated and
`common channels;
`• Iub data-stream handling; and
`• node synchronization and distribution.
`The baseband functions in the radio base sta-
`tion thus provide a platform for radio net-
`work functions, configuration functions,
`and O&M functions. Accordingly, the base-
`band constitutes a platform of resources for
`handling common and dedicated channels
`for higher layers.
`Figure 3 gives an overview of standard
`channel mapping between logical channels,
`transport channels and physical channels.4,5
`The upper part pertains to the downlink
`channels and the lower part (shown in dark
`blue) pertains to the uplink channels. The
`Third-generation Partnership Project6
`(3GPP) has defined the
`• synchronization procedures for cells, com-
`mon channels and dedicated channels;
`• random-access procedures; and
`• inner- and outer-loop power control pro-
`cedures.
`To improve the performance of the radio
`link connection, the 3GPP has recom-
`mended possible enhancements, such as
`open-loop and closed-loop transmit diversi-
`ty. After the baseband boards have been con-
`figured properly with respect to the inter-
`faces to other subsystems, they can be put
`into traffic operation. If the traffic load on
`the baseband is light, all or part of the board
`can be put into power save mode to reduce
`power consumption. By contrast, supervi-
`sion and protection mechanisms reduce the
`risk of dropped calls when the traffic load
`on the baseband boards is too heavy.
`
`Baseband design aspects
`Ericsson’s baseband has been designed to
`comply with 3GPP standards for WCDMA.
`In addition, the baseband architecture has
`been designed to meet requirements for op-
`erating radio base stations. These include
`configuration flexibility, effective use of re-
`sources, easy roll-out, compatibility and
`future-proof hardware. By introducing the
`very latest in digital signal processor (DSP),
`field-programmable gate array (FPGA)
`and application-specific integrated circuit
`(ASIC) technologies, Ericsson has signifi-
`cantly increased the capacity for traffic and
`control signaling, measured in terms of
`channel elements for the dedicated physical
`
`Ericsson Review No. 1, 2003
`
`Interface between downlink and
`uplink baseband processing
`TX board
`
`Transciever
`board
`
`Multicarrier power amplifier
`and antenna interface
`unit board
`
`From RNC
`(user plane)
`
`To RNC
`(user plane)
`
`Baseband
`
`TXB
`
`RAXB
`
`TRXB
`
`TRXB
`
`Cell
`
`Cell
`
`Cell
`
`MCPA and
`AIUB
`
`MCPA and
`AIUB
`
`TRXB
`
`MCPA and
`AIUB
`
`Random access
`and RX board
`Data and/or “fast” control
`
`Baseband bus
`
`Figure 2
`Baseband in RBS and interfaces.
`
`Figure 3
`Channel-mapping model. Area marked in red is for HSDPA.
`
`RNC
`
`RBS
`
`RNC control
`
`RBS/RNC
`control
`link
`
`Logical
`channel
`
`lub data
`stream
`
`PCCH
`DCCH
`CCCH
`DTCH
`
`DTCH
`DCCH
`
`DCCH
`CCCH
`DTCH
`DTCH
`DCCH
`
`Logical
`channel
`
`Transport
`channel
`
`Physical
`channel
`
`RBS control
`BCCH
`
`BCH
`
`PCH
`
`FACH
`
`DCH
`
`MAC-hs
`
`SCH
`
`P-CCPCH
`
`CPICH
`
`PICH
`
`S-CCPCH
`
`S-CCPCH
`
`DPDCH
`DPCCH
`AICH
`
`HS-SCCH
`
`HS-DSCH
`
`HS-PDSCH
`
`RACH
`
`DCH
`
`HS-PDCCH
`PRACH
`
`DPDCH/
`DPCCH
`
`Downlink
`channels
`
`Uplink
`channels
`
`33
`
`
`
`channels. A channel element is defined as
`the equivalent baseband resource (hardware
`and software) needed to transmit a voice
`channel at 30 kbit/s.
`
`Configuration flexibility and efficient
`use of resources
`Operators want a radio base station that can
`be adapted to handle different site and radio
`configurations. Ericsson’s baseband imple-
`mentation gives operators this flexibility,
`allowing them to change radio configura-
`tions without having to physically visit the
`site. Flexible interfaces have been provided
`between the subsystems of the radio base sta-
`tion, and the baseband parts have been de-
`signed in a modular fashion. Each baseband
`unit provides a certain amount of traffic ca-
`pacity for dedicated and common transport
`channels. This modular design enables op-
`
`erators to configure the radio base station for
`various traffic scenarios and load.
`
`Baseband board types—TX board
`and RAX board
`
`Obviously, the use of separate baseband
`downlink and uplink modules makes it eas-
`ier to upgrade the system and to better adapt
`it to the asymmetric traffic associated with
`third-generation
`services.
`Ericsson’s
`RBS3000 has two baseband board types: the
`TX board handles downlink traffic, and the
`RAX board handles uplink traffic.
`Traffic over the air interface is expected to
`be asymmetrical—that is, there will be more
`traffic in the downlink than in the uplink.
`By adding separate TX and RAX boards,
`operators can increase capacity in small or
`large increments either symmetrically or
`asymmetrically.
`
`BOX A, TERMS AND ABBREVIATIONS
`
`3GPP
`
`AICH
`AIU
`ASIC
`
`Third-generation Partnership
`Project
`Acquisition indication channel
`Antenna interface unit
`Application-specific integrated
`circuit
`Broadcast control channel
`Broadcast channel
`Board processor
`Common control channel
`Common channel
`Coded composite transport
`channel
`Code-division multiple access
`Common pilot channel
`Connectivity packet platform
`Cyclic redundancy check
`Dedicated control channel
`Dedicated channel
`Downlink TPC
`Data processing
`Dedicated physical control
`channel
`Dedicated physical channel
`Dedicated physical data channel
`Downlink shared channel
`Digital signal processor
`Dedicated traffic channel
`Discontinuous transmission
`Forward access channel
`Frame protocol
`Field-programmable gate array
`General packet radio service
`Global system for mobile
`communication
`HS-DPCCH High-speed dedicated physical
`control channel
`
`BCCH
`BCH
`BP
`CCCH
`CCH
`CCTrCH
`
`CDMA
`CPICH
`CPP
`CRC
`DCCH
`DCH
`DL-TPC
`DP
`DPCCH
`
`DPCH
`DPDCH
`DSCH
`DSP
`DTCH
`DTX
`FACH
`FP
`FPGA
`GPRS
`GSM
`
`HSDPA
`
`HS-PDSCH High-speed physical downlink
`shared channel
`High-speed downlink packet-
`data access
`HS-SCCH High-speed shared control
`channel
`Multicarrier power amplifier
`MCPA
`Multiplexing unit
`MUX
`Operation and maintenance
`O&M
`Paging control channel
`PCCH
`P-CCPCH Primary common control
`physical channel
`Paging channel
`PCH
`Primary CPICH
`P-CPICH
`Personal digital cellular
`PDC
`Paging indicator channel
`PICH
`Physical random access channel
`PRACH
`Random access channel
`RACH
`Name of WCDMA receiver
`RAKE
`Random access and receiver
`RAX
`Radio base station
`RBS
`Radio frequency
`RF
`Radio network controller
`RNC
`S-CCPCH Secondary common control
`physical channel
`Synchronization channel
`Signal-to-interference ratio
`Transport format combination
`indicator
`Transmission power control
`Transport channel
`Transceiver
`Transmitter
`User equipment
`Uplink TPC
`Wideband CDMA
`
`SCH
`SIR
`TFCI
`
`TPC
`TrCH
`TRX
`TX
`UE
`UL-TPC
`WCDMA
`
`34
`
`Ericsson Review No. 1, 2003
`
`
`
`Modularity of the baseband
`
`Traffic load and distribution vary over time
`in different sectors and frequencies. The
`Ericsson baseband architecture employs
`pooling to optimize the use of available re-
`sources. This approach also guarantees that
`configurations can be flexible. Figure 4
`shows the advantages of modularity and
`pooled resources in two different radio con-
`figurations.
`Some operators require redundancy in the
`radio base station. The modular baseband
`design easily restricts the loss of traffic due
`to, say, a faulty component or unit in base-
`band processing.
`
`Easy roll-out of third-generation
`infrastructure
`Established GSM and GSM/GPRS operators
`can more easily roll out third-generation in-
`frastructure by reusing site locations and in-
`frastructure. Most operators starting out in
`the third-generation business want low-
`cost, low-capacity RBSs. Later, when the
`number of subscribers has increased and
`more advanced services are to be introduced,
`they will need RBSs that can handle greater
`traffic capacity in individual cells. The base-
`band boards have been designed with scal-
`ability in mind—greater capacity can be had
`by adding hardware units (TX boards and
`RAX boards).
`Another way of increasing traffic capaci-
`ty is to deliver and install prepared hardware
`on site. As operator needs grow, more ca-
`pacity can be activated successively by
`means of software functions. This approach
`advocates the use of simple, standard hard-
`ware configurations.
`A further advantage of baseband scalabil-
`ity is that the RBS can be equipped with as
`many baseband units as needed to satisfy
`traffic, site conditions, and air-interface ca-
`pacity for a given frequency band. This helps
`operators to avoid wasting unnecessary re-
`sources.
`
`Future-proof and compatible
`As mentioned above, most operators just
`starting out in the third-generation business
`want low-cost, low-content RBSs. Later,
`however, apart from increasing capacity in
`the RBS, they will also need more func-
`tionality and more advanced features. In de-
`signing the baseband, Ericsson has careful-
`ly considered various evolution scenarios,
`making allowances for customer-specific re-
`quirements for functions, services, capacity,
`redundancy, and site conditions.
`
`Ericsson Review No. 1, 2003
`
`Baseband resources
`
`Baseband resources
`
`Frequency 1
`
`Frequency 1
`
`Change in
`traffic
`
`Frequency 2
`
`Frequency 2
`
`Number of users in a cell
`
`Figure 4
`Baseband modularity and pooled resources.
`
`In general, the functions in the physical
`layer have been implemented in hardware
`(ASIC) or close to hardware (DSP); the con-
`trol functions have been implemented in
`software on DSPs and board processors. To
`avoid the logistical problems and costs as-
`sociated with frequent on-site updates or
`upgrades, Ericsson has prepared the hard-
`ware for future functions—these can be-
`come available via remote software and
`firmware updates. Ericsson calls this feature
`forward hardware compatibility.
`On the other hand, new baseband boards
`must work in environments that use old
`baseband boards. This is called backward
`hardware compatibility. Ericsson’s base-
`band hardware and software are forward
`hardware and backward hardware compat-
`ible. Future-proofness—in terms of addi-
`tional radio configurations, services, func-
`tions, and greater capacity—is an impor-
`tance aspect of Ericsson’s baseband design.
`Figure 5 illustrates the forward hardware
`compatibility concept. Function Z has been
`provided in hardware. A remote software
`upgrade can thus activate the entire func-
`
`Figure 5
`Forward hardware compatibility.
`
`Function A
`Function B
`Function C
`Function D
`Function Z (forward hardware prep.)
`
`Software
`Hardware
`
`Remote software
`upgrade
`
`Function A
`Function B
`Function C
`Function D
`Function Z (forward hardware prep.)
`
`35
`
`
`
`Software
`Hardware
`
`Hardware addition
`
`BB unit A
`
`BB unit B
`
`BB unit A
`
`BB unit B
`
`BB unit C
`(new)
`
`Figure 6
`Backward hardware compatibility.
`
`36
`
`tion. Figure 6 shows the backward hardware
`compatibility concept. The baseband unit,
`C, is added to the existing RBS to improve
`functionality and capacity.
`Downlink processing
`board—TX board
`
`Downlink processing functions
`
`Figure 7 shows the main function blocks for
`processing the downlink. Each of these
`blocks also contains other baseband func-
`tions (not pictured). The first process is frame
`protocol (FP) handling (pictured left). After
`confirming when the data frames on the com-
`mon channels (paging channel, PCH, and
`forward access channel, FACH) and the ded-
`icated channels (DCH) arrived from the Iub
`interface, the frame protocol handler aligns
`the frames and extracts the payload part of
`the data frame. The payload part contains the
`data of the uncoded transport channels.
`For the dedicated channels, the encoding
`function block
`• generates the cyclic redundancy check
`(CRC);
`• concatenates the transport blocks;
`• segments the coding blocks;
`• performs convolutional coding or turbo
`coding;
`
`• inserts the first discontinuous transmis-
`sion (DTX);
`• matches rates; and
`• performs the first interleaving.
`To fit the 10 ms radio frame, the transport
`blocks from different transport channels are
`multiplexed in the multiplexing unit
`(MUX) function block. This activity is fol-
`lowed by insertion of the second DTX, the
`second interleaving, and multicode split-
`ting. Data and control information are then
`sent to the cell-split function block. The
`control information contains transport for-
`mat combination indicator (TFCI) bits and
`corresponding transmission power control
`(TPC) commands which have been mapped
`with pilot bits onto the dedicated physical
`control channel (DPCCH).
`After the frame protocols have been han-
`dled, the broadcast channel (BCH, which is
`mapped to the primary common control
`physical channel, P-CCPCH, and to PCH
`and FACH) and PCH and FACH (which are
`mapped to the secondary common control
`physical dedicated channel, S-CCPCH) are
`processed in a manner similar to that de-
`scribed for the dedicated channels. The cell-
`split function identifies the common and
`dedicated physical channels that belong to
`one cell carrier. These processes are followed
`by modulation, spreading and weighting,
`
`Ericsson Review No. 1, 2003
`
`
`
`lub l/f
`
`BCH
`encoding
`
`PCH
`encoding
`
`FACH
`encoding
`
`PCH FP
`
`FACH FP
`
`l/f to TRX
`
`Modulation
`spreading
`
`DCH FP
`
`DCH
`encoding
`
`MUX
`
`Cell
`split
`
` DL/UL l/f
`
`Figure 7
`Downlink processing function blocks.
`
`to the TRX. It also measures the transmit-
`ted code power and handles all cell-carrier
`processing-related functionality.
`The physical layer processing controller
`handles the configuration of the symbol-
`
`Figure 8
`TX board implementation.
`
`with power information for the downlink
`power control, and scrambling.
`
`TX board implementation
`Figure 8 shows the downlink processing
`board (TX board), which is divided into two
`main parts: the board processor and board-
`specific hardware. The board processor con-
`trols the board and parts of the traffic. The
`board-specific hardware, which processes
`user data sent to the air interface, contains
`Iub user-plane
`the
`interface handler,
`symbol-rate processor, chip-rate processor,
`and the physical layer processing controller.
`The Iub user-plane interface handler han-
`dles the Iub interface user-plane protocol for
`the DCH and CCH data streams to the radio
`network controller.
`The symbol-rate processor handles the
`transport channel (TrCH), the coded com-
`posite transport channel (CCTrCH), the
`physical channel for the primary and sec-
`ondary common control physical channels,
`the paging indicator channel (PICH), and
`the dedicated physical channel (DPCH).
`The chip-rate processor handles the dis-
`tribution of physical channels, generates the
`synchronization channel (SCH), the prima-
`ry common pilot channel (P-CPICH) and
`acquisition indicator channel (AICH), and
`transmits the distributed output sequences
`
`Ericsson Review No. 1, 2003
`
`37
`
`
`
`Figure 9
`TX board of the RBS3000 series.
`
`38
`
`and chip-rate processing parts with respect
`to the control of measurements, set-up, re-
`lease, and reconfiguration of cell-carriers
`and channels.
`The functionality of the Iub user-plane in-
`terface handler and the physical layer pro-
`cessing controller is implemented in DSPs
`to give flexible implementation of
`• the controller functions;
`• external interfaces to the RNC for the user
`data interface; and
`• interfaces to the board processor for the
`control interface.
`The symbol-rate processing functionality is
`implemented in FPGAs due to processing
`delay and varying requirements put on the
`throughput of user data. Some flexibility is
`also provided in view of changing require-
`ments for the implemented functionality.
`The chip-rate processing functionality is
`implemented in ASICs. This approach em-
`ploys parallel processing to meet the de-
`mand for limited processing delay. It also
`allows synchronous transmission of the dis-
`tributed output sequence to the TRX.
`Figure 9 shows a TX board used in an
`RBS3000. The board can handle multiple
`cell-carriers with more than one antenna
`branch.
`
`Interface between the TX and RAX boards
`
`The interface between the TX and RAX
`boards supports fast signaling for controlling
`
`call set-up and power. When the user equip-
`ment (UE) sets up a call to the RBS, the cor-
`responding RAX board in the RBS reserves
`sufficient resources. The RAX board then
`sends a layer-1 acknowledgement signal via
`the TX board to the UE, indicating that the
`UE may send the RACH message part. To
`control power in the downlink, the RAX
`board detects the TPC commands and sends
`them to the TX board, which adjusts down-
`link transmission power.
`To control power in the uplink, the RAX
`board compares the signal-to-interference
`ratio (SIR) target with the SIR of the re-
`ceived signals and generates the TPC com-
`mands, which it sends to the UE in the
`downlink DPCCH.
`
`Uplink processing
`board—RAX board
`
`Uplink processing functions
`In the uplink, the signals received from the
`air interface are input to the baseband in a
`digital signal format from the TRX radio
`part of the RBS (Figure 10). For the dedi-
`cated physical channel (DPCH), the incom-
`ing signals from the TRX are processed in
`the demodulator function block, which con-
`tains a searcher and RAKE receiver. The de-
`modulator
`• performs de-spreading;
`
`Ericsson Review No. 1, 2003
`
`
`
` DL/UL l/f
`
`lub l/f
`
`l/f to TRX
`
`RACH FP
`
`RACH
`decoder
`
`RACH demodulator
`RAKE
`Searcher
`
`Preamble
`detection
`
`DCH FP
`
`DCH
`decoder
`
`DMUX
`
`Cell
`combiner
`
`DCH demodulator
`RAKE
`Searcher
`
`Figure 10
`Uplink processing function blocks.
`
`• recovers the uplink control channel data
`and DPDCH data;
`• generates uplink TPC (UL-TPC) com-
`mands;
`• detects downlink TPC (DL-TPC) com-
`mands; and
`• decodes and de-maps the TFCI.
`
`Searcher
`
`In multipath propagation environments,
`the RAKE receiver must know when the
`multipath rays arrive—that is, it must de-
`termine the position of the multipath rays
`along the delay axis, so that it can allocate
`the RAKE fingers to positions where the
`multipath components hit with signal
`power. The task of the searcher in the base-
`band is to synchronize the RAKE fingers.
`To speed up the searching process, a nar-
`row searcher window is placed where the
`multipath rays are expected. However, in
`some cases, such as soft-handover set-up, the
`propagation delay is unknown; therefore, a
`wide searcher window is needed that corre-
`sponds to the entire cell range. The searcher
`also estimates the profiles of radio channel
`delay and sends them to the RAKE receiver.
`
`RAKE receiver
`
`The RAKE receiver separates the multipath
`components and combines them coherently
`into a large signal vector that provides good
`demodulation conditions. This increases the
`
`Ericsson Review No. 1, 2003
`
`probability of making correct decisions and
`improves receiver performance.
`Given the proper spreading code, the
`RAKE receiver can de-spread all detected
`multipath rays. Using the pilot bits to es-
`timate channel amplitude, phase, frequen-
`cy offset and Doppler spread, the RAKE re-
`ceiver processes the multipath rays with the
`corresponding weighting, and combines
`the rays. Before combining the rays, how-
`ever, each ray is processed by one RAKE
`finger.
`To make efficient use of the hardware re-
`sources, the RAKE fingers can be treated as a
`pool of hardware resources. They can also be
`flexibly allocated between users on the same
`RAX. This allocation is made according to
`the position information delivered by the
`searcher. Fewer RAKE fingers are needed in
`rural settings with a line-of-sight connection
`between UEs and the radio base station than
`in urban settings with multipath fading.
`During softer handover, which is the
`handover between cells in the same RBS and
`on the same carrier, the detected signals are
`combined.
`The DPCH signals are demultiplexed and
`de-mapped to the DCH of the transport
`channel for the next step of processing in the
`decoder. The decoder input signal consists
`of interleaved soft bits from the demodula-
`tor. The following tasks are performed in the
`decoder block:
`
`39
`
`
`
`BP
`
`L1 acknowledge to TXB
`
`CCH symbol-rate processing
`
`CCH chip-rate processing
`
`ASIC
`
`DSP/FPGA
`
`ASIC
`
`DSP/FPGA
`
`DCH symbol-rate processing
`
`DCH chip-rate processing
`
`ASIC
`
`DSP/FPGA
`
`ASIC
`
`DSP/FPGA
`
`Iub control frames from TXB
`
`Synchronization,
`power control and
`feedback information
`to TXB
`
`Iub user plane to RNC
`
`UU L1 data from TRX
`
`Figure 11
`RAX board implementation.
`
`• the second de-interleaving;
`• desegmentation of the physical channel;
`• service demultiplexing;
`• rate matching;
`• radio frame de-segmentation;
`• the first de-interleaving;
`• convolutional and turbo decoding; and
`• error detection by the CRC.
`When the UE tries to contact a radio base
`station, the random-access receiver detects
`the preamble that contains the signature
`used for the RACH message part. When it
`has detected the preamble, it determines
`which signature the RACH message part is
`using, and whether sufficient baseband re-
`sources are available. If so, it sends a
`layer-1 Ack or Nack message to the UE via
`downlink processing and begins processing
`the RACH message part in a similar man-
`ner as described for the DCH.
`The frame protocol function for the DCH
`and RACH assembles frame protocol data,
`which consists of a header part and a pay-
`load part (user data). Frame protocol data
`frames are sent to the RNC via the Iub user
`plane.
`The RAX board recovers and restores the
`information originally transmitted from the
`incoming radio signal for random access and
`dedicated channels. The 3GPP has defined
`the requirements put on uplink reception
`
`40
`
`performance.7
`sensitivity,
`Reception
`signal-to-interference performance, and the
`capacity of the physical channels determine
`the characteristics of the receiver.
`
`RAX board implementation
`The uplink processing board (RAX board)
`is divided into two main parts: the board
`processor (BP), and board-specific user-
`data-processing (DP) hardware. The board
`processor controls the board and parts of the
`traffic. The DP hardware processes user data
`received from the air interface to the Iub in-
`terface. Figure 11 shows the blocks on a
`RAX board in the RBS3000.
`The DP part contains blocks for process-
`ing the CCH chip rate, DCH chip rate, CCH
`symbol rate, and DCH symbol rate.
`The CCH chip-rate processing block de-
`tects the preamble, generates the acquisition
`indicator, and detects and extracts the mes-
`sages (DPDCH/DPCCH) for the physical
`random access channel (PRACH) from the
`data received on the air interface.
`The DCH chip-rate processing block de-
`tects
`and
`extracts
`the DPCH
`(DPDCH/DPCCH) from the data available
`on the air interface, including power control
`support.
`The CCH symbol-rate processing block
`processes the CCTrCH provided by the
`CCH chip-rate processing block into de-
`coded TrCH, which is sent via the Iub frame
`protocol to the radio network controller.
`The DCH symbol-rate processing block
`processes the CCTrCH provided by the
`DCH chip-rate processing blocks into
`decoded TrCH, which is sent via the Iub
`frame protocol to the radio network
`controller.
`Algorithms and functionality for process-
`ing stable user data have been implement-
`ed in fixed hardware (ASIC) to yield high
`capacity. By contrast, algorithms for pro-
`cessing variable user data, such as channel
`estimation, are allocated in loadable hard-
`ware (DSP or FPGA). New functionality,
`due to enhancements to 3GPP standards, is
`also implemented in loadable hardware
`(DSP and FPGA).
`The block structure (Figure 11) and the
`mix of fixed and loadable hardware results
`in a future-proof architecture:
`• Reception sensitivity can be improved by
`upgrading the algorithms in loadable
`hardware and software.
`• The hardware has been prepared to sup-
`port future 3GPP functions (future re-
`leases). This means that basic functional-
`
`Ericsson Review No. 1, 2003
`
`
`
`ity and extensions of the 3GPP physical
`layer can be upgraded.
`• The scalable nature of the DCH and CCH
`ensures that the capacity of each block can
`be increased using new ASIC, FPGA, and
`DSP technologies.
`• The block structure supports integra-
`tion within as well as between process-
`ing blocks. This also leads to greater ca-
`pacity.
`Ericsson’s use of modular building blocks
`enables operators to vary the implementa-
`tion as needed. For example, a low-capacity
`DCH/CCH solution would make use of
`separate low-capacity DCH/CCH chip-
`rate processing and combined symbol-rate
`processing, whereas
`a high-capacity
`DCH/CCH solution would make use of
`separate, scalable, high-capacity DCH
`chip- and symbol-rate processing and com-
`bined CCH chip- and symbol-rate pro-
`cessing.
`Figure 12 shows a RAX board used in the
`RBS3000. The board supports two-way
`diversity and can handle multiples of 16-
`channel elements serving up to six cell car-
`riers.
`
`Future baseband
`enhancements
`
`High-speed downlink packet-data
`access
`High-speed downlink packet-data access
`(HSDPA) can be introduced in the down-
`link for best-effort services. This enhance-
`ment can increase the bit rate to more than
`10 Mbit/s in the existing frequency band.3
`HSDPA can be implemented in the TX
`board for the downlink by exploiting more
`advanced baseband technology.
`
`Interference cancellation
`Interference cancellation can be introduced
`in the uplink DCH receiver to improve cov-
`erage or to increase capacity. The main ef-
`fect of interference cancellation is reduced
`interference received from users in the same
`cell as the target user. This technique can
`either increase the amount of uplink traffic
`or reduce the interference margin in the di-
`mensioning, thus increasing coverage.
`The configuration can be serial or paral-
`lel. Serial configurations yield the greatest
`improvement in performance and require
`less processing power, but result in greater
`delay. Parallel configurations, which offer a
`reasonable improvement in performance, re-
`
`Ericsson Review No. 1, 2003
`
`Figure 12
`RAX board of RBS3000 product series.
`
`quire greater processing power, but result
`in shorter delay. Parallel configurations are
`thus preferred for voice service.
`
`Conclusion
`The baseband part of Ericsson’s RBS3000
`provides a hardware platform for third-
`generation radio network functions and
`complies in full with the 3GPP WCDMA
`standard. All physical layer functions and
`frame protocol processing are implemented
`on the baseband boards.
`The baseband design supports free alloca-
`tion of baseband resources to frequency and
`sectors, thereby supporting operator needs
`for flexibility in configuring the radio net-
`work for different sites. The architecture
`scales easily to meet operator demands for
`capacity. The baseband software and hard-
`ware support forward hardware prepara-
`tion—for future functional enhancements.
`The baseband architecture is also backward
`compatible—that is, operators will be able
`to insert future-generation hardware into an
`existing platform running the RBS infra-
`structure.
`Planned enhancements to the baseband
`include HSDPA, to increase the bit rate for
`best-effort service in the downlink, and in-
`terference cancellation, to improve coverage
`or capacity in the uplink.
`
`REFERENCES
`
`1 Kling, L., Lindholm, Å., Marklund L. and
`Nilsson G: CPP—Cello packet platform,
`Ericsson Review Vol. 79(2002):2, pp. 68-
`75
`2 Zune, P.: Family of RBS 3000 products for
`WCDMA systems, Ericsson Review Vol.
`77(2000):3, pp. 170-177
`3 Hedberg, T. and Parkvall, S.: Evolving
`WCDMA, Ericsson Review Vol. 77(2000):2,
`pp. 124-131
`4 3GPP WCDMA Technical Specification
`25.211
`5 3GPP WCDMA Technical Specification
`25.301
`6 3GPP WCDMA Technical Specification
`25.214
`7 3GPP WCDMA Technical Specification
`25.104
`
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`