UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________________________
`
`Intel Corporation
`Petitioner
`
`v.
`
`VLSI Technology LLC
`Patent Owner
`
`U.S. Patent No. 7,246,027
`Claims 1-3, 5-12, and 18-20
`____________________________________________
`
`Case IPR2019-01196
`____________________________________________
`
`DECLARATION OF DAVID HARRIS, PH.D.
`ON BEHALF OF PETITIONER
`
`INTEL 1005
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`Table of Contents
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`INTRODUCTION ........................................................................................... 4
`I.
`II. MATERIALS REVIEWED ............................................................................ 6
`SUMMARY OF OPINION ............................................................................. 7
`III.
`IV. RELEVANT LEGAL STANDARDS ............................................................. 8
`Claim Construction ............................................................................... 8
`A.
`B.
`Obviousness ......................................................................................... 10
`Scope of Opinion ................................................................................. 12
`C.
`RELEVANT TECHNOLOGY ...................................................................... 13
`Integrated Circuits ............................................................................... 13
`A.
`Voltage Regulators / DC-to-DC Converters ....................................... 13
`B.
`Adjusting Power Supply Voltage to Account for Manufacturing
`1.
`Variations .................................................................................. 13
`Adjusting Power Supply Voltage to Account for Changes in
`Temperature .............................................................................. 15
`Adjusting Power Supply Voltage to Account for Changes in
`Operating Speed ........................................................................ 15
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`V.
`
`II.
`III.
`
`2.
`
`3.
`
`The ʼ027 Patent .............................................................................................. 17
`Alleged Problem .................................................................................. 17
`A.
`Purported Solution ............................................................................... 17
`B.
`C.
`Prosecution History ............................................................................. 22
`
`Claim Construction ........................................................................................ 23
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`1
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`
`1. 
`2. 
`3. 
`
`“determining/determine an analog variation parameter” ..... 25 
`“determining/determine an operational temperature” ........... 27 
`“determining/determine a digital variation parameter”......... 27 
`
`IV. 
`V. 
`VI.  Grounds .......................................................................................................... 59 
`
`Person of Ordinary Skill in the Art ................................................................ 29 
`
`Overview of Principal Prior Art References ................................................. 29 
`A. 
`Starr (U.S. Patent No. 6,933,869) ....................................................... 29 
`B. 
`Bilak (U.S. Patent No. 7,577,859) ...................................................... 43 
`C. 
`Kang (U.S. Patent No. 7,583,555) ...................................................... 50 
`
`B. 
`
`A.  Ground 1: Claims 1, 2, 8, 9, 18, and 19 are Obvious Over Starr in
`View of Bilak ...................................................................................... 59 
`1. 
`Claim 1 ...................................................................................... 59 
`2. 
`Claim 2 ....................................................................................104 
`3. 
`Claim 8 ....................................................................................104 
`4. 
`Claim 9 ....................................................................................108 
`5. 
`Claim 18 ..................................................................................109 
`6. 
`Claim 19 ..................................................................................110 
`Ground 2: Claims 3, 5, 6, 7, 10, 11, 12, and 20 are Obvious Over
`Starr in View of Bilak and Kang. ......................................................111 
`1. 
`Claim 3 ....................................................................................112 
`2. 
`Claim 5 ....................................................................................132 
`3. 
`Claim 6 ....................................................................................138 
`4. 
`Claim 7 ....................................................................................140 
`5. 
`Claim 10 ..................................................................................141 
`6. 
`Claim 11 ..................................................................................142 
`7. 
`Claim 12 ..................................................................................144 
`8. 
`Claim 20 ..................................................................................145 
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`VI.  AVAILABILITY FOR CROSS-EXAMINATION ....................................145 
`VII.  RIGHT TO SUPPLEMENT ........................................................................146 
`APPENDIX A ........................................................................................................148 
`APPENDIX B ........................................................................................................149 
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`I.
`
`INTRODUCTION
`
`1. My name is Dr. David Harris, Ph.D. My qualifications are described
`
`below and in more detail in my curriculum vitae, attached as Appendix A.
`
`2.
`
`I am the Harvey S. Mudd Professor of Engineering Design and
`
`Harvey Mudd College, where I have taught since 1999 and am presently the
`
`Associate Chair of the Engineering Department. I earned my Ph.D. in Electrical
`
`Engineering from Stanford University in 1999. I earned my Masters of
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`Engineering in Electrical Engineering and Computer Science from MIT in 1994,
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`and also earned my S.B. degrees in Electrical Engineering and Mathematics there
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`at the same time.
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`3.
`
`I have been active in research and development of integrated circuits
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`since 1992, with particular emphasis on low-power and high-speed integrated
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`circuits. In 2012-2014, I was a Technical Director at Broadcom Corporation,
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`where I led the development of Broadcom’s first 16 nm microprocessor, as well as
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`several techniques for low power integrated circuits. In 1997-2009, I was a
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`Visiting Professor at Sun Microsystems. In 1994-1997, I was a Senior Engineer at
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`Intel Corporation, where I developed components of the Pentium II and Itanium
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`microprocessors. In 1992-1994, I was a researcher in the Concurrent VLSI
`
`Architecture group at MIT, where I developed components of the Context Cache
`
`and J-Machine chips.
`
`4.
`
`I am the author of CMOS VLSI Design, the leading textbook in my
`
`field. I am also an author of three other textbooks related to integrated circuits and
`
`digital systems. I am a named inventor on 16 patents in the field, and have
`
`published dozens of papers in the area and served on various conference technical
`
`committees.
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`5.
`
`I am a licensed professional electrical engineer in the State of
`
`California.
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`6.
`
`I have been retained by counsel for the Petitioner as an expert in the
`
`field of electronic circuit design and analysis. I am working as an independent
`
`consultant in this matter and am being compensated at my normal consulting rate
`
`of $400 per hour for my time. My compensation is not dependent on and in no
`
`way affects the substance of my statements in this Declaration.
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`7.
`
`To the best of my knowledge, I have no financial interest in Petitioner.
`
`Petitioner’s counsel has informed me that VLSI Technology LLC (“VLSI”)
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`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`purports to own the ’027 patent. To the best of my knowledge, I have no financial
`
`interest in VLSI, and I have had no contact with VLSI or the named inventors of
`
`the patent, Marcus W. May and Matthew D. Felder. To the best of my knowledge,
`
`I similarly have no financial interest in the ’027 patent. To the extent any mutual
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`funds or other investments I own have a financial interest in the Petitioner, Intel,
`
`VLSI, or the ’027 patent, I am not aware of, nor do I have control over, any
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`financial interest that would affect or bias my judgment.
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`II. MATERIALS REVIEWED
`
`8.
`
`I have reviewed the specification, claims, and file history of U.S.
`
`Patent No. 7,246,027 (the “’027 patent”). I understand that the ’027 patent was
`
`filed on March 11, 2005 and issued on July 17, 2007. I understand that, for
`
`purposes of determining whether a publication will qualify as prior art, the earliest
`
`date that the ’027 patent is entitled to is March 11, 2005.
`
`9.
`
`I have reviewed the following patents in preparing this declaration:
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` U.S. Patent No. 6,933,869 (“Starr” (Ex. 1002)), which was filed March
`
`17, 2004 and issued August 23, 2005
`
` U.S. Patent No. 7,577,859 (“Bilak” (Ex. 1003)), which was filed on
`
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`February 20, 2004 and issued August 18, 2009
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` U.S. Patent No. 7,583,555 (“Kang” (Ex. 1004)), which was filed on
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`March 30, 2004 and issued September 1, 2009
`
`10.
`
`I have been informed and understand that each of the references above
`
`qualify as prior art to the ’027 patent.
`
`III. SUMMARY OF OPINION
`
`11.
`
`I have been asked to consider whether the references listed above in
`
`paragraph 6 disclose or teach the features recited in the claims of the ’027 patent. I
`
`have also been asked to consider the state of the art and the prior art available
`
`before time of the alleged invention. My opinions are provided in this declaration.
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`12.
`
`I have reviewed the above patent and any other publication cited in
`
`this declaration. A list of materials I relied upon in forming my opinions in
`
`preparing this declaration is included as Appendix B.
`
`13.
`
`I have considered certain issues from the perspective of a person of
`
`ordinary skill in the art as described below at the time the ’027 patent application
`
`was filed. It is my opinion that every limitation described in claims 1-3, 5-12, and
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`18-20 (“the challenged claims”) of the ’027 patent is taught by the prior art and
`
`that claims 1-3, 5-12, and 18-20 are rendered obvious by the prior art.
`
`IV. RELEVANT LEGAL STANDARDS
`
`14.
`
`I am not an attorney. For the purposes of this declaration, I have been
`
`informed about certain aspects of the law that are relevant to my opinions. My
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`understanding of the law is as follows:
`
`A. Claim Construction
`15.
`I understand that the terms of a patent claim are generally given their
`
`ordinary and customary meaning. This is the meaning that the term would have to
`
`a person of ordinary skill in the art as of the time of the alleged invention.
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`16.
`
`I understand that terms of a claim should be understood in the context
`
`of the claim as a whole. I also understand that the specification of the patent is
`
`relevant to the meaning of a claim term. I understand that the claims must be read
`
`in light of the specification.
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`17.
`
`I understand that the file history may also be considered when
`
`interpreting the meaning of the claims of a patent. The file history can contain
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`evidence of how the U.S. Patent and Trademark Office (“PTO”) and the applicant
`
`understood the patent and the meaning of the terms of the patent.
`
`18.
`
`I understand that the claim language, specification, and prosecution
`
`history are referred to as “intrinsic evidence.”
`
`19.
`
`I understand that evidence from an expert in the field may also be
`
`relevant in the determination of how a person of ordinary skill in the art would
`
`understand the claims. I understand that this evidence, which is referred to as
`
`“extrinsic evidence,” must be considered in the context of the intrinsic evidence
`
`and cannot be used to change the meaning of a claim term to be inconsistent with
`
`the intrinsic evidence.
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`
`B. Obviousness
`20.
`I have been informed and understand that a patent claim can be
`
`considered to have been obvious to a person of ordinary skill in the art at the time
`
`the application was filed. This means that, even if all of the requirements of a
`
`claim are not found in a single prior art reference, the claim is not patentable if the
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`differences between the subject matter in the prior art and the subject matter in the
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`claim would have been obvious to a person of ordinary skill in the art at the time
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`the application was filed.
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`21.
`
`I have been informed and understand that a determination of whether
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`a claim would have been obvious should be based upon several factors, including,
`
`among others:
`
` the level of ordinary skill in the art at the time the application was filed;
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` the scope and content of the prior art;
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` what differences, if any, existed between the claimed invention and the
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`prior art; and
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` objective evidence, or secondary considerations.
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
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`22.
`
`I have been informed and understand that the teachings of two or
`
`more references may be combined, if such a combination would have been obvious
`
`to one having ordinary skill in the art. In determining whether a combination
`
`based on either a single reference or multiple references would have been obvious,
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`I have been informed and understand that it is appropriate to consider, among other
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`factors:
`
` whether the teachings of the prior art references disclose known concepts
`
`combined in familiar ways, which, when combined, would yield
`
`predictable results;
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` whether a person of ordinary skill in the art could implement a
`
`predictable variation, and would see the benefit of doing so;
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` whether the claimed elements represent one of a limited number of
`
`known design choices, and would have a reasonable expectation of
`
`success by those skilled in the art;
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` whether a person of ordinary skill would have recognized a reason to
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`combine known elements in the manner described in the claim;
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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` whether there is some teaching or suggestion in the prior art to make the
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`modification or combination of elements claimed in the patent; and
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` whether the alleged invention applies a known technique that had been
`
`used to improve a similar device or method in a similar way.
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`23.
`
`I understand that one of ordinary skill in the art has ordinary
`
`creativity, and is not an automaton.
`
`24.
`
`I understand that in considering obviousness, it is important not to
`
`determine obviousness using the benefit of hindsight derived from the patent being
`
`considered.
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`C.
`25.
`
`Scope of Opinion
`I have been informed and understand that the Petitioner in an inter
`
`partes review may request cancelation of claims as unpatentable only on grounds
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`that such claims are anticipated or would have been obvious to a person of
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`ordinary skill in the art at the time of the purported invention, and only on the basis
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`of prior art consisting of patents or printed publications. My opinions in this
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`matter address only such requests.
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`V. RELEVANT TECHNOLOGY
`
`A.
`Integrated Circuits
`26. An integrated circuit (or “IC”) is a combination of interconnected
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`electronic components, such as transistors, diodes, resistors, and capacitors.
`
`Typically, integrated circuits require a power source such as a battery. However, a
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`circuit can require a different power supply voltage than what the power source can
`
`provide.
`
`B. Voltage Regulators / DC-to-DC Converters
`27. To account for these differing voltage requirements, an electrical
`
`circuit can use voltage regulators to convert an input voltage (e.g., received from a
`
`battery) to different voltage levels and output the new voltages to downstream
`
`circuits. A DC-to-DC converter is an electronic device that can convert a source of
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`direct current (DC) from one voltage level to another voltage level.
`
`1.
`
`Adjusting Power Supply Voltage to Account for
`Manufacturing Variations
`It has long been known that, “[a]lthough the manufacture of integrated
`
`28.
`
`circuits is carefully controlled, inherent variations in the fabrication process cannot
`
`be avoided.” U.S. Patent No. 7,170,308 to Rahim et al. (“Rahim”) (Ex. 1007),
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`filed on July 28, 2003, issued on January 30, 2007, at 1:10-15, 1:18-20 (“The
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`resulting device parametric variations occur from lot to lot and from wafer to
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`wafer, but also within wafers and even within dice.”). As a result, the supply
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`voltage, i.e., the “voltage obtained from a power source for operation of a circuit or
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`device,” needed by one circuit may be higher or lower than the voltage needed by
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`other identically-designed circuits. Dictionary of Electrical and Computer
`
`Engineering (2003) (Ex. 1008) at 561.
`
`29. This manufacturing variation can be addressed by adjusting the
`
`voltage regulator output on a part-by-part basis to match each part’s needs. That
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`approach can save power by allowing the voltage regulator to output a lower
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`voltage in situations when the circuit does not require a higher voltage to operate
`
`as designed. Ex. 1003, Abstract, 1:64-66 (discussing prior art approach of
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`“tailoring of the operating voltage … on a part-by-part basis” due to “variations
`
`within the semiconductor manufacturing process”).
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`
`2.
`
`Adjusting Power Supply Voltage to Account for Changes in
`Temperature
`30. During operation of an integrated circuit, the temperature of a circuit
`
`component can fluctuate due to a variety of circumstances, including heat
`
`generated by the component and/or by external environmental conditions. The
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`performance and voltage needs of a circuit component can vary over time due to
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`these temperature changes.
`
`31.
`
`It was known in the prior art to compensate for temperature variations
`
`by adjusting the voltage provided to a circuit component. Ex. 1003, Abstract
`
`(discussing “tailoring of the operating voltage of integrated circuits … by
`
`adapting operating voltage in response to … temperature variations”).1
`
`3.
`
`Adjusting Power Supply Voltage to Account for Changes in
`Operating Speed
`32. The speed of an integrated circuit depends on “propagation delay,”
`
`which is “the time a signal takes to travel through a circuit” and is “often measured
`
`in terms of gate delays.” U.S. Pat. No. 6,535,735 (“Underbrink”), filed on March
`
`
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`1 Unless otherwise noted, all emphasis is added.
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`22, 2001, issued on March 18, 2003, (Ex. 1009) at 3:16-17, 6:45-46. The speed of
`
`a circuit is also affected by temperature and fabrication variations. Id., 5:28-31
`
`(“The propagation speed of signals through the circuitry is also affected by the
`
`circuitry temperature, power supply voltage, fabrication variables, packaging
`
`variables, and other factors.”). In general, the power supply voltage can be
`
`increased when faster circuit speed is desired, and reduced when slower circuit
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`speed is acceptable. Id., 10:2-10 (“If the DC level is high, meaning the
`
`propagation delay in the critical circuit is high, the power supply will be increased.
`
`By increasing the power supply the speed of propagation of the signals through the
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`circuit may be increased. If the DC level is low, meaning the propagation delay in
`
`the critical circuit is low, the power supply may be decreased. By decreasing the
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`power supply the speed of propagation of the signals through the circuit may be
`
`decreased, and the power dissipation of the circuit lowered.”).
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`II.
`
`THE ʼ027 PATENT2
`A. Alleged Problem
`33. The ’027 patent admits that techniques for reducing power were well
`
`known in the prior art. For example, the ’027 patent describes known power-
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`saving techniques such as “put[ting] the device in a ‘sleep’ mode when the entire
`
`device is not in use,” Ex. 1001, 1:59-62, or operating devices “at lower voltages,
`
`thus consuming less power,” id., 1:63-66. According to the patent, however, prior
`
`art techniques for reducing power were supposedly “designed assuming the worst-
`
`case operation of an integrated circuit” as a whole, and “not individually optimized
`
`on a chip-by-chip basis.” Id., 2:9-15.
`
`B.
`Purported Solution
`34. The ’027 patent does not claim to invent a new voltage regulator or
`
`new techniques for measuring parameters of an integrated circuit. Nor does the
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`patent claim to have discovered that manufacturing variances, temperature, and
`
`
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`2 The ’027 patent title refers to a “mixed-signal” system, which is a system that
`
`contains both analog and digital circuitry. Ex. 1001, Abstract.
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`17
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`

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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`speed can affect the power needed by a component. Instead, the patent claims to
`
`reduce power consumption by adjusting a supply voltage to a circuit based on (1)
`
`an “analog variation parameter,” which can be the threshold voltage of the circuit,
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`(2) temperature, and (3) circuit speed.
`
`35. For example, Figure 8 shows process sense module 208 (blue) and
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`operational temperature sensor 210 (red) coupled to DC-to-DC converter 26
`
`(yellow):
`
`Ex. 1001, Fig. 8.3 During operation, process sense module 208 “senses the analog
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`
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`3 Unless otherwise noted, all color highlighting in the figures has been added.
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`variation parameter” (such as the threshold voltage) of integrated circuit 100, and
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`outputs analog parameter signal 215 (green), which can change over time based on
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`sensed changes to the threshold voltage. Id., 2:40-45, 12:23-25; id., 10:63-64
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`(example of “the analog variation parameter is the threshold voltage Vt”); id.,
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`12:10-12 (“With the operational temperature T, the absolute value of the threshold
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`voltage |Vt| trends downward as the as the [sic] operational temperature T
`
`increases”).
`
`36. Operational temperature sensor 210 senses the operational
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`temperature of integrated circuit 100 and outputs that measured value as
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`temperature signal 216 (brown). Id., 12:25-30 (The operational temperature sensor
`
`210 senses the operational temperature of an IC 100 portion. This value is
`
`associated with the analog variation parameter determination of the process sense
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`module 208. The operational temperature sensor 210 provides a temperature
`
`signal 216.”). Look up table 214 (orange) receives analog parameter signal 215
`
`and temperature signal 216 and, based on those two received signals, outputs AVDD
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`adjust signal 218 (pink) to DC-to-DC converter 26. Id., 11:16-18 (“The AVDD,
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`adjust signal 218 provides a mechanism for adjustment of the DC-to-DC converter
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`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
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`26.”); 12:23-32 (“The AVDD, look-up table 214 has inputs that receive the analog
`
`variations parameter signal 215 and the temperature signal 216.”); 12:54-55 (“With
`
`respect to analog circuitry on the IC 100, the AVDD, adjust signal 218 is accepted
`
`by a DC-to-DC converter 26”).
`
`37. The ’027 patent discloses using the speed of the circuit as a variable in
`
`connection with Figure 11:
`
`Id., Fig. 11, 8:62-9:5 (“FIG. 3 is a schematic block diagram of a digital power
`
`conserving circuit 92 of a power conservation unit 250 (see FIG. 2) that includes a
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`20
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`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`portion of an IC 100, a sensing circuit 102, and a comparator 116.”); 14:31-35
`
`(“The power conserving circuit 250 has a component addressing digital circuitry
`
`power optimization-power conserving circuit 92, and a second component
`
`addressing analog circuitry power optimization-analog power conservation circuit
`
`209.”). Comparator 116 produces an adjust supply voltage signal 217 signal (tan)
`
`in response to comparing a measured processing speed 110 (the actual processing
`
`speed of the digital portions of the circuit) to a critical processing speed 112. Id.,
`
`8:62-9:3 (“The portion of the IC 100 may be a speed test circuit (for example, a
`
`plurality of gates interoperably coupled, an adder, a multiplier, ring oscillator, etc.),
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`a critical path within the IC (for example, the path in the IC have the greatest
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`amount of delay), and/or a replica of the critical path within the IC.”); 9:28-31
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`(“The comparator 116 compares the measured processing speed 110 with a critical
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`processing speed 112 to determine whether the supply voltage can be adjusted 114
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`and by how much.”); 14:38-43 (“In operation, the comparator 260 determines the
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`greater of the input values provided. That is, a selection of the digital adjust supply
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`voltage 217 representing the digital variation parameter, or of the AVDD, adjust
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`signal 218 representing the analog variation parameter with respect to the
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`
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`21
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`

`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`operational temperature T.”). Comparator 260 then produces a signal for adjusting
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`the output of the DC-to-DC converter by determining “the greater of” “digital”
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`adjust supply voltage signal 217 and “analog” AVDD adjust signal 218. Id. 14:32-
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`54.
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`38. As explained below, however, it was well known to determine a
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`power supply voltage adjustment signal based on analog variation parameters
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`(such as a threshold voltage), operational temperature, and digital variation
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`parameters (such as circuit speed). Therefore, the challenged claims are
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`unpatentable.
`
`C.
`39.
`
`Prosecution History
`I understand that the ’027 patent issued from U.S. Application No.
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`11/078,150 filed on March 11, 2005. In response to a rejection of original claims
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`1, 9, 21, and 22 as anticipated, the Applicant initially argued that the cited
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`reference “appears to control temperature and voltage parameters of its integrated
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`circuits by power reduction, instead of monitoring the parameters for optimizing
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`power consumption.” Ex. 1006 [6/20/06 Response] at 9. After the Examiner
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`maintained the same rejection, the Applicant amended the final limitation of claim
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`
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`22
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`

`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`1 as follows: “adjusting a regulation signal of a DC-to-DC converter based on the
`
`adjustment signal to optimize power consumption of the integrated circuit, such
`
`that power consumption of the integrated circuit is optimized.” Id. [12/06/2006
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`Response] at 2. Other independent claims were similarly amended. Id., 2-8.
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`III. CLAIM CONSTRUCTION
`40.
`It is my understanding that under Phillips v. AWH Corp., 415 F.3d
`
`1303 (Fed. Cir. 2005) (en banc), claims are construed in view of the entire intrinsic
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`record—the claim language, specification, and prosecution history. Phillips, 415
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`F.3d at 1312-1314; Final Rule, Docket No. PTO-P-2018-0036 (Oct. 3,
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`2018). “[T]he specification is the single best guide to the meaning of a disputed
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`term, and . . . acts as a dictionary when it expressly defines terms used in the
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`claims or when it defines terms by implication.” Id., 1320-21 (internal quotation
`
`marks omitted).
`
`41.
`
`I understand that in the concurrent district court litigation, Petitioner
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`and Patent Owner proposed the following constructions:
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`
`
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`
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`23
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`

`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`
`Claim Term
`
`“determining/determine
`an analog variation
`parameter”
`
`“determining/determine
`an operational
`temperature”
`
`“determining/determine
`a digital variation
`parameter”
`
`Petitioner’s
`Construction
`sensing/sense a
`parameter of an
`analog portion of the
`integrated circuit that
`varies during
`operation
`sensing/sense the
`temperature of the
`integrated circuit
`during operation
`
`sensing/sense a
`parameter of a digital
`portion of the
`integrated circuit that
`varies during
`operation
`
`Patent Owner’s
`Construction
`determining/determine
`a parameter of an analog
`portion of the integrated
`circuit (IC) that may vary on
`an IC-by-IC basis
`
`determining/determine a
`temperature during
`operation
`
`
`determining/determine a
`parameter of a digital
`portion of the integrated
`circuit (IC) that may vary on
`an IC by-IC basis
`
`Ex. 1010 [Joint Chart, Ex. A] at 6-8. I understand that Petitioner proposed its plain
`
`meaning constructions only to provide clarity for a lay jury. As explained below,
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`the prior art renders the claims invalid under both parties’ constructions.
`
`
`
`
`24
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`

`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`
`1.
`“determining/determine an analog variation parameter”
`In the ’027 patent, “determining/determine an analog variation
`
`42.
`
`parameter” (claims 1-3, 5-12, 18-20) means “sensing/sense a parameter of an
`
`analog portion of the integrated circuit that varies during operation.” That meaning
`
`is consistent with the plain language of the claim, which uses the terms
`
`“determining” and “determine” to describe sensing the analog variation parameter
`
`during operation. Moreover, the word “analog” makes clear that the limitation is
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`directed to an analog portion of the integrated circuit, and “variation parameter”
`
`makes clear that the claimed parameter varies during operation.
`
`43. Similarly, the ’027 specification explicitly states that “[t]his
`
`invention” is “particularly” directed to “sensing … analog parameters of an
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`integrated circuit,” and Figure 8 (discussed above) confirms that “process sense
`
`module 208 senses the analog variation parameter.” Ex. 1001, 1:7-10, 12:23-25.
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`44. The specification also confirms that the analog variation parameter
`
`varies during operation. For example, the patent explicitly refers to the analog
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`variation parameter as an “operational parameter” that is sensed “in operation.”
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`Id., 12:23-24 (“In operation, the process sense module 208 senses the analog
`
`
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`
`
`25
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`

`

`Declaration of David Harris
`U.S. Patent 7,246,027 patent, Claims 1-3, 5-12, and 18-20
`
`variation parameter….”); id., 12:36-38 (“The operational parameters being
`
`represented in the analog variation[] parameter signal ….”). The patent further
`
`explains that “[a] suitable value used for assessing the analog variation parameter
`
`is the threshold voltage Vt of the IC,” which varies during operation. Id., 10:63-
`
`64; Id., 2:23-28 (“For example, lower operational temperatures raise the threshold
`
`voltage level for analog components, affecting signal performance, while favorable
`
`for digital component operation. Conversely, higher operational temperatures
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`lower the thre