US006333623B1
`(10) Patent No:
`a2) United States Patent
`US 6,333,623 BL
`Heisley et al.
`(45) Date of Patent:
`Dec. 25, 2001
`
`
`(54) COMPLEMENTARY FOLLOWER OUTPUT
`STAGE CIRCUITRY AND METHOD FOR
`LOW DROPOUT VOLTAGE REGULATOR
`
`(75)
`
`Inventors: David A. Heisley; Tony R. Larson,
`both of Tucson, AZ (US)
`:
`(73) Assignee: Texas Instruments Incorporated,
`Dallas, TX (US)
`;
`;
`.
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`US.C. 154(b) by 0 days.
`
`;
`(*) Notice:
`
`3/1997 Wallace s.vscscssssssssssnsseenenees 323/224
`5,608,312
`6/1997 Edwards) wessessecsesceeevecexeess 323/315
`5,637,992
`
`5,850,139 * 12/1998 Edwards 0...
`eeeeeeeeeee 323/280
`5,864,227
`1/1999 Bordenetal.
`. 323/280
`5,867,015
`2/1999 Corsi et al.
`......
`. 323/316
`5.012.550
`6/1999 Sharpe-Geisler ........- 323/273
`
`5,945,818
`8/1999 Edwards w.ciccccccscceseeeceees 323/273
`
`5,966,004 * 10/1999 Kadanka woe
`ese 323/271
`11/1999 Rincon-Mora
`sssssessssessseenee 327/541
`5,982,226
`
`11/1999 Nakatsuka so... 363/73
`5,986,910
`
`6,034,519
`3/2000 Yang ecccececneee
`. 323/316
`2/2001 Rincon-Moraetal... 323/280
`6,188,211 *
`
`;
`* cited by examiner
`
`Primary Examiner—ShawnRiley
`(21) Appl. No.: 09/703,183
`(74) Attorney, Agent, or 'irm—W. Daniel Swayze, Jr; W.
`,
`James Brady; Frederick J. Telecky, Jr.
`(22)
`Filed:
`Oct. 30, 2000
`(57)
`ABSTRACT
`(SL)
`Tint, C17 ceceeeecsesnsneeeceeeenneseeensenmeeessene GOSF 1/40
`
`(52) U.S. Che ou...
`. 323/280; 323/281; 323/224
`.
`A low drop-out
`(58) Field of Search
`323/280, 273
`(““LDO”) voltage regulator includes an
`output stage of having a pass device and a discharge device
`323/281, 315, 316, 224
`, a arranged in complementary voltage follower configurations
`“~
`to both source load current to and sink load current from a
`regulated output voltage conductor. The pass device and the
`discharge device are controlled through a single feedback
`«(op
`
`(56)
`
`References Cited
`
`4,779,037
`5,061,862
`5,414,341
`
`U.S. PATENT DOCUMENTS
`10/1988 LoCascio sessesseseseesseeseeeeee 3237275
`10/1991 Tamagawa .
`S/1995 BrOWN w.seeesccssesssseeseseseseeee 323/268
`
`100
`
`24 Claims, 6 Drawing Sheets
`
`Vin
`0
`
`Ca eT
`
`1102
`
`INTEL 1013
`
`INTEL 1013
`
`

`

`U.S. Patent
`
`Dec. 25, 2001
`
`Sheet 1 of 6
`
`US 6,333,623 B1
`
`1
`FIG.
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`(PRIOR ART)
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`U.S. Patent
`
`Dec. 25, 2001
`
`Sheet 2 of 6
`
`US 6,333,623 BI
`
`FIG. §
`(PRIOR ART)
`
`48
`
`66
`
`© Vout
`
`
`
`

`

`U.S. Patent
`
`Dec. 25, 2001
`
`Sheet 3 of 6
`
`US 6,333,623 B1
`
`FIG. 5
`(PRIOR ART)
`
`VIN
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`coff
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`

`

`U.S. Patent
`
`Sheet 4 of 6
`
`FIG. 7
`
`Dec. 25, 2001
`
`US 6,333,623 B1
`
`
`

`

`U.S. Patent
`
`Sheet 5 of 6
`
`Dec. 25, 2001
`
`US 6,333,623 B1
`
`

`

`U.S. Patent
`
`Sheet 6 of 6
`
`Dec. 25, 2001
`
`US 6,333,623 B1
`
`

`

`US 6,333,623 B1
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates generally to low dropout
`(“LDO”) voltage regulators. More particularly, the present
`invention relates to improvements in LDO voltage regula-
`tors that use a “follower” connected pass element to address
`the problems of output over-voltage conditions and insta-
`bility at low output currents.
`2. State of the Art
`
`the pass clement 12 to a dynamic valuc that maintains a
`regulated voltage at the output terminal 16 of the voltage
`regulator 2.
`The pass element 12 may be used in a commonsource/
`emitter configuration or a common drain/collector follower
`configuration. A voltage follower configuration has the
`advantages of not requiring a large oulpul capacitance,
`having a better response time for transient signals, and
`providing greater immunity to output capacitor characteris-
`tics. Greater immunity to output capacitor characteristics is
`a significant advantage in low power LDO voltage regula-
`tors.
`
`10
`
`15
`
`20
`
`2
`
`40
`
`45
`
`The function of a voltage regulator is to take a varying
`input voltage supply and generate a stable output voltage.
`The efficiency of modern powersupply systems,particularly
`battery powered supply systems, is directly related to the
`amount of power dissipated in the voltage regulator. Mini-
`mizing the power consumption is a key parameter in regu-
`lator design. The primary method for reducing power con-
`sumption is to reduce the voltage drop across the linear
`regulator. ‘The lowest voltage drop the regulator can tolerate
`before loss of regulation occurs is called the “dropout
`voltage” and a low dropout voltage is very desirable. T'or
`battery powered systems, poweris limited and efficiency is
`of key importance. Thus, the design of an efficient system
`that utilizes linear regulation necessarily includes a low
`dropout (“LDO”) voltage regulator.
`As shown in FIG. 1, a linear voltage regulator 2 conven-
`tionally includes an amplifier 4 which compares the output
`of a voltage reference 6 to a sample of an output voltage
`supplied by feedback elements 8. The output of the amplifier
`4 is coupled to a control terminal 10 of a pass element 12
`which serves to “pass” current from the unregulated input
`terminal 14 of the voltage regulator 2, to the regulated output
`terminal 16 of the voltage regulator 2. The feedback control
`loop 18 formed by the amplifier 4, pass element 12 and
`feedback elements 8 acts to force the control terminal 10 of
`
`2
`1
`COMPLEMENTARY FOLLOWER OUTPUT
`small value (e.g. near zero), more current than is necessary
`STAGE CIRCUITRY AND METHOD FOR
`may be supplied to the output terminal 16 until the feedback
`LOWDROPOUT VOLTAGE REGULATOR
`loop 18 regains control dueafinite response time associated
`with the feedback control loop 18. The excess charge is
`stored on the output capacitor 20 and results in an output
`voltage higher than the desired regulation voltage. The
`increased voltage at
`the output
`terminal 16 causes the
`feedback control loop 18 to attempt to reduce the output
`voltage by reducing or stopping the current passing through
`the pass element 12. Even with the pass element 12 turned
`off, however, the output voltage remains high for a time
`because the feedback control loop 18 cannot remove the
`excess charge from the output capacitor 20. As a result, the
`feedback control loop locks-up, and the output terminal 16
`remains in an over-voltage condition until the excess charge
`drains off of the output capacitor 20. ‘This transient over-
`voltage is sometimes called a “hiccup.”
`this
`is small,
`In applications where the load current
`discharge process maytakea relatively long time. Although
`the voltage regulator 2 includes a discharge path through the
`feedback elements 8, the amount of discharge through the
`feedback elements 8 is typically insignificant because the
`feedback elements 8 conventionally comprise large valued
`resistive elements. While the feedback control loop 18 is
`locked up and, therefore, unable to regulate, the voltage on
`the output capacitor 20 may be in a range that is harmful to
`the load circuitry and, therefore, have scrious consequences.
`The “hiccup” condition may also be further exacerbated
`when the excess charge is discharged from the output
`capacitor 20 and the voltage regulator 2 again beginsto pass
`current through the pass element 12. As the feedback control
`loop 18 begins to respond to the need for more charge on the
`output, the pass element 12 is turned back “ON”to allow
`current to pass. This rapid change in current mayresult in
`another “hiccup” from the pass element 12 again passing too
`much current before the feedback control loop 18 has time
`to respond. With each subsequent “hiccup,” the feedback
`control loop 18 locks up and takes time to recover during
`which it cannot properly regulate the output voltage. Each
`subsequent “hiccup” decreases in magnitude until the feed-
`back control loop 18 no longer locks up. In other words, the
`feedback control loop 18 oscillates between locking-up and
`being in control of the pass element 12 for a time following
`an initial “hiccup.”
`Second, the stability problem occurs under low or no-load
`conditions where the only current passing through the pass
`element 12 is due to the current passing to ground through
`the feedback elements 8. As stated previously, because the
`feedback elements 8 conventionally include large valued
`resistive elements, this current is very small compared to a
`current for a load at the output terminal 16, and is typically
`belowthe minimumoutput current requirements of the pass
`element 12. This small current in the relatively large pass
`element 12 causes low transconductance (g,,) due to low
`current density therein, decreases loop gain and increases
`output impedance,potentially causing an unstable condition.
`An unstable condition results from the voltage regulator
`failing to regulate the output voltage which may cause the
`output voltage to oscillate undesirably until the specified
`minimum output current again flows through the pass ele-
`ment 12. This problem is more pronounced with pass
`elements 12 implemented as “followers” configured as a
`common drain or a commoncollector amplifier.
`Early lincar voltage regulators uscd a pass clement 12
`which was an NPN transistor in an emitter follower con-
`figuration. These early voltage regulators did not require
`LDO characteristics, and conventionally did not have load
`
`the pass element 12
`In either configuration, however,
`functions as a “unipolar” element in conventional designs. A
`“unipolar” element, as used herein, is one which sources 5
`current to the load, but does not sink current from the load.
`In other words, a unipolar element can supply needed
`electrical charge to a load, but cannot remove excess elec-
`trical charge from the load. A load conventionally includes
`at
`least one large output capacitor 20. A linear voltage
`regulator 2 configured with a unipolar output stage,
`however, experiences two common problems: an output
`over-voltage or “hiccup,” and instability at output current
`levels below a required minimum output current value.
`First, when the load current required at the output terminal
`16 of the voltage regulator 2 rapidly changes from a large
`value (e.g. near a maximum rated output) to a relatively
`
`60
`
`65
`
`

`

`US 6,333,623 B1
`
`10
`
`15
`
`20
`
`3
`currents which rapidly transitioned between high and low
`values during periods where tight output voltage regulation
`was required. Thus, the above described “hiccup” and mini-
`mum current problems were not significant. However, as
`dropout became more important(ie. with battery powered
`systems), LDO voltage regulators 22 were introduced which
`used the pass element 24 in the common emitter and, later,
`common source configurations ([IG. 2). FIG. 2 illustrates a
`conventional LDO voltage regulator 2 implementationof the
`circuit shown in FIG. 1. For the LDO voltage regulator 22,
`the reference voltage 26 (which may be provided by a
`bandgap reference or any other voltage reference generator
`knownin the art) is applied to the inverting terminal 28 of
`the error amplifier 30. The error amplifier 30 compares the
`voltage reference 26 at
`the inverting terminal 28 to the
`output voltage sample provided by the feedback network 32,
`and controls the gate/base of a PMOS/PNPpass element 24
`coupled between the input 34 and output 36 terminals of the
`voltage regulator 22.
`As battery powered or power managed applications
`became moreprevalentin the market, loads that switch from
`full current
`to zero or nearly zero current became more
`commonand the hiccup problem became more of a concern.
`A first example of an approach to addressing the hiccup
`problem is described in U.S. Pat. No. 5,864,227 to Borden ,
`et al. Jan. 26, 1999), an embodiment of which is shown in
`FIG. 3. In addition to the conventional elements used in prior
`art voltage regulator circuits, the Borden et al. approach uses
`a voltage regulator 38 having a “pull-down” circuit 40
`comprising a secondary reference voltage 42, a comparator 3
`44, and a pull-downtransistor 46. When the comparator 44
`senses that the voltage at the control terminal 48 of the pass
`element 50 is approximately equal to that of the secondary
`reference voltage 42,
`it turns the pull-down transistor 46
`“ON”to draw current from the output capacitor 52 until the ;
`feedback control loop recovers. The Bordenet al. approach
`may be used for LDO regulators using a pass element 50
`configured in the common source or common emitter con-
`figurations.
`The voltage regulator shown in FIG. 3, however, utilizes
`a moredigital than linear approachto controlling the voltage
`at the output
`terminal 51. In an over-voltage or hiccup
`condition, a low impedance or a current source “load” is
`introduced through the pull-down transistor 46 until the
`over-voltage is discharged. This approach requires the feed-
`back loop to be out of control before it can function, and,
`therefore, has an attendant response and recovery period for
`each lock-up condition. Furthermore, the voltage regulator
`circuit 38 of FIG. 3 requires at least one additional com-
`parator 44 to implement, and, therefore, uses more chip area,
`and still fails to address the problem of instability at the
`minimumoutput current. Additionally, for the voltage regu-
`lator 38 of FIG. 3, the pass element 50 must be configured
`as a common source or common collector amplifier and,
`thus, cannot achieve the advantages of a voltage follower
`configuration.
`A second non-prior art example of an approach to
`addressing the hiccup problem is fully described in the
`commonly assigned co-pending patent application entitled
`OVERVOLTAGE SENSING AND CORRECTION CIR-
`CUITRY AND METHOD FOR LOW DROPOUT VOLIT-
`
`40
`
`45
`
`60
`
`AGE REGULATORby Tony Larson and David Heisley,
`US. patent application Ser. No. 09/560376 to Larsonetal.
`(filed Apr. 28, 2000). An embodiment of the Larson ct al.
`approach is shown in FIG. 4. The Larson et al. approach to
`resolving the hiccup problem,
`like the Borden et al.
`approach, uses a voltage regulator 56 having a pull-down
`
`65
`
`4
`circuit 58. Unlike the Borden et al. approach, however, the
`Larson et al. approach does not require a secondary refer-
`ence voltage. The Larson et al. approach uses the primary
`reference voltage 60 as a reference for determining when the
`comparator 62 will turn the pull-downtransistor 64 “ON”
`and “OFF.” Thus, when the inputs to the error amplifier 66
`are such that the pass element 68 is turned “ON,” the
`oppositely configured inputs to the comparator 62 will be
`such that
`the pull-down transistor is turned “OFF.”
`Conversely, when the inputs to the error amplifier 66 are
`such that the pass element 68 is turned “OFF,” the oppositely
`configured inputs to the comparator 62 will be such that the
`pull-down transistor is turncd “ON” to sink the cxecss
`charge on the output capacitor 70 until the voltage at the
`output terminal 72 is within regulation. The Larson et al.
`approach may be used for LDO regulators using a pass
`element 68 configured in either the common source or
`common drain configurations.
`Similar to the Bordenet al. approach, however, the Larson
`et al. approach implements a comparator 62 to initiate a low
`impedance load under over-voltage conditions until
`the
`over-voltage is discharged and is, thus, locked-up during
`over-voltage periods. Also similar to the Borden et al.
`approach, the Larson et al. approach requires at least one
`additional comparator 62 to implement.
`A third example of an approach to addressing the hiccup
`problem is described in U.S. Pat. No. 5,608,312 to Wallace
`(Mar. 4, 1997), an embodiment of which is shownin FIG. 5.
`‘The Wallace approach uses a pair of ditterential amplifiers
`74 and 76 to control a pair of common source pass elements
`78 and 80 in a push-pull configuration. The inverting inputs
`82 and 84 are coupled to a reference voltage 86, and the
`non-inverting inputs 88 and 90 are connected to an output
`node 94. Whenthefirst pass device 78 is turned “OFF,” the
`second pass device 80 is turned “ON”to pass excess charge
`from the output capacitor 92 to ground. The Wallace
`approach is appropriate for use in SCSI terminator regula-
`tors that utilize complementary pass elements 78 and 80 in
`the common source or common emitter configurations.
`The voltage regulator circuit shown in FIG. 5, however,
`cannot achieve the advantages of a voltage follower con-
`figuration because the pass elements 78 and 80 must be
`configured as common source or common emitter amplifi-
`ers. Furthermore, although the voltage regulator circuit of
`FIG. 5 can help stability under low load or no load
`conditions, because at least one pass element is on during
`both source and sink, it has difficulty controlling the bias
`current in each of the pass elements.
`Therefore, it is desirable to have a voltage regulator which
`avoids the over-voltage or hiccup problem in addition to
`overcoming the problem of instability at low output cur-
`rents.
`
`SUMMARYOF THE INVENTION
`
`It is an object of the invention to provide smaller and less
`expensive voltage regulators than those knownin the prior
`art.
`
`is an object of the invention to provide a voltage
`It
`regulator which can both source charge to and sink charge
`from the regulated voltage output to overcome the over-
`voltage or “hiccup” problem.
`It
`is an object of the invention to provide a voltage
`regulator which overcomesthe problem of instability at low
`outpul currents.
`invention provides a simple approach to
`The present
`resolving the over-voltage and low output current instability
`
`

`

`US 6,333,623 B1
`
`10
`
`15
`
`5
`problems involving an LDO voltage regulator utilizing a
`follower pass element which can source and sink charge
`from a regulated output voltage conductor, which does not
`require the bulky comparators of prior art approaches, and
`which maintains low output impedance during the transition
`from source to sink operations. According to an embodiment
`of the invention, an LDO voltage regulator output stage
`comprises a first pass device controlled by a first control
`signal and coupled between an unregulated input voltage
`conductor and a regulated output voltage conductor. The
`voltage regulator also includes a second pass device coupled
`between the regulated output voltage conductor and ground,
`and controlled by a sccond control signal. The first and
`second pass devices are coupled in a complementary voltage
`follower configuration. The control signals operate in
`response to the difference between a reference voltage and
`the voltage on the regulated output voltage conductor to
`source current to the regulated output voltage conductor
`through the first pass device and/or sink current from the
`regulated output voltage conductor through the second pass :
`device to ground.
`According to a specific embodiment of the invention, the
`control signal for both the first and second pass devicesis an
`output of an error amplifier referencing a voltage reference
`and a feedback signal. According to another specific 2
`embodimentof the invention, the control signal for the first
`pass device is the output of the error amplifier and the
`control signal for the second pass device is the output of the
`error amplifier offset by a bias voltage. By offsetting the
`control signal for the second pass device from thatofthefirst
`pass device, both the first and second pass devices remain
`“ON”at the same time for a portion ofthe transition between
`sourcing and sinking current to the voltage regulator output.
`By maintaining both of the pass devices “ON”at the same
`time, the voltage regulator maintains low output impedance
`and the control loop does not lock up during the transition.
`Further more, a bias current may be provided through the
`second pass device under low output current situations to
`keep the output stage transconductance(g,,,) high and, thus,
`maintain low output impedance.
`Other embodiments of the present invention involve vari-
`ous methods of producing control signals for the second pass
`device to increase control over the output voltage levels
`while avoiding the over-voltage and low output current
`problemspreviously experienced.
`BRIEF DESCRIPTION OF THE SEVERAL
`VIEWS OF THE DRAWINGS
`
`40
`
`45
`
`invention as well as other
`The nature of the present
`cmbodiments of the present invention may be more clearly
`understood by reference to the following detailed descrip-
`tion of the invention, to the appended claims, and to the
`drawings herein, wherein:
`FIG. 1 is a generalized block diagram of a priorart voltage
`regulator;
`FIG. 2 is a schematic diagram of anotherprior art voltage
`regulator;
`FIG. 3 is a schematic diagram of anotherprior art voltage
`regulator;
`FIG. 4 is a schematic diagram of a voltage regulator
`which provides useful background in understanding the
`present invention;
`FIG. 5 is schematic diagram of another prior art voltage
`regulator;
`FIG. 6 is a schematic diagram of a voltage regulator
`according to a first embodiment of the present invention;
`
`60
`
`65
`
`6
`FIG. 7 is a schematic diagram of a voltage regulator
`according to a second embodimentofthe present invention;
`FIG. 8 is a schematic diagram of a voltage regulator
`according to a third embodiment of the present invention;
`TIG. 9 is a schematic diagram of a voltage regulator
`according to a fourth embodimentof the present invention;
`FIG. 10 is a schematic diagram of a voltage regulator
`according to a fifth embodiment of the present invention;
`FIG. 11 is a schematic diagram of a voltage regulator
`according to a sixth embodiment of the present invention;
`and
`
`FIG. 12 is a schematic diagram of a voltage regulator
`according to a seventh embodimentofthe present invention.
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`In reference to FIG. 6, an LDO voltage regulator 100
`includes a pass device, such as NMOSpasstransistor 102,
`and an over-voltage pass device 104, such as PMOSdis-
`charge transistor 104, coupled in a complementary voltage
`follower configuration. Specifically, the pass transistor 102
`includes a drain coupled to an unregulated input voltage
`conductor 106, a source coupled to a regulated output
`voltage conductor 108, and a gate coupled to an output of an
`error amplifier 110. The discharge transistor 104 also
`includes a source coupled to the regulated output voltage
`conductor 108, a drain coupled to ground, and a gate coupled
`to the output of the error amplifier 110. The error amplifier
`110 includes a non-inverting input coupled to a voltage
`reference Vp; 112 which is also coupled to ground. The
`inverting input of the error amplifier 110 is coupled to a
`feedback conductor 114. Feedback network 116 is coupled
`between the regulated voltage conductor 108 and ground
`and comprises two resistors coupled in series. The feedback
`conductor 114 is connected to the feedback network 116 at
`
`a junction between the two resistors.
`Coupling the sources of both the pass transistor 102 and
`the discharge transistor 104 to the regulated output voltage
`conductor 108 creates a simple output stage with “bipolar”
`action. Distinct from conventional follower configurations
`with only unipolar pass elements, the bipolar configuration
`1 of the present invention enables the voltage regulator 100
`to sink current from a load coupled to the regulated output
`voltage conductor 108 as well as source current to it. It
`should be noted, however, that although the output devices
`are complementary, there is no requirement for them to be
`of similar size or current carrying capacity. In practice, the
`pass transistor 102 generally has a much larger channel W/L
`ratio and/or has a much greater current handling capacity
`than the discharge transistor 104. The same error amplifier
`110 may be used to control both the pass transistor 102 and
`the discharge transistor 104 and no additional comparators
`or reference voltages are required to practice the invention.
`The embodiment shown in FIG. 6, while effective to
`avoid the hiccup condition, may still have instability prob-
`lemsat low output current levels. The instability is caused at
`the transition between the pass transistor 102 being “ON”
`and the discharge transistor 104 being “ON.” During this
`transition, both the pass transistor 102 and the discharge
`transistor 104 are simultaneously “OFF” for a time, leaving
`the control
`loop open. With the control loop open,
`the
`voltage regulator is not regulating and, thus, has no control
`over the output voltage.
`As shown in FIG. 7, though not required, it is preferable
`to separate the gates of the pass transistor 102 and the
`
`

`

`US 6,333,623 B1
`
`7
`discharge transistor 104 by a bias voltage source 118 pro-
`ducing a bias voltage V,,45. By establishing a bias voltage
`Vazras, between the gates of the pass devices 102 and 104,
`both the pass transistor 102 and the discharge transistor 104
`are simultaneously “ON” for a time during the transition
`between output current source and sink operations. This also
`results in one or both of the pass and discharge transistors
`102 and 104 being “ON” whenthe load currentis zero, thus,
`keeping the feedback loop closed and the output impedance
`low. Without the bias voltage V,,.., the transfer character-
`istic of the voltage regulator output stage includes a dead
`band wherein both the pass transistor 102 and the discharge
`transistor 104 are “OFF” for a time during the transition
`from a source operation to a sink operation. Including the
`bias voltage V,,,, allows the output stage to operate in a
`continuous, linear mode as the current requirement changes
`from source to sink.
`
`10
`
`15
`
`8
`and the relatively small number of required elements. Both
`the bias current source 124 and the second biastransistor
`122 may be fabricated as minimum or near-minimum foot-
`print size devices, and the discharge transistor needs only be
`large enough to handle the current generated during an
`over-voltage correction. Therefore, the embodiments dis-
`closed herein are particularly advantageous in that
`they
`overcomeboth the hiccup andinstability problems discussed
`previously without the size and space requirements of the
`prior art embodiments. By example, in one specific imple-
`mentation of the present invention, the first bias transistor
`120 is Vioocth the size of the pass transistor 102, and the
`second bias transistor 122 is “cth the size of the discharge
`transistor.
`
`In FIG. 9, a variable current source 128 producing a
`variable current Icpazc- 18 added to the voltage regulator
`circuit 100 shown in FIG. 8. The current source 128 is
`
`coupled between the bias conductor 126 and ground such
`that
`it draws current from the source of the first bias
`transistor 120. If the sum of the currentI,,-.5,, and the bias
`current Ipps Isensetlgs) is varied to be proportional to
`the output current |,,,, such that the current densities in each
`of the pass transistor 102 andthefirst bias transistor 120 are
`equal, then the voltageat the source ofthefirst bias transistor
`120 will be the sameas the voltage at the source of the pass
`transistor 102.
`
`Under these conditions, the bias current I,,,, establishes
`a voltage (V,<) between the gate and source of the second
`bias transistor 122 that is mirrored between the gate and
`source of the discharge transistor 104. Having the mirrored
`voltage (Vs) between the gate and source of the discharge
`transistor 104 causes a bias current
`to flow through the
`discharge transistor 104 whichis a scaled version of the bias
`current source I,,,, 124. Therefore, by implementing the
`current source 128 between the bias conductor 126 and
`
`ground, a fixed and well controlled bias current through the
`second bias transistor 122 may be established while the
`regulator is supplying load current (sourcing current) to the
`regulated output voltage conductor 108.
`Specifically, when the output current I,,,7 is very large,
`the variable current Ig-asy- has a value equal to the ratio of
`the first bias transistor 120 channel W/L ratio divided by the
`pass transistor 102 channel W/L ratio multiplied by the
`output current I,,,,. Thus, if the bias transistor 120 channel
`W/Lratio is Yoooth the value of the pass transistor 102
`channel W/L ratio, Igense=loy7/1000. Under this condition,
`the discharge transistor 104 has turned “ON”only slightly
`and is passing a current equal to the value of Ip,,, multiplied
`by theratio of the discharge transistor 104 channel W/L ratio
`divided by the secondbiastransistor 122 channel W/Lratio.
`Thus,if the second bias transistor 122 channel W/L ratio is
`Yeth the value of the discharge transistor 104 channel W/L
`ratio, the current passing through the discharge transistor
`104 under this condition is I,,4;*16. If the pass transistor
`102 is “OFF,” however, a current muchlarger than I,,45*16
`will pass through the discharge transistor 104 to ground
`because the gate-to-source voltage of the discharge transis-
`tor will be equalto the gate-to source voltage of the first bias
`transistor 120 plus the gate-to-source voltage of the second
`bias transistor 122 (V..104=Vgs120+WVgs122)-
`FIG. 10 illustrates an embodiment of the present inven-
`tion which substitutes specific elements for the current
`source 128 shown in FIG. 9. In FIG. 10, a sense amplifier
`130 is connceted as a unity gain follower with the inverting
`input and the output both coupled to the bias conductor 126
`and the non-inverting input coupled to the regulated output
`voltage conductor 108. By coupling the sense amplifier 130
`
`In FIG. 8, the bias voltage source 118 has been replaced
`with first and second bias devices 120 and 122, such as
`NMOStransistor 120 and PMOStransistor 122, and a bias .
`current source 124 producing a bias current Ip,45. The first
`bias transistor 120 includes a drain coupled to the unregu-
`lated input voltage conductor 106, a gate coupled to the
`output of the error amplifier 110 and a source coupled to a
`bias conductor 126. The secondbiastransistor 122 includes ,
`a source coupled to the bias conductor 126, a gate coupled
`to the gate of the discharge transistor 104, and a drain
`coupled to the gate of the second bias transistor 122. The
`bias current source 124 is coupled between the drain of the
`second bias transistor 122 and ground.
`The first bias transistor 120 is preferably a scaled replica
`of the pass transistor 102, and the second bias transistor 122
`is preferably a scaled replica of the discharge transistor 104.
`As used herein, the term “scaled replica” means having the
`same device characteristics (i.e. threshold voltage, etc.) but
`a different W/L ratio or emitter area. The bias current source
`124 (I,;45) establishes the voltage (V,,,) between the gate
`and source for both the first and secondbiastransistors 120
`and 122, thereby establishing a fixed and/or controllable bias
`voltage between the gates of the pass and dischargetransis-
`tors 102 and 104. Though not required,it is desirable to use
`bias devices 120 and 122 having characteristics similar to
`those of the pass devices 102 and 104 to get a well controlled
`operating bias. For example, if the first bias transistor 120
`has the same structure and threshold voltage as the pass
`transistor 102, and the second bias transistor 122 has the
`samestructure and threshold as the discharge transistor 104,
`the bias current in the pass devices 102 and 104 can be
`precisely controlled by the bias current source 124.
`One function of a voltage regulator is to limit the output
`current to a value that will not harm the voltage regulator or
`the load circuitry. A voltage regulator accomplishes this by
`sensing the output current and clamping it at some maxi-
`mum value. Because a regulator is a power device, and
`because a low voltage drop across the voltage regulator is
`advantageous, it is desirable to avoid series sense elements
`that add voltage drop and power dissipation. Therefore,
`circuits which utilize parallel sense elements are more
`desirable than those which utilize series sense elements.
`
`;
`
`40
`
`45
`
`Furthermore, because a current limiting device is required
`by a voltage regulator anyway, by implementing the current
`limiting device according to embodiments of the present
`invention, the output stage current sink is implemented in
`parallel using only minimal additional elements and result-
`ing in minimal additional powerdissipation.
`Another advantage of the embodiments of the present
`invention is the small footprint size of the required devices
`
`60
`
`65
`
`

`

`US 6,333,623 B1
`
`a
`
`10
`4. The voltage regulator of claim 2, the biasing circuit
`comprising:
`a first bias transistor having a source, a drain coupled to
`the unregulated input voltage conductor, and a gate
`configured to receive the first control signal;
`a second bias transistor having a drain, a source coupled
`to the source of the first bias transistor, and a gate
`coupledto the gate of the discharge transistor andto the
`drain of the second bias transistor; and
`a bias current source coupled between the drain of the
`second bias transistor and to the second reference
`
`9
`in this configuration, the voltage on the b