UNITED STATES PATENT AND TRADEMARK OFFICE
`________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`________________
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`INTEL CORPORATION
`Petitioner,
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`v.
`
`PACT XPP SCHWEIZ AG
`Patent Owner
`________________
`
`Case IPR2020-00532
`U.S. Patent No. 8,471,593
`________________
`
`
`
`
`
`PATENT OWNER’S SUR-REPLY TO PETITIONER’S REPLY
`PURSUANT TO BOARD ORDER
`
`
`
`________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`________________
`
`INTEL CORPORATION
`Petitioner,
`
`v.
`
`PACT XPP SCHWEIZ AG
`Patent Owner
`________________
`
`Case IPR2020-00532
`U.S. Patent No. 8,471,593
`________________
`
`
`
`
`
`PATENT OWNER’S SUR-REPLY TO PETITIONER’S REPLY
`PURSUANT TO BOARD ORDER
`
`
`
`
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`
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`Case No. IPR2020-00532
`U.S. Patent No. 8,471,593
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`PATENT OWNER’S EXHIBIT LIST
`
`Exhibit No. Description
`
`2015
`
`2016
`
`2017
`
`2018
`
`2019
`
`2020
`
`Petition for Inter Partes Review of U.S. Patent No. 6,240,376 in
`Synopsys, Inc. v. Mentor Graphics Corp., Case IPR2012-00042,
`Paper 1 (Sep. 26, 2012)
`
`Patent Owner’s Request for Rehearing on Decision to Institute
`Inter Partes Review in Synopsys, Inc. v. Mentor Graphics
`Corp., Case IPR2012-00042, Paper 18 (March 08, 2013)
`
`Banner & Witcoff, Ltd.’s “Messenger Log” from Exhibit 2005
`in Synopsys, Inc. v. Mentor Graphics Corp., Case IPR2012-
`00042
`
`Notice Regarding Case Management, Dkt. No. 19, filed May 23,
`2019
`
`Patent Owner’s Sur-Reply in Intel Corp. v. Tela Innovations,
`Inc., Case IPR2019-01228, Paper 18 (Nov. 27, 2019)
`
`Declaration of Ziyong Li in Support of Patent Owner’s
`Sur-reply
`
`2021
`
`Stipulation to Dismiss, Dkt. No. 24, filed May 30, 2019
`
`2022
`
`2023
`
`Stipulation and Order to Extend Time, Dkt. No. 98, filed June 1,
`2020
`
`Excerpt of Intel’s Initial Invalidity Contentions in the District
`Court case, filed October 31, 2019
`
`2024
`
`Intel’s Motion to Transfer, No. 6:19-cv-00273-ADA, Dkt. 13
`
`2025
`
`Webster's Ninth New Collegiate Dictionary, 1990: “dedicated”
`
`i
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`I.
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`Introduction
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`U.S. Patent No. 8,471,593
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`The challenged claims of the ’593 patent recite a bus system that includes,
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`amongst other things, “a first structure dedicated for data transfer in a first direction”
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`and “a second structure dedicated for data transfer in a second direction.” ’593
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`patent, Claims 1 and 12. Patent Owner (“PACT”) showed in its Preliminary
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`Response that under the plain and ordinary meaning of the claim language, the
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`Petition should not be instituted because the “first structure” and “second structure”
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`it identifies in its prior art are switches that transfer data in all directions (up, down,
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`left, and right)—a switch that transfers data in all directions is not a structure that is
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`dedicated to transfer data in a particular direction.
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`In its Reply, Petitioner (“Intel”) does not dispute that it cannot show invalidity
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`under Patent Owner’s plain and ordinary meaning construction. Instead, Intel
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`presents new claim construction arguments that fail for several reasons. First,
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`despite being granted a Reply, Intel does not actually propose a construction or
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`identify how the challenged claims are unpatentable under its undisclosed
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`construction, as required by 37 C.F.R. § 42.104(b)(3)-(4). Second, Intel’s attack on
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`PACT’s plain meaning construction is not supported by the patent.
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`The Petition should also be denied because Intel fails to overcome the multiple
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`procedural challenges PACT raised in its Preliminary Response.
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`II. The Board Should Adopt PACT’s Plain Meaning Construction
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`A Petition should be denied institution where the Petition does not show the
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`prior art “meets the properly construed terms of” the challenged claims. See United
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`Microelectronics Corp. v. Lone Star Silicon Innovations LLC, Case No. IPR2017-
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`001513, Paper 8 at 17 (Jan. 31, 2018 PTAB) (denying institution). “The Board is
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`under no obligation to subject a patent owner to the burden and expense of discovery
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`and trial where a petition asserts patentability challenges that are keyed to an
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`incorrect claim construction.” Id., Paper 10 at 4-5 (denying request for rehearing).
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`Here, PACT’s Preliminary Response showed that the plain and ordinary
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`meaning of “dedicated” is “assigned exclusively” to a particular task of purpose,
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`such that the claims require that the bus system include a first structure that is
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`assigned exclusively for transferring data in a first direction, and a second structure
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`that is assigned exclusively for transferring data in a second direction. Paper 6 at
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`13-16; id., Ex. 2013 and 2014). Intel does not dispute its prior art does not satisfy
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`PACT’s plain meaning construction, and the new claim construction arguments it
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`raises suffer from multiple defects, discussed below.
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`a. Petitioner Fails to Propose an Actual Construction
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`37 C.F.R. § 42.104(b)(3)-(4) states that a Petition “must” identify “[h]ow the
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`challenged claim is to be construed” and “how the construed claim is unpatentable”
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`under its construction. Intel’s Petition and Reply fails on both fronts.
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`First, despite having been granted a Reply, the Petitioner fails to actually
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`identify how the disputed limitations should be construed. Instead of identifying its
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`construction for “a [first/second] structure dedicated for data transfer in a
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`[first/second] direction,” Petitioner asserts that no construction is needed because a
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`the “bus systems may have ‘dedicated’ direction in a variety of ways, including by
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`configuring the ‘connecting switches’ disclosed in the specification.” Paper 9 at 7-
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`8. Petitioner’s “variety of ways” construction fail to articulate how it contends the
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`term should be construed.
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`Petitioner’s “construction” is also not supported by the specification. Indeed,
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`the specification never suggests a connecting switch is a structure that is “dedicated
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`for data transfer in a [first/second] direction.” While Intel’s Reply states that “[b]y
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`configuring the switches” the “bus system can ‘define[]’ or ‘dedicate’ the ‘direction
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`of travel’ along each of the bus segment lines,” the portion of the specification Intel
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`cites does not support its position. Paper 9 at 8, citing 5:30-35. This passage never
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`refers to switches as a structure that is dedicated to a “direction of travel”—rather, it
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`states that particular types of interline elements, such as “drivers and/or registers,”
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`permit the bus system to define directions of travel. Ex. 1003 at 5:30-35 (“In bus
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`systems having interline elements, such as drivers and/or registers, directions of
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`travel are defined.”) (emph. added). This is confirmed by Figure 9, which Intel cites
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`to in its Reply. Paper 9 at 11. For instance, the image to the left is an excerpt of
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`Figure 9 that highlights the switches in yellow
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`and registers in blue. Ex. 1003 at Fig. 9. As
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`can be seen, it is the registers that are clearly
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`shown as being dedicated to a direction of data
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`transfer (indicated by arrows), not
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`the
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`switches. Instead, the switches simply connect
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`segments of the bus to other segments. Ex. 1003 at 3:50-64 (“connecting switches”
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`are used to design bus system with “shorter or longer segments”). Similarly, the
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`specification describes structures like registers as transferring data in “forward” or
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`“backward” directions, but does not describe connecting switches using directional
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`terms. Id. at 8:59-60.
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`Finally, Intel’s Petition also fails because it has not shown how the construed
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`claim is unpatentable under its “construction.” Indeed, even accepting that the
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`“[first/second] structure dedicated for data transfer in a [first/second] direction” are
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`the “connecting switches” of the ’593 patent (they are not), there is nothing in the
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`Petition or Reply that suggests the connecting switches in the ’593 patent and the
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`connecting switches in the prior art are the same. They are not. Indeed, the
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`connecting switches in the ’593 patent merely open or close to adjust the length of
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`the bus segments. Ex. 1003 at 3:50-64, Fig. 9. In contrast, as PACT showed in its
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`Response, the cross-point and BCU switches in the Balmer and Budzinski
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`references are not switches that simply change from an open position to a closed
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`position—rather, they are switches that connect data horizontally in one position,
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`and then vertically in the other position. Paper 6 at 23, 27. Thus, even accepting
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`Intel’s claim construction arguments would not save the Petition.
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`b. PACT’s Plain Meaning Constructions Are Correct
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`Intel’s attacks on PACT’s plain meaning constructions is also without merit.
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`First, the claim language in dispute is a “[first/second] structure that is
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`dedicated for data transfer in a [first/second] direction.” Intel fails to rebut
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`PACT’s showing regarding the plain meaning of the claim language. For instance,
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`Intel does not deny that, as confirmed by dictionaries from the relevant period, the
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`plain meaning of “dedicated” is “assigned exclusively.” Paper 6 at 14 (citing Ex.
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`2013-2014). In fact, the face of the patent lists a dictionary definition of
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`“dedicated,” and Intel agreed in the district court that the plain meaning of the
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`claim language should apply. Ex. 1003 at 11 (listing “Webster's Ninth New
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`Collegiate Dictionary, Merriam-Webster, Inc., 1990, p. 332 (definition of
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`‘dedicated’)”); see also Ex. 2025 (defining “dedicated” as “1. Devoted to a cause,
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`ideal or purpose” and “2. Given over to a particular purpose”). Nor can Intel point
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`to any redefinition of the claim language.
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`Second, Intel argues that PACT’s construction is somehow incorrect because
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`(1) “PACT seeks to narrow the term ‘dedicated’ to require ‘permanence’ or
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`‘physically permanent implementations,’” and (2) allegedly a different limitation
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`that recites the bus system includes “a physically dedicated connection” between a
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`processing core and a memory unit shows that PACT “knew how to claim those
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`requirements yet chose not to do so here.” Paper 9 at 9. Initially, Intel’s argument
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`is based on a mischaracterization of PACT’s construction. In particular, nothing in
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`PACT’s plain and ordinary meaning construction requires “permanent
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`implementations” or “permanence”—only that the structure be exclusively
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`allocated for transfer in a given direction. Moreover, the “physically dedicated
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`connection” language Intel attempts to rely upon actually supports PACT’s
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`position by using the term dedicated in precisely the manner that PACT is
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`proposing—i.e., reciting physical connections that are exclusively allocated (i.e.,
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`dedicated) to connecting the cores and the memory units. Ex. 1003 at Claim 1
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`(“…data processing cores includes a physically dedicated connection to at least
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`one physically assigned one of the plurality of memory units.”).
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`Third, Intel also wrongly alleges that PACT’s proposal is “inconsistent with
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`the specification and excludes embodiments of the patent.” Paper 9 at 9. Contrary
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`to Intel’s assertions, PACT’s plain meaning construction does not “preclude[s] the
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`use of ‘switching structures’” in the bus system. Id. But there is no suggestion in
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`the patent that the switches are a “first structure dedicated for data transfer in a first
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`direction” and a “second structure dedicated for data transfer in a second direction.”
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`Indeed, as discussed, none of the citations Intel points to refer to the connection
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`switches as dedicated to transfer data in a given direction. Instead, directional terms
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`are used to describe the “drivers and/or registers,” while the switches are described
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`as being opened and closed to allow for shorter and longer bus segments. See
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`Section II(a) (discussing 3:50-64 and 5:30-35). And in any event, as also shown
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`above, the switches in Intel’s prior art are different than the switches disclosed in the
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`patent.
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`Fourth, Intel also incorrectly argues that “no embodiment supports PACT’s
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`contention that the directionality of the bus system must be assigned exclusively or
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`permanently.” Paper 9 at 10. Initially, as discussed above, PACT’s construction
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`does not state that the structure must be “permanently” dedicated or assigned. Thus,
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`Intel’s argument is a strawman. Further, Intel incorrectly argues that the backward
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`and forward registers, which the patent teaches are structures dedicated for data
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`transfer in a given direction, cannot be the claimed first and second structure because
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`they are allegedly “non-bus-system components” that are not “part of the bus system.”
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`Id. at 10-11. Intel’s argument, however, is directly contradicted by the specification,
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`which expressly identifies the registers as components included in the bus system.
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`See. e.g, Ex. 1003 at 8:59-60 (“Fig. 3 shows an example for a forward register of a
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`configuration bus according to the present invention.”), 5:30-35 (“in bus systems
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`having interline elements, such as drivers and/or registers, directions of travel are
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`defined.”), 5:40-45 (“the register may be provided in the bus system”).
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`Accordingly, Intel’s arguments are insufficient to overcome the plain meaning
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`of the claim language. There is no indication that the patent uses the term “dedicated”
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`in a way that is different than its ordinary meaning and the Petition should be denied
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`because it fails to show how the properly construed claims are satisfied.
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`III. PACT Was Not Properly Served Under 37 C.F.R. § 42.105(a)
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`37 C.F.R. § 42.105(a) sets forth a simple and straightforward requirement,
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`which Intel failed to meet. To properly effect service, Intel must serve PACT “at
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`the correspondence address of record for the subject patent.” 37 C.F.R. § 42.105(a).
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`The rule is clear: the petition must at least be served at the correspondence address
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`of record, Customer No. 73481, associated with Alliacense. Ex. 2005; Ex. 2006.
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`Intel instead refers to Edward Heller III listed on the power of attorney and
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`argues that because Edward Heller is deceased, the next best option was to serve Mr.
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`Aaron Grunberger, the original patent practitioner for the patent-in-suit. However,
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`Petitioner was fully aware of the correspondence address of record when it relied on
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`the California address in its motion to transfer filed in May 2019. Petitioner made
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`no attempt at service at that address, where other practitioners may be available. See
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`Ex. 2024. See MPEP § 403.
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`Intel’s cited case, Synopsys, Inc. v. Mentor Graphics Corp., did not hold that
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`service before a power of attorney was filed was proper under § 42.105(a). Case
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`IPR2012-00042, Paper 23 (Apr. 11, 2013). In Synopsys, there was no dispute that
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`Banner & Witcoff had power of attorney; the issue was whether service on an old
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`address was proper. Ex. 2015; Ex. 2016 at 22-23; Ex. 2017. It is undisputed that
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`Mr. Grunberger had not filed a power of attorney when the Petition was sent to him.
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`Intel argues that delivery to litigation counsel constitutes proper service, citing
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`Micron Tech., Inc. v. e.Digital Corp., Case IPR2015-00519, Paper 14 (Mar. 24,
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`2015). However, the portion Intel relies on addressed service pursuant to 35 U.S.C.
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`§ 312(a). This is separate from the service requirement in 37 C.F.R. § 42.105(a).
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`For that, the Board recognized the correspondence address that “can be discovered
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`simply by entering the number of the patent into the USPTO’s [web portal].” Case
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`IPR2015-00519, Paper 14 at 5. Intel failed to do this, and has no excuse comparable
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`to those of the petitioner in Micron. Here, Intel contacted Mr. Grunberger three days
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`before the deadline without copying PACT’s litigation counsel. Intel was warned
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`that service was not proper, Ex. 1040, and had until the end of the day on February
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`10 to effect proper service on the correspondence address, which Intel failed to do.
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`Moreover, contrary to Intel’s assertions, the purported recipient identified in Intel’s
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`proof of service does not work at Quinn Emanuel. Ex. 2020, ¶ 5.
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`IV. Petitioner’s Declaratory Judgment Action Bars Institution
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`Intel has failed to explain why its Declaratory Judgement Action does not in
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`fact raise a challenge to invalidity when it alleges it does not infringe any “valid”
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`patent. Clearly, Intel was asking the Judge to rule on validity and the Judge
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`understood that. See Ex. 2018. The district court of the Intel Corp. v. Tela
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`Innovations, Inc. case expressly recognized that “Intel now brings this action seeking
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`declaratory relief for noninfringement, invalidity, and unenforceability with respect
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`to six Tela patents.” Ex. 2019 at 2 (emphasis added). Similarly, when Intel filed a
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`declaratory judgment action against PACT, the Northern District of California stated
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`that “Intel also contends that one or more claims-in-suit are invalid.” Ex. 2018
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`(emphasis added). Thus, by asserting that Intel did not infringe “any valid” claims,
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`it expressly challenged the validity, which bars the Petition under 35 U.S.C. §315(a).
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`V. The Delaware Action Justifies Discretionary Denial
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`The Board should deny institution under 35 U.S.C. § 314(a).
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`First, by denying institution here, the Board will avoid the inefficient and
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`duplicative exercise of assessing and narrowing claims. Intel is requesting the Board
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`to commit to a burdensome review of over 100 claims across 12 patents under more
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`than 50 grounds. Ex. 2020, ¶ 3. This project is superfluous in view of the
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`streamlining mechanism already provided in the Delaware Action: the asserted
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`claims will be narrowed to 60 across all 12 patents by October 1, 2020, and another
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`narrowing will be completed by August 6, 2021. Ex. 2007 at 5-6.
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`Second, the advanced stage of and the substantial time and effort already
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`invested in the Delaware Action justifies discretionary denial. A venue dispute has
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`already been resolved. Ex. 2021. Claim construction is effectively complete with
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`the Markman order expected within 60 days of the June 10 hearing. See Bentley
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`Motors, Ltd. v. Jaguar Land Rover, Ltd., Case IPR2019-01539, Paper 9 at 14 (Mar.
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`10, 2020). Over five million pages have been exchanged. Ex. 2020, ¶ 2. Document
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`production is substantially complete, and depositions have been scheduled. Ex. 2022;
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`Ex. 2020, ¶ 4. Petitioner’s reliance on Sand Revolution II, LLC, v. Continental
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`Intermodal Group - Trucking LLC, IPR2019-01393 is misplaced, as the PTAB’s
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`decision relied primarily on the changing and uncertain trial date, a factor not
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`applicable here, in reaching its conclusion, which it qualified as “marginal.”
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`Last, in an effort to justify institution despite substantial overlap of references,
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`Intel points to non-overlapping references representing a sliver of the total number
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`of invalidity challenges in the district court and the IPRs. However, Intel has not
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`foreclosed the possibility of also pursuing these references in district court and
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`expressly reserved the right to add theories of invalidity in the Delaware Action. See
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`Ex. 2023.0002. As long as Intel maintains their right to add assertions, this factor
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`cannot weigh in favor of institution. Bentley, IPR2019-01539, Paper 9 at 9-1.
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`VI. Conclusion
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`PACT respectfully requests the Board deny institution for the reasons above.
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`Date: August 6, 2020
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` Respectfully submitted,
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`By: /Ziyong Li/
` Ziyong Li (Reg. No. 76,089)
`QUINN EMANUEL URQUHART &
`SULLIVAN, LLP
`50 California Street, 22nd Floor
`San Francisco, CA 94111
`Tel: (415) 875-6373
`Fax: (415) 875-6700
`Email: seanli@quinnemanuel.com
`
`
`Attorney for Patent Owner –
`PACT XPP SCHWEIZ AG.
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`CERTIFICATE OF SERVICE
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`The undersigned hereby certify that the foregoing documents were served on
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`August 6, 2020 by filing these documents through the Patent Review Processing
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`System, as well as by e-mailing copies to:
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`
`
`Kevin Bendix
`Reg. No. 67,164
`Intel_PACT_IPR@kirkland.com
`kevin.bendix@kirkland.com
`KIRKLAND & ELLIS LLP
`555 South Flower Street, Suite 3700
`Los Angeles, CA 90071
`Telephone: (213) 680-8400
`Facsimile: (213) 680-8500
`
`Robert A. Appleby, P.C.
`Reg. No. 40,897
`robert.appleby@kirkland.com
`Gregory S. Arovas, P.C.
`Reg. No. 38,818
`greg.arovas@kirkland.com
`KIRKLAND & ELLIS LLP
`601 Lexington Avenue
`New York, New York 10022
`Telephone: (212) 446-4800
`Facsimile: (212) 446-4900
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`
`
`
`
`
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`Date: August 6, 2020
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` Respectfully submitted,
`
`By: /Ziyong Li/
` Ziyong Li (Reg. No. 76,089)
`QUINN EMANUEL URQUHART &
`SULLIVAN, LLP
`50 California Street, 22nd Floor
`San Francisco, CA 94111
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`Case No. IPR2020-00532
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`Tel: (415) 875-6373
`Fax: (415) 875-6700
`Email: seanli@quinnemanuel.com
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`
`Attorney for Patent Owner –
`PACT XPP SCHWEIZ AG.
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`14
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