Trials@uspto.gov
`571-272-7822
`
`Paper 43
`Date: August 23, 2021
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`SATCO PRODUCTS, INC.,
`Petitioner,
`v.
`SEOUL VIOSYS CO., LTD.
`Patent Owner.
`
`IPR2020-00704
`Patent 8,860,331 B2
`
`
`
`
`
`
`
`
`
`Before ERICA A. FRANKLIN, JEFFREY W. ABRAHAM, and
`ELIZABETH M. ROESEL, Administrative Patent Judges.
`ROESEL, Administrative Patent Judge.
`
`JUDGMENT
`Final Written Decision
`Determining One of the Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`
`
`
`
`
`571-272-7822
`
`Paper 43
`Date: August 23, 2021
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`SATCO PRODUCTS, INC.,
`Petitioner,
`v.
`SEOUL VIOSYS CO., LTD.
`Patent Owner.
`
`IPR2020-00704
`Patent 8,860,331 B2
`
`
`
`
`
`
`
`
`
`Before ERICA A. FRANKLIN, JEFFREY W. ABRAHAM, and
`ELIZABETH M. ROESEL, Administrative Patent Judges.
`ROESEL, Administrative Patent Judge.
`
`JUDGMENT
`Final Written Decision
`Determining One of the Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`
`
`
`
`
`
`IPR2020-00704
`Patent 8,860,331 B2
`
`I.
`INTRODUCTION
`A. Background and Summary
`Satco Products, Inc. (“Petitioner”) filed a Petition (Paper 1, “Pet.”)
`seeking inter partes review of claims 1–7, 10, and 11 (“the challenged
`claims”) of U.S. Patent No. 8,860,331 B2 (Ex. 1001, “the ’331 Patent”).
`Seoul Viosys Co., Ltd. (“Patent Owner”) filed a Preliminary Response.
`Paper 6 (“Prelim. Resp.”). We instituted an inter partes review. Paper 7
`(“Inst. Dec.”).
`After institution, Patent Owner filed a Response (Paper 20, “PO
`Resp.”), Petitioner filed a Reply (Paper 32, “Pet. Reply”), and Patent Owner
`filed a Sur-reply (Paper 35, “PO Sur-reply”). An oral hearing was held on
`July 7, 2021, and a transcript of the hearing is included in the record.
`Paper 42.
`We have jurisdiction under 35 U.S.C. § 6. This Final Written
`Decision is issued pursuant to 35 U.S.C. § 318(a). For the reasons that
`follow, we determine that Petitioner has shown by a preponderance of the
`evidence that claim 11 of the ’331 Patent is unpatentable and that Petitioner
`has not shown by a preponderance of the evidence that claims 1–7 and 10
`are unpatentable.
`
`B. Real Parties in Interest
`Petitioner identifies Satco Products, Inc. as the real party in interest.
`Pet. 1. Patent Owner identifies Seoul Semiconductor Co., Ltd. and Seoul
`Viosys Co., Ltd. as the real parties in interest. Paper 4, 1 (Mandatory
`Notice).
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`C. Related Matters
`The parties identify the following district court action in which Patent
`Owner is asserting the ’331 Patent against Petitioner: Seoul Semiconductor
`Co., Ltd. v. Satco Products, Inc., No. 2:19-cv-04951 (E.D.N.Y.). Pet. 1;
`Paper 4, 1.
`
`D. The ’331 Patent (Ex. 1001)
`The ’331 Patent discloses a light-emitting device for AC power
`operation, where the device “has an array of light emitting cells connected in
`series.” Ex. 1001, code (54), 1:28–31. An objective is to increase light
`emission time and to reduce a flicker effect. Id. at code (57), 2:66–3:3. The
`’331 Patent discloses various embodiments and features, only some of which
`are recited in the claims.
`An embodiment is shown in Figure 5, which is reproduced below.
`
`
`Figure 5 of the ’331 Patent is a partial sectional view of an AC light-emitting
`diode (LED), including light emitting cells 30 on substrate 20. Ex. 1001,
`7:36–38, 8:27–31. Each light emitting cell 30 includes first and second
`conductive type semiconductor layers 25 and 29, with active layer 27
`between them. Id. at 8:29–37. Electrode 31 is on second conductive type
`semiconductor layer 29. Id. at 8:40–41. Buffer layer 21 is between
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`Patent 8,860,331 B2
`substrate 20 and each of light emitting cells 30. Id. at 8:52–53. Electrode
`pad 33a is on first conductive type semiconductor layer 25 and electrode pad
`33b is on electrode 31. Id. at 9:3–5. Wires 41 electrically connect adjacent
`light emitting cells 30 to each other to form an array with light emitting cells
`30 connected in series. Id. at 9:8–10. As shown in Figure 5, each wire 41
`connects electrode pad 33a of one light emitting cell 30 to electrode pad 33b
`of another light emitting cell 30. Id. at 9:10–14.
`Another embodiment is shown in Figure 11, which is reproduced
`below:
`
`
`Figure 11 is a circuit diagram of an AC light-emitting device, including light
`emitting device 200, switching block 300, bridge rectifier 400, and AC
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`power source 1000. Ex. 1001, 7:53–55, 14:62–64, 15:3–8, 15:15–17. Light
`emitting device 200 includes arrays 101 to 103, each of which has a plurality
`of light emitting cells 30 connected in series. Id. at 15:3–8, Fig. 11. One
`terminal of each of the arrays 101 to 103 is connected to first power source
`connection terminal 110, and the other terminals are connected to second
`power source connection terminals 121 to 123, respectively, which are each
`connected to switching block 300. Id. at 15:10–17. Bridge rectifier 400 is
`connected between terminal 110 and switching block 300. Id.
`As shown in Figure 11, bridge rectifier 400 has first to fourth nodes
`Q1 to Q4 and diode portions 410 to 440 connected between respective pairs
`of nodes. Ex. 1001, 15:22–33. First and third nodes Q1 and Q3 of bridge
`rectifier 400 are connected to AC power source 1000, second node Q2 is
`connected to switching block 300, and fourth node Q4 is connected to first
`power source connection terminal 110. Id. at 15:37–41.
`The ’331 Patent discloses that “[t]he first and fourth diode portions
`410 to 440 may have the same structure as the light emitting cells 30.”
`Ex. 1001, 15:33–34. According to the ’331 Patent, “the first and fourth
`diode portions 410 to 440 may be formed on the same substrate while
`forming the light emitting cells 30.” Id. at 15:35–37.
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`Another embodiment is shown in Figure 19, which is reproduced
`below.
`
`
`Figure 19 of the ’331 Patent is sectional view of AC light-emitting device 1,
`which includes LED chip 3, transparent member 5, phosphors 7, and
`reflection cup 9. Ex. 1001, 8:6–8, 22:1–5, 22:25–26, 22:31–33, 23:11–12.
`LED chip 3 has a plurality of light emitting cells connected in series and
`may include a bridge rectifier, so that it can be driven by an AC power
`source. Id. at 22:5–6, 22:12–14. Each of the light emitting cells may be an
`AlxInyGazN based compound semiconductor capable of emitting ultraviolet
`or blue light. Id. at 22:6–8. LED chip 3 may be positioned within reflection
`cup 9 and be covered by molded transparent member 5 made from epoxy or
`silicone resin having phosphors 7 dispersed within it. Id. at 22:25–26,
`23:11–20, 23:24–26.
`According to the ’331 Patent, phosphors 7 are positioned over the
`LED chip 3 and excited by light emitted from the light emitting cells to emit
`
`6
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`light in a visible light range. Ex. 1001, 22:31–33. The ’331 Patent discloses
`that phosphors 7 include a delay phosphor, which “may have a decay time of
`1 msec or more, preferably, about 8 msec or more,” and may include other
`phosphors in addition to the delay phosphor. Id. at 22:33–36, 22:61–65; see
`also id. at 6:38–51 (discussing and defining a “delay phosphor”). According
`to the ’331 Patent, “[t]he delay phosphors and the other phosphors are
`selected such that the light emitting device emits light having a desired
`color,” such as white light, and “may be selected in consideration of flicker
`effect prevention, light emitting efficiency, a color rendering index, and the
`like.” Id. at 23:1–10.
`
`E. Illustrative Claim
`The ’331 Patent includes 12 claims. Claims 1–7, 10, and 11 are
`challenged in the Petition. Claims 1 and 11 are independent. Claim 1 is
`reproduced below with bracketed notations added to correspond with
`Petitioner’s identification of claim elements:
`1. [1-PRE] A light-emitting device comprising:
`[1a] a light emitting diode (LED) chip arranged on a single
`substrate, the LED chip comprising: an array of light emitting
`cells connected in series; and a bridge rectifier comprising a
`plurality of diode cells;
`[1b] a transparent member covering the LED chip;
`[1c] a first phosphor configured to be excited by light
`emitted from the LED chip and to emit light in a visible
`wavelength range; and
`[1d] a second phosphor configured to be excited by light
`emitted from the LED chip and to emit light in a visible
`wavelength range,
`[1e] wherein the first phosphor has a longer decay time
`than the decay time of the second phosphor.
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`Ex. 1001, 24:10–23; see Pet. 66–67 (identifying claim elements).
`Claim 11 is the same as claim 1, except that claim element 11a differs
`from claim element 1a. See Pet. 66–67 (side-by-side comparison of claims 1
`and 11). Claim element 11a recites “a light emitting diode (LED) chip
`comprising a plurality of light emitting cells connected in series, parallel, or
`series-parallel.” Ex. 1001, 24:61–63.
`
`F. Asserted Grounds
`Petitioner asserts the following grounds of unpatentability:
` Claims Challenged 35 U.S.C.
`Reference(s)
`Martin,2 Uang,3
`1 1–7, 10, 11
`§ 103(a)1
`Masatoshi,4 Setlur5
`2 11
`§§ 102(a), (e), 103(a) Nagai6
`
`G. Testimonial Evidence
`Petitioner filed a Declaration of P. Morgan Pattison, Ph.D. with the
`Petition. Ex. 1003. Patent Owner cross-examined Dr. Pattison and filed a
`transcript of the deposition as Exhibit 2020. Petitioner filed a Declaration of
`Victor D. Roberts, Ph.D. (Ex. 1058) with the Reply. Patent Owner cross-
`
`
`1 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112-29, 125
`Stat. 284, 287–88 (2011), amended 35 U.S.C. § 103, effective March 16,
`2013. Because the ’331 Patent was issued on an application filed before this
`date, the pre-AIA version of § 103 applies. Ex. 1001, code (22).
`2 Ex. 1004, US 2004/0206970 A1, published Oct. 21, 2004 (“Martin”).
`3 Ex. 1005, US 2006/0138971 A1, published June 29, 2006 (“Uang”).
`4 Ex. 1021, JP H5-198843, published Aug. 6, 1993 (“Masatoshi”). Exhibit
`1021 is a certified English translation of a Japanese patent document
`(Ex. 1022), and Exhibit 1023 is a translator’s declaration.
`5 Ex. 1006, WO 2005/083036 A1, published Sept. 9, 2005 (“Setlur”).
`6 Ex. 1007, WO 2005/022654 A2, published Mar. 10, 2005 (“Nagai”).
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`Patent 8,860,331 B2
`examined Dr. Roberts and filed a transcript of the deposition as
`Exhibit 2027.
`Patent Owner filed a Declaration of Alan Doolittle, Ph.D. with the
`Response. Ex. 2025. Petitioner cross-examined Dr. Doolittle and filed a
`transcript of the deposition as Exhibit 1056.
`
`II. ANALYSIS
`
`A. Legal Standards
`“In an [inter partes review], the petitioner has the burden from the
`onset to show with particularity why the patent it challenges is
`unpatentable.” Harmonic Inc. v. Avid Tech., Inc., 815 F.3d 1356, 1363 (Fed.
`Cir. 2016) (citing 35 U.S.C. § 312(a)(3) (requiring inter partes review
`petitions to identify “with particularity . . . the evidence that supports the
`grounds for the challenge to each claim”)); see also 37 C.F.R. § 42.104(b)
`(requiring a petition for inter partes review to identify how the challenged
`claim is to be construed and where each element of the claim is found in the
`prior art patents or printed publications relied upon).
`A patent claim is unpatentable under 35 U.S.C. § 103 if the
`differences between the claimed subject matter and the prior art are such that
`the subject matter, as a whole, would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said
`subject matter pertains. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
`(2007). The question of obviousness is resolved based on underlying factual
`determinations including: (1) the scope and content of the prior art; (2) any
`differences between the claimed subject matter and the prior art; (3) the level
`of ordinary skill in the art; and (4) when presented, objective evidence of
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`nonobviousness, i.e., secondary considerations.7 Graham v. John Deere Co.,
`383 U.S. 1, 17–18 (1966).
`Additionally, the obviousness inquiry typically requires an analysis of
`“whether there was an apparent reason to combine the known elements in
`the fashion claimed by the patent at issue.” KSR, 550 U.S. at 418 (citing In
`re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006) (requiring “articulated
`reasoning with some rational underpinning to support the legal conclusion of
`obviousness”)). Furthermore, Petitioner does not satisfy its burden of
`proving obviousness by employing “mere conclusory statements,” but “must
`instead articulate specific reasoning, based on evidence of record, to support
`the legal conclusion of obviousness.” In re Magnum Oil Tools Int’l, Ltd.,
`829 F.3d 1364, 1380 (Fed. Cir. 2016).
`
`B. Level of Ordinary Skill in the Art
`Relying on Dr. Pattison’s testimony, Petitioner provides the following
`contention regarding a person of ordinary skill in the art (“POSITA”):
`A POSITA in the field of the ’331 patent at the time of the
`earliest possible priority date (June 28, 2005) would have a Ph.D.
`in chemical engineering, materials engineering, or electrical
`engineering (with a focus on semiconductor materials), or similar
`advanced post-graduate education in this area, as well as at least
`2 years of experience relating to LED design and fabrication. . . .
`A person with less education but more relevant practical
`experience, depending on the nature of that experience and
`degree of exposure to LED fabrication and design (including the
`involved materials, chemistry, and physics), could also qualify
`as a POSITA in the field of the ’331 patent.
`
`
`7 In this case, Patent Owner does not present objective evidence of
`nonobviousness.
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`Pet. 11 (citing Ex. 1001, 1:27-31; Ex. 1003 ¶¶ 21–26). Dr. Roberts applies
`the foregoing description of a POSITA. Ex. 1058 ¶ 12. Patent Owner and
`Dr. Doolittle provide a similar description of a POSITA and do not criticize
`or disagree with Petitioner’s contention regarding the level of ordinary skill
`in the art. PO Resp. 8; Ex. 2025 ¶ 56.
`In our analysis below, we apply Petitioner’s uncontested definition of
`a POSITA, which is supported by Dr. Pattison’s testimony (Ex. 1003 ¶¶ 25,
`26) and is consistent with the scope and content of the ’331 Patent and the
`asserted prior art.
`
`C. Claim Construction
`In an inter partes review, we apply the same claim construction
`standard as would be used by a federal district court to construe a claim in a
`civil action involving the validity or infringement of a patent. 37 C.F.R.
`§ 42.100(b) (2020). Under that standard, claim terms are given their
`ordinary and customary meaning, as would have been understood by a
`person of ordinary skill in the art at the time of the invention, in light of the
`language of the claims, the specification, and the prosecution history of
`record. Id.; Phillips v. AWH Corp., 415 F.3d 1303, 1312–19 (Fed. Cir.
`2005) (en banc); Thorner v. Sony Comput. Entm’t Am. LLC, 669 F.3d 1362,
`1365–66 (Fed. Cir. 2012).
`Patent Owner proposes a construction for language in claims 1 and 11,
`which we address below. PO Resp. 8. Petitioner opposes Patent Owner’s
`construction, but does not propose any of its own. Pet. 11–12; Pet.
`Reply 2–6. We determine that no other claim term requires express
`construction for purposes of resolving the parties’ dispute. Vivid Techs., Inc.
`v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999) (“only those
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`11
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`terms need be construed that are in controversy, and only to the extent
`necessary to resolve the controversy”); see also Nidec Motor Corp. v.
`Zhongshan Broad Ocean Motor Co., 868 F.3d 1013, 1017 (Fed. Cir. 2017)
`(applying Vivid Techs. in the context of inter partes review).
`Patent Owner argues that the phrase, “the LED chip comprising: an
`array of light emitting cells” (claim 1), should be construed as “an
`arrangement of discrete light emitting semiconductor structures on a growth
`substrate” and the phrase, “a light emitting diode (LED) chip comprising a
`plurality of light emitting cells” (claim 11), should be construed as “two or
`more discrete light emitting semiconductor structures on a growth
`substrate.” PO Resp. 8–15. Petitioner contends that Patent Owner’s
`constructions are contrary to the claims and the Specification of the
`’331 Patent and the claims of a parent patent. Pet. Reply 2–6.
`After considering the parties’ arguments and evidence, we do not
`adopt Patent Owner’s proposed construction, which seeks to import a
`requirement for a “growth substrate” into the claims. We reached the same
`result in the Institution Decision. Inst. Dec. 13. Our reasoning follows.
`We begin with the language of the claims, which expressly recite that
`a single “LED chip” comprises multiple “light emitting cells.” Ex. 1001,
`24:11–13 (claim 1); id. at 24:61–62 (claim 11). Claim 1 recites that the LED
`chip is “arranged on a single substrate” (Ex. 1001, 24:11–12), but does not
`specify that the substrate is a “growth substrate.” Claim 11 does not
`expressly recite a substrate. The language of independent claims 1 and 11
`does not support a requirement for a growth substrate.
`Next, we turn to the other intrinsic evidence in the order it is argued
`by Patent Owner. As support for its proposed construction, Patent Owner
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`first directs us to Hattori,8 a reference cited during examination of the
`’331 Patent. PO Resp. 10. Patent Owner asserts that Hattori uses the term
`“LED chip” synonymously with the term “light-emitting chip” and describes
`the growth of a light-emitting chip by successively forming semiconductor
`layers on a growth substrate, such as a sapphire substrate. Id. at 10–11
`(citing Ex. 2009, 1:18–37, 15:21–26, 4:30–5:5, Figs. 3, 4). Patent Owner
`further asserts that Hattori discloses a device having a multiple chip module
`structure, where four LED chips are installed on a separate substrate. Id. at
`11 (citing Ex. 2009, 16:33–55, Figs. 20, 21).
`In our view, Hattori does not provide persuasive support for Patent
`Owner’s construction. Hattori is merely a reference cited during
`examination, but not relied upon to reject claims. See Ex. 1001, code (56)
`(listing Hattori among the references cited, but without an asterisk to
`indicate it was cited by the examiner); Ex. 1002, 80, 401 (Hattori listed in an
`Information Disclosure Statement). Patent Owner does not identify anything
`in the Specification or prosecution history of the ’331 Patent that indicates
`that Hattori should be relied upon to construe the claim language. For these
`reasons, we agree with Petitioner that the claims and Specification of the
`’331 Patent are more important intrinsic evidence than Hattori when
`determining the meaning of the claim language. Pet. Reply 6.
`Furthermore, in contrast to claims 1 and 11 of the ’331 Patent, Hattori
`does not use the phrase “light emitting cells.” Although Hattori describes
`fabricating a light-emitting chip by successively forming semiconductor
`layers on a growth substrate (Ex. 2009, 4:30–5:5), Patent Owner does not
`direct us to any express definition that would require that a light emitting
`
`
`8 Ex. 2009, US 8,294,165 B2, issued October 23, 2012 (“Hattori”).
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`chip include a growth substrate, nor any disavowal that would exclude light
`emitting semiconductor structures that have been separated from the growth
`substrate. Accordingly, Hattori does not provide persuasive support for
`Patent Owner’s argument that an LED chip comprising an array or a
`plurality of light emitting cells requires the presence of a growth substrate.9
`Next, Patent Owner argues that its construction of “LED chip” is
`“consistent with all of the intrinsic evidence.” PO Resp. 12–13 (citing
`Ex. 1001, 3:48–51, 8:27–55, 9:47–58, Fig. 5; Ex. 2025 ¶¶ 64–84). In our
`view, however, the cited portions of the Specification do not support Patent
`Owner’s construction.
`At column 8, lines 27–55, and in Figure 5, the Specification describes
`and depicts light emitting cells 30 formed on substrate 20 and implies that
`substrate 20 is a growth substrate. Ex. 1001, 8:53–55. This description
`pertains to a preferred embodiment “provided only for illustrative purposes.”
`Id. at 8:16–20. The Specification states “the present invention is not limited
`to the following embodiments but may be implemented in other forms.” Id.
`at 8:20–22. In view of this expression of the patent drafter’s intent, we do
`not interpret the Specification’s implicit reference to a growth substrate as
`limiting the scope of the claims.
`At column 3, lines 48–51, the Specification describes the constituent
`layers of the light emitting cells and the material from which they are made,
`
`
`9 In a footnote, Patent Owner cites three additional references it contends are
`part of the intrinsic record. PO Resp. 13 n.2 (citing Exs. 1027, 2007, 2008
`(translation of Ex. 2007), 2010). Although Patent Owner asserts that “its
`construction is also consistent with” these references, there is no explanation
`in the Patent Owner Response to support that assertion. For this reason,
`Patent Owner does not show persuasively that the cited references support
`its construction.
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`but does not mention a growth substrate, as required by Patent Owner’s
`construction. At column 9, lines 47–58, the Specification describes an array
`of light emitting cells on a single LED chip, including how they are
`connected and their constituent layers. Again, there is no mention of a
`growth substrate.
`Patent Owner also relies on Dr. Doolittle’s declaration testimony,
`even though it is not intrinsic evidence. PO Resp. 12–13 (citing Ex. 2025
`¶¶ 64–84). Patent Owner cites 21 paragraphs of testimony, without directing
`us to particular opinions or explaining how they support Patent Owner’s
`construction. Patent Owner’s citation amounts to improper incorporation by
`reference. See 37 C.F.R. § 42.6(a)(3) (“Arguments must not be incorporated
`by reference from one document into another document.”); Consolidated
`Trial Practice Guide November 201910 at 35–36 (“[P]arties that incorporate
`expert testimony by reference in their petitions, motions, or replies without
`providing explanation of such testimony risk having the testimony not
`considered by the Board”). For this reason, we do not consider the cited
`testimony, except to the extent that particular portions are specifically relied
`upon in the Patent Owner Response or Sur-reply.
`Patent Owner argues that “[t]he ’331 patent does not state that the
`growth substrate 20 is optional; it is required.” PO Resp. 14 (citing
`Ex. 2025 ¶¶ 73, 74). Dr. Doolittle testifies that a growth substrate is needed
`in the manufacturing process, but concedes that “the growth substrate is
`removed in certain designs.” Ex. 2025 ¶¶ 73, 74. The ’331 Patent describes
`a “flip-chip type LED” that may have a “roughened surface” on the “bottom
`surface of the substrate.” Ex. 1001, 9:20–21, 9:37–39, 21:36–37, Fig. 6.
`
`
`10 Available at https://www.uspto.gov/TrialPracticeGuideConsolidated.
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`The ’331 Patent also describes an alternative embodiment in which the
`growth substrate is removed. Id. at 21:36–40 (“Alternatively, the substrate
`20 may be separated in FIG. 6 and the roughened surface may be formed on
`a bottom surface of the first conductive type semiconductor layer 25.”).
`Dr. Doolittle agrees that the ’331 Patent discusses removal of the substrate,
`so that substrate 20 is no longer present. Ex. 1056, 37:10–22.
`In the Sur-reply, Patent Owner argues that “[t]he ’331 Patent does not
`state that this alternative embodiment [without a growth substrate] is an LED
`chip (singular) comprising light emitting cells (plural), as the claims
`require.” PO Sur-reply 5; see also Ex. 2025 ¶ 74 (Dr. Doolittle: “the
`’331 patent does not describe light emitting cells that have been removed
`from substrate 20 as an LED chip”). On cross-examination, however,
`Dr. Doolittle agreed that, after substrate 20 is removed, the resulting
`structure “very well could still be a chip” because “in its most fundamental
`meaning, the LED chip is—is some sort of collection of individual cells, if
`you will, formed in some other—into a collection that some sort of structure
`to it.” Ex. 1056, 38:10–39:3. According to Dr. Doolittle, the cells can be
`held together by an “intermediate carrier” or a “final substrate,” which
`would provide “structural support after the substrate is removed.” Id.
`at 40:25–41:18, 43:4–17. Patent Owner’s position that a growth substrate is
`a required element of the claims is undermined by the testimony of its own
`declarant, Dr. Doolittle.
`Patent Owner argues that its construction is supported by its sister
`company’s use of the term “an LED chip” to refer to semiconductor
`structures on a growth substrate. PO Resp. 15 (citing Ex. 201111).
`
`
`11 US 9,112,121 B2, issued August 18, 2015.
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`Exhibit 2011 is unrelated to the ’331 Patent and has an earliest asserted
`priority date (February 9, 2011) more than five years later than the earliest
`asserted priority date (June 28, 2005) of the ’331 Patent. It is not persuasive
`evidence of the meaning of “LED chip” in the ’331 Patent.
`Accordingly, after considering Patent Owner’s arguments and
`evidence, we are not persuaded to adopt Patent Owner’s proposed
`construction.
`
`D. Petitioner’s First Ground: Martin, Uang, Masatoshi, Setlur
`Petitioner challenges claims 1–7, 10, and 11 based on Martin, Uang,
`Masatoshi, and Setlur. Pet. 4, 21–67. Patent Owner opposes. PO
`Resp. 17–65. We provide an overview of Martin, Uang, and Masatoshi
`before turning to the parties’ contentions and our analysis. For purposes of
`this Decision, it is not necessary to provide an overview of Setlur.
`
`1. Martin (Ex. 1004)
`Martin discloses an “alternating current light emitting device” in
`which “[a] plurality of semiconductor light emitting diodes formed on a
`single substrate are connected in series for use with an alternating current
`source.” Ex. 1004, codes (54), (57), ¶ 5. According to Martin, the disclosed
`invention “relates to monolithic arrays of semiconductor light emitting
`devices powered by alternating current sources.” Id. ¶ 2.
`
`17
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`Patent 8,860,331 B2
`Figure 1A of Martin is reproduced below.
`
`
`Martin Figure 1A is a plan view of a monolithic array of electrically isolated
`LEDs for use in an alternating current device. Ex. 1004 ¶¶ 7, 16. With
`reference to Figure 1A, Martin discloses that “[a]n array of individual LEDs
`7 are formed on a single substrate 3” and the individual LEDs are
`electrically isolated from each other by trenches 8 etched between the
`devices down to substrate 3 or to an insulating layer. Id. ¶ 16.
`
`18
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`Figures 1B and 2 of Martin are reproduced below.
`
`Martin Figure 1B is a plan view of a single LED in the array shown in
`Figure 1A, and Figure 2 is a cross-section of the device in Figure 1B taken
`along axis CC. Ex. 1004 ¶¶ 7, 8, 17. As illustrated in Figure 2, the device
`includes n-type region 11, active region 12, and p-type region 13 formed
`over substrate 15. Id. ¶ 17. As shown in Figures 1B and 2, the device has
`via 14 etched down to n-type layer 11, with n-contact 21 deposited in via 14.
`Id. ¶ 18. Additional electrical connections are provided by p-submount
`connection 16, n-submount connection 17, p-contact 20, and p-metal
`layer 20a, with dielectric layers 22 separating n-contact 21 from p-metal
`layers 20 and 20a. Id. ¶¶ 18, 19.
`
`19
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`IPR2020-00704
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`Figures 3 and 8 of Martin are reproduced below.
`
`
`
`
`Martin Figure 3 illustrates monolithic array 3 of LEDs mounted on
`submount 2, and Figure 8 is a cross section of a portion of monolithic
`array 3 of LEDs mounted on submount 2. Ex. 1004 ¶¶ 9, 13, 20. As shown
`in Figure 3, array 3 is flipped over (as compared with Figure 1A) and
`mounted with the contacts closest to submount 2. Id. ¶ 20. As shown in
`Figure 8, individual LEDs 7 may be separated by trench 87. Id. Martin
`discloses that LED array 3 is mounted on submount 2 by electrically and
`physically connecting interconnects (such as solder bumps 81–84 shown in
`Figure 8) of each LED 7 to submount 2. Id. According to Martin, “LED
`array 3 is therefore mounted in flip chip configuration, such that light is
`extracted from each of LEDs 7 through the substrate 15 (FIG. 2).” Id.
`Martin discloses that each of the LEDs may be connected to each other in
`series by interconnects within or on the surface of submount 2. Id.
`
`20
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`IPR2020-00704
`Patent 8,860,331 B2
`Figure 5 of Martin is reproduced below.
`
`
`Martin Figure 5 is a circuit diagram illustrating an example of a circuit that
`may be implemented in the device illustrated in Figure 3. Ex. 1004 ¶¶ 10,
`23. Figure 5 shows an LED array, an alternating current source, a full wave
`bridge rectifier, and an optional capacitor filter, which together provide a
`near-direct current to the LED array. Id. ¶ 24. Martin discloses that
`rectifying and filtering circuitry can be formed in submount 2 which may be
`a silicon chip. Id. According to Martin, the circuitry in Figure 5 other than
`the LED array “can be formed on and/or in submount 2 using conventional
`integrated circuit fabrication techniques.” Id.
`
`2. Uang (Ex. 1005)
`Uang discloses an LED driving circuit capable of activating the LEDs
`directly by an AC power supply, where the LEDs are arranged in a bridge
`circuit. Ex. 1005, code (57), ¶ 2. Uang discloses that a “common LED
`driving circuit in prior art” has a bridge rectifier to transform an AC voltage
`into a DC voltage. Id. ¶ 5. According to Uang, prior art examples “have a
`comparatively complex driving circuit” in which “the heat dissipation is a
`problem,” which “shorten[s] the service life of the LEDs.” Id. ¶ 7. Uang’s
`
`21
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`IPR2020-00704
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`“main objective” is to provide “an LED driving circuit which can light LEDs
`and solve the problem of local heat dissipation” and “a comparatively simple
`circuit structure [that] can lower the cost and improve the efficiency of
`voltage transformation.” Id. ¶ 9.
`Figure 3 of Uang is reproduced below.
`
`
`Uang Figure 3 shows an LED driving circuit. Ex. 1005 ¶¶ 13, 27. As shown
`in Figure 3, LED driving circuit 10a contains a bridge circuit with four
`junction points (a, b, c, d), four side branches, a diagonal branch between
`junction points (a, b), and two current loops. Id. ¶ 16. An AC power supply
`Vac is connected between junction points (c, d). Id. The bridge circuit
`includes five groups of LEDs (12, 13, 14, 15, 16), with the LEDs in each
`group connected in series. Id. ¶¶ 16, 27. A diode (D1, D2, D3, D4) and a
`group of LEDs (12, 13, 14, 15) is connected in each side branch, and a
`resistor Rb and a group of LEDs 16 is connected in the diagonal branch. Id.
`¶¶ 16–19, 27. A first current loop (c→a→b→d) includes first, diagonal, and
`second side branches containing first, fifth, and second LED groups (12, 16,
`13), respectively. Id. ¶¶ 17, 27. A second current loop (d→a→b→c)
`
`22
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`Patent 8,860,331 B2
`includes third, diagonal, and fourth side branches containing third, fifth, and
`fourth LED groups (14, 16, 15), respectively. Id. ¶¶ 18, 27.
`
`3. Masatoshi (Ex. 1021)
`Masatoshi discloses “a light-emitting diode lamp or light-emitting
`diode display device comprising a plurality of light-emitting diodes and a
`rectifying bridge circuit, wherein a light-emitting diode is used as a diode for
`structuring the rectifying bridge circuit.” Ex. 1021 ¶ 6. Masatoshi further
`discloses that “the light emission surface side of the light-emitting diode for
`structuring the rectifying bridge circuit is intermingled with the light
`emission surface sides of the light-emitting diodes.” Id. ¶ 7. According to
`Masatoshi, “[u]sing the diodes for rectification, used in the rectifying bridge
`circuit for converting the AC current into a DC current, as also the diodes for
`light emission increase[s] the number of diodes that emit light, enabling an
`improvement in the light intensity without increasing the number of circuit
`components.” Id. ¶ 8.
`Figures 1 and 2 of Masatoshi are reproduced below.
`
`Masatoshi Figure 1 is a circuit diagram for a light-emitting dio
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