`DRAFT 791D
` Revision 4c
`
`Information technology -
`AT Attachment Interface for Disk Drives
`
`This is a draft proposed American National Standard of Accredited Standards
`Committee X3. As such this is not a completed standard. The X3T10 Technical
`Committee may modify this document as a result of comments received during
`public review and its approval as a standard.
`
`Copyright 1994, Computer and Business Equipment Manufacturers Association.
`Permission is granted to members of X3, its technical committees, and their
`associated task groups to reproduce this document for the purposes of X3
`standardization activities without further permission, provided this notice
`is included. All other rights are reserved.
`
`ASC X3T10 Technical Editor: Lawrence J. Lamers
` Adaptec
` 691 South Milpitas Blvd
` Milpitas, CA 95035
` USA
`
` Telephone: 408-957-7817
` Facsimile: 408-957-7193
` Email: ljlamers@aol.com
`
` Reference number
` ANSI X3.221 - 199x
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 1
`
`
`
`POINTS OF CONTACT:
`
`X3T10 Chair X3T10 Vice-Chair
`John B. Lohmeyer Lawrence J. Lamers
`NCR Corporation Adaptec
`1635 Aeroplaza Drive 691 South Milpitas Blvd
`Colo Spgs, CO 80916 Milpitas, CA 95035
`
`Tel: (719) 573-3362 Tel: 408-957-7817
`Fax: (719) 597-8225 Fax: 408-957-7193
`Email: john.lohmeyer@ftcollinsco.ncr.com Email: ljlamers@aol.com
`
`X3 Secretariat
`Lynn Barra
`Administrator Standards Processing
`X3 Secretariat Telephone: 202-626-5738
`1250 Eye Street, NW Suite 200 Facsimile: 202-638-4922
`Washington, DC 20005 Email: lbarra@cbema.org
`
`SFF
`I. Dal Allan Telephone: 408-867-6630
`14426 Black Walnut Court Facsimile: 408-867-2115
`Saratoga, CA 95070 Email: dal_allan@mcimail.com
`
`SFF Faxback
`408-741-1600
`
`ATA Rflector
`Internet address for subscription to the reflector: majordomo@dt.wdc.com
`Internet address for distribution via reflector: ata@dt.wdc.com
`
`X3T10 Bulletin Board
`719-574-0424
`
`Document Distribution
`Global Engineering Telephone: 303-792-2181 or
`15 Inverness Way East 800-854-7179
`Englewood, CO 80112-5704 Facsimile: 303-792-2192
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 2
`
`
`
` ABSTRACT
`
`This standard defines the AT Attachment Interface. This standard defines an
`integrated bus interface between disk drives and host processors. It provides
`a common point of attachment for systems manufacturers, system integrators,
`and suppliers of intelligent peripherals.
`
` DOCUMENT STATUS
`
`Revision 4c - incorporates ANSI editorial changes.
`Revision 4b - revised ANSI patent statement per X3.
`Revision 4 - developed as a result of comments received on X3T9.2
` letter ballot.
`Revision 3.3 - developed as a result of the comments received
` during public review.
`Revision 3.1 - forwarded in August 1991 from X3T9.2 to X3T9 for
` further processing as an American National Standard.
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 3
`
`
`
`Contents
`
` Page
`Foreword. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
`
`Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
`
`1 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
`
`2 Normative references. . . . . . . . . . . . . . . . . . . . . . . . . 1
`
`3 Definitions, symbols, and abbreviations . . . . . . . . . . . . . . . 1
` 3.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . 1
` 3.2 Symbols and abbreviations . . . . . . . . . . . . . . . . . . . 2
`
`4 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
` 4.1 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
` 4.2 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . 2
`
`5 Interface cabling requirements . . . . . . . . . . . . . . . . . . . 3
` 5.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 3
` 5.2 Addressing considerations . . . . . . . . . . . . . . . . . . . 4
` 5.2.1 DC cable and connector . . . . . . . . . . . . . . . . . . . 4
` 5.2.2 4-pin power . . . . . . . . . . . . . . . . . . . . . . . . . 4
` 5.2.3 3-pin power . . . . . . . . . . . . . . . . . . . . . . . . . 5
` 5.2.4 Device grounding . . . . . . . . . . . . . . . . . . . . . . 5
` 5.3 I/O connector . . . . . . . . . . . . . . . . . . . . . . . . . 5
` 5.4 I/O cable . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
`
`6 Physical interface. . . . . . . . . . . . . . . . . . . . . . . . . . 6
` 6.1 Signal conventions. . . . . . . . . . . . . . . . . . . . . . . 6
` 6.2 Signal summary. . . . . . . . . . . . . . . . . . . . . . . . . 7
` 6.3 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . 8
` 6.3.1 CS1FX- (drive chip select 0). . . . . . . . . . . . . . . . . 8
` 6.3.2 CS3FX- (drive chip select 1). . . . . . . . . . . . . . . . . 8
` 6.3.3 DA0-2 (Drive address bus) . . . . . . . . . . . . . . . . . . 8
` 6.3.4 DASP- (Drive active/drive 1 present). . . . . . . . . . . . . 9
` 6.3.5 DD0-DD15 (Drive data bus) . . . . . . . . . . . . . . . . . . 9
` 6.3.6 DIOR- (Drive I/O read). . . . . . . . . . . . . . . . . . . . 9
` 6.3.7 DIOW- (Drive I/O write) . . . . . . . . . . . . . . . . . . . 9
` 6.3.8 DMACK- (DMA acknowledge) (Optional) . . . . . . . . . . . . . 9
` 6.3.9 DMARQ (DMA request) (Optional). . . . . . . . . . . . . . . . 9
` 6.3.10 INTRQ (Drive interrupt). . . . . . . . . . . . . . . . . . . 10
` 6.3.11 IOCS16- (Drive 16-bit I/O) . . . . . . . . . . . . . . . . . 10
` 6.3.12 IORDY (I/O channel ready) (Optional) . . . . . . . . . . . . 10
` 6.3.13 PDIAG- (Passed diagnostics). . . . . . . . . . . . . . . . . 10
` 6.3.14 RESET- (Drive reset) . . . . . . . . . . . . . . . . . . . . 11
` 6.3.15 SPSYNC:CSEL (Spindle synchronization/cable select) (Optional) 11
` 6.3.16 SPSYNC (Spindle synchronization) (Optional) . . . . . . . . 11
` 6.3.17 CSEL (Cable select) (Optional) . . . . . . . . . . . . . . . 12
`
`7 Logical interface . . . . . . . . . . . . . . . . . . . . . . . . . . 12
` 7.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 4
`
`
`
` 7.1.1 Bit conventions . . . . . . . . . . . . . . . . . . . . . . . 12
` 7.1.2 Environment . . . . . . . . . . . . . . . . . . . . . . . . . 12
` 7.2 I/O register descriptions . . . . . . . . . . . . . . . . . . . 13
` 7.2.1 Alternate status register . . . . . . . . . . . . . . . . . . 14
` 7.2.2 Command register. . . . . . . . . . . . . . . . . . . . . . . 14
` 7.2.3 Cylinder high register. . . . . . . . . . . . . . . . . . . . 14
` 7.2.4 Cylinder low register . . . . . . . . . . . . . . . . . . . . 14
` 7.2.5 Data register . . . . . . . . . . . . . . . . . . . . . . . . 14
` 7.2.6 Device control register . . . . . . . . . . . . . . . . . . . 14
` 7.2.7 Drive address register. . . . . . . . . . . . . . . . . . . . 15
` 7.2.8 Drive/head register . . . . . . . . . . . . . . . . . . . . . 15
` 7.2.9 Error register . . . . . . . . . . . . . . . . . . . . . . . 15
` 7.2.10 Features register. . . . . . . . . . . . . . . . . . . . . . 16
` 7.2.11 Sector count register. . . . . . . . . . . . . . . . . . . . 16
` 7.2.12 Sector number register . . . . . . . . . . . . . . . . . . . 16
` 7.2.13 Status register. . . . . . . . . . . . . . . . . . . . . . . 17
`
`8 Programming requirements. . . . . . . . . . . . . . . . . . . . . . . 18
` 8.1 Reset response . . . . . . . . . . . . . . . . . . . . . . . . 18
` 8.2 Translate mode . . . . . . . . . . . . . . . . . . . . . . . . 19
` 8.3 Power conditions. . . . . . . . . . . . . . . . . . . . . . . . 19
` 8.4 Error posting . . . . . . . . . . . . . . . . . . . . . . . . . 20
`
`9 Command descriptions. . . . . . . . . . . . . . . . . . . . . . . . . 21
` 9.1 Acknowledge media change (removable). . . . . . . . . . . . . . 23
` 9.2 Boot - post-boot (removable). . . . . . . . . . . . . . . . . . 23
` 9.3 Boot - pre-boot (removable) . . . . . . . . . . . . . . . . . . 23
` 9.4 Check power mode. . . . . . . . . . . . . . . . . . . . . . . . 23
` 9.5 Door lock (removable) . . . . . . . . . . . . . . . . . . . . . 23
` 9.6 Door unlock (removable) . . . . . . . . . . . . . . . . . . . . 23
` 9.7 Execute drive diagnostic. . . . . . . . . . . . . . . . . . . . 23
` 9.8 Format track. . . . . . . . . . . . . . . . . . . . . . . . . . 24
` 9.9 Identify drive. . . . . . . . . . . . . . . . . . . . . . . . . 25
` 9.9.1 Word 1: Number of cylinders . . . . . . . . . . . . . . . . . 27
` 9.9.2 Word 3: Number of heads . . . . . . . . . . . . . . . . . . . 27
` 9.9.3 Word 4: Number of unformatted bytes per track . . . . . . . . 27
` 9.9.4 Word 5: Number of unformatted bytes per sector. . . . . . . . 27
` 9.9.5 Word 6: Number of sectors per track . . . . . . . . . . . . . 27
` 9.9.6 Word 10-19: Serial Number . . . . . . . . . . . . . . . . . . 27
` 9.9.7 Word 20: Buffer Type. . . . . . . . . . . . . . . . . . . . . 27
` 9.9.8 Word 22: ECC bytes available on read/write long commands . . 27
` 9.9.9 Word 23-26: Firmware revision . . . . . . . . . . . . . . . . 27
` 9.9.10 Word 27-46: Model number . . . . . . . . . . . . . . . . . . 28
` 9.9.11 Word 51: PIO data transfer cycle timing mode . . . . . . . . 28
` 9.9.12 Word 52: DMA data transfer cycle timing mode . . . . . . . . 28
` 9.9.13 Word 54: Number of current cylinders . . . . . . . . . . . . 28
` 9.9.14 Word 55: Number of current heads . . . . . . . . . . . . . . 28
` 9.9.15 Word 56: Number of current sectors per track . . . . . . . . 28
` 9.9.16 Word 57-58: Current capacity in sectors. . . . . . . . . . . 28
` 9.9.17 Word 59: Multiple sector setting . . . . . . . . . . . . . . 28
` 9.9.18 Word 60-61: Total number of user addressable sectors . . . . 28
` 9.9.19 Word 62: Single word DMA transfer. . . . . . . . . . . . . . 28
` 9.9.20 Word 63: Multiword DMA transfer. . . . . . . . . . . . . . . 29
` 9.10 Idle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 5
`
`
`
` 9.11 Idle immediate . . . . . . . . . . . . . . . . . . . . . . . . 29
` 9.12 Initialize drive parameters. . . . . . . . . . . . . . . . . . 29
` 9.13 NOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
` 9.14 Read buffer. . . . . . . . . . . . . . . . . . . . . . . . . . 30
` 9.15 Read DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
` 9.16 Read long. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
` 9.17 Read multiple command. . . . . . . . . . . . . . . . . . . . . 30
` 9.18 Read sector(s) . . . . . . . . . . . . . . . . . . . . . . . . 31
` 9.19 Read verify sector(s). . . . . . . . . . . . . . . . . . . . . 31
` 9.20 Recalibrate. . . . . . . . . . . . . . . . . . . . . . . . . . 32
` 9.21 Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
` 9.22 Set features . . . . . . . . . . . . . . . . . . . . . . . . . 32
` 9.23 Set multiple mode. . . . . . . . . . . . . . . . . . . . . . . 33
` 9.24 Sleep. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
` 9.25 Standby. . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
` 9.26 Standby immediate. . . . . . . . . . . . . . . . . . . . . . . 34
` 9.27 Write buffer . . . . . . . . . . . . . . . . . . . . . . . . . 34
` 9.28 Write DMA. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
` 9.29 Write long . . . . . . . . . . . . . . . . . . . . . . . . . . 35
` 9.30 Write multiple command . . . . . . . . . . . . . . . . . . . . 35
` 9.31 Write same . . . . . . . . . . . . . . . . . . . . . . . . . . 36
` 9.32 Write sector(s). . . . . . . . . . . . . . . . . . . . . . . . 36
` 9.33 Write verify . . . . . . . . . . . . . . . . . . . . . . . . . 37
`
`10 Protocol overview. . . . . . . . . . . . . . . . . . . . . . . . . . 37
` 10.1 PIO data in commands . . . . . . . . . . . . . . . . . . . . . 37
` 10.1.1 PIO read command . . . . . . . . . . . . . . . . . . . . . . 37
` 10.1.2 PIO Read aborted command . . . . . . . . . . . . . . . . . . 38
` 10.2 PIO data out commands. . . . . . . . . . . . . . . . . . . . . 38
` 10.2.1 PIO write command. . . . . . . . . . . . . . . . . . . . . . 38
` 10.2.2 PIO write aborted command. . . . . . . . . . . . . . . . . . 38
` 10.3 Non-data commands . . . . . . . . . . . . . . . . . . . . . . 39
` 10.4 Miscellaneous commands . . . . . . . . . . . . . . . . . . . . 39
` 10.5 DMA data transfer commands (optional). . . . . . . . . . . . . 39
` 10.5.1 Normal DMA transfer . . . . . . . . . . . . . . . . . . . . 40
` 10.5.2 Aborted DMA transfer . . . . . . . . . . . . . . . . . . . . 40
` 10.5.3 Aborted DMA Command. . . . . . . . . . . . . . . . . . . . . 40
`
`11 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
` 11.1 Deskewing. . . . . . . . . . . . . . . . . . . . . . . . . . . 41
` 11.2 Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
` 11.3 Terms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
` 11.4 Data Transfers . . . . . . . . . . . . . . . . . . . . . . . . 42
` 11.5 Power on and hard reset. . . . . . . . . . . . . . . . . . . . 45
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 6
`
`
`
`Figures
`
`Figure 1 - ATA interface to embedded bus peripherals. . . . . . . . . . 3
`Figure 2 - Host bus adapter and peripheral devices. . . . . . . . . . . 3
`Figure 3 - ATA interface to controller and peripheral devices . . . . . 4
`Figure 4 - 40-pin connector mounting. . . . . . . . . . . . . . . . . . 5
`Figure 5 - Cable select . . . . . . . . . . . . . . . . . . . . . . . . 12
`Figure 6 - PIO data transfer to/from drive . . . . . . . . . . . . . . 42
`Figure 7 - IORDY timing requirements. . . . . . . . . . . . . . . . . . 42
`Figure 8 - Single word DMA data transfer . . . . . . . . . . . . . . . 43
`Figure 9 - Multiword DMA data transfer. . . . . . . . . . . . . . . . . 44
`Figure 10 - Reset sequence. . . . . . . . . . . . . . . . . . . . . . . 45
`
`Annexes
`
`Annex A Diagnostic and reset considerations . . . . . . . . . . . 46
`
`Annex B Diagnostic and reset considerations. . . . . . . . . . . . 50
`
`Annex C Small form factor connectors . . . . . . . . . . . . . . . 55
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 7
`
`
`
`Foreword
`
` (This foreword is not part of American National Standard X3.221-
`199x.)
`
`This standard defines the AT Attachment Interface. This
`standard defines an integrated bus interface between disk
`drives and host processors. It provides a common point of
`attachment for systems manufacturers, system integrators, and
`suppliers of intelligent peripherals.
`
`This standard was developed by Task Group X3T9.2 of Accredited
`Standards Committee X3 during 1986-90. The standards approval
`process started in 1991. This document includes annexes which
`are informative and are not considered par of the standard.
`
`Requests for interpretation, suggestions for improvement and
`addenda, or defect reports are welcome. They should be sent to
`the X3 Secretariat, Computer and Business Equipment
`Manufacturers Association, 1250 Eye Street, NW, Suite 200,
`Washington, DC 20005-3922.
`
`This standard was processed and approved for submittal to ANSI
`by Accredited Standards Committee on Information Processing
`Systems, X3. Committee approval of the standard does not
`necessarily imply that all committee members voted for
`approval. At the time it approved this standard, the X3
`Committee had the following members:
`
`James D. Converse, Chair
`Donald C. Loughry, Vice-Chair
`Joanne M. Flanagan, Secretary
`
`Organization Represented Name of Representative
`American Nuclear Society . . . . . . . . . . . . . . . . . Geraldine C. Main
` Sally Hartzell (Alt.)
`AMP, Inc . . . . . . . . . . . . . . . . . . . . . . . . . . . .Edward Kelly
` Charles Brill (Alt.)
`Apple Computer . . . . . . . . . . . . . . . . . . . . . .Karen Higginbottom
`Association of the Institute for
` Certification of Professionals (AICCP) . . . . . . . . . Kenneth Zemrowski
`AT&T/NCR . . . . . . . . . . . . . . . . . . . . . . . . . . .Thomas W. Kern
` Thomas F. Frost (Alt.)
`Boeing Company . . . . . . . . . . . . . . . . . . . . . . Catherine Howells
` Andrea Vanosdoll (Alt.)
`Bull HN Information Systems, Inc.. . . . . . . . . . . . . . .William George
`Compaq Computer Corporation. . . . . . . . . . . . . . . . . . .James Barnes
`Digital Equipment Corporation. . . . . . . . . . . . . . . Delbert Shoemaker
` Kevin Lewis (Alt.)
`Eastman Kodak. . . . . . . . . . . . . . . . . . . . . . . James D. Converse
` Michael Nier (Alt.)
`GUIDE International. . . . . . . . . . . . . . . . . . . . Frank Kirshenbaum
` Harold Kuneke (Alt.)
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 8
`
`
`
`Organization Represented Name of Representative
`Hewlett-Packard. . . . . . . . . . . . . . . . . . . . . . Donald C. Loughry
`Hitachi America, Ltd.. . . . . . . . . . . . . . . . . . . . . .John Neumann
` Kei Yamashita (Alt.)
`Hughes Aircraft Company. . . . . . . . . . . . . . . . . . Harold L. Zebrack
`IBM Corporation. . . . . . . . . . . . . . . . . . . . . . . . . .Joel Urman
` Mary Anne Lawler (Alt.)
`National Communication Systems . . . . . . . . . . . . . . . . Dennis Bodson
`National Institute of Standards and Technology . . . . . .Robert E. Roundtree
` Michael Hogan (Alt.)
`Northern Telecom, Inc. . . . . . . . . . . . . . . . . . . . . . .Mel Woinsky
` Subhash Patel (Alt.)
`Neville & Associates . . . . . . . . . . . . . . . . . . . . .Carlton Neville
`Recognition Technology Users Association . . . . . . . . . Herbert P. Schantz
` G. Edwin Hale (Alt.)
`SHARE, Inc . . . . . . . . . . . . . . . . . . . . . . . . . . Gary Ainsworth
` David Thewlis (Alt.)
`Sony Corporation . . . . . . . . . . . . . . . . . . . . . . . .Michael Deese
`Storage Technology Corporation . . . . . . . . . . . . Joseph S. Zajaczkowski
` Samuel D. Cheatham (Alt.)
`Sun Microsystems . . . . . . . . . . . . . . . . . . . . . . . .Scott Jameson
` Gary Robinson (Alt.)
`3M Company . . . . . . . . . . . . . . . . . . . . . . . . . Eddie T. Morioka
` Paul D. Jahnke (Alt.)
`Unisys Corporation . . . . . . . . . . . . . . . . . . . . . . . John L. Hill
` Stephen P. Oksala (Alt.)
`U.S. Department of Defense . . . . . . . . . . . . . . . .William C. Rinehuls
` C. J. Pasquariello (Alt.)
`U.S. Department of Energy. . . . . . . . . . . . . . . . . . . . . .Alton Cox
` Lawrence A. Wasson (Alt.)
`U.S. General Services Administration . . . . . . . . . . . . . . Douglas Arai
` Larry L. Jackson (Alt.)
`Wintergreen Information Services . . . . . . . . . . . . . . . . Joun Wheeler
`Xerox Corporation. . . . . . . . . . . . . . . . . . . . . . . .Dwight McBain
` Roy Peirce (Alt.)
`
`Subcommittee X3T9 on I/O Interface, which reviewed this
`standard, had the following members:
`
`Del Shoemaker, Chair Charles Brill Doug Morrissey
`Bob Fink, Vice-Chair Bill Burr Steven Myers
` Jeff Connell Roger Pandanda
` Steve Cooper Everett Rigsbee, III
` Roger Cummings Floyd Ross
` Rhonda Dirvin Amit Shah
` Jim Hamstra Jeff Stone
` Dave Husak Pat Thaler
` Reinhard Knerr Don Tolmie
` Larry Lamers Schelto van Doorn
` George Michael Jim Vogt
` Gene Milligan Carl Zeitler
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 9
`
`
`
`Working Group X3T9.2 on Lower Level Interface, which developed
`this standard, had the following members:
`
`John B. Lohmeyer, Chair
`I. Dal Allan, Vice-Chair
`Lawrence J. Lamers, Secretary
`Mr. Alan R. Olson Mr. D. Michael Mr. Paul Wolf
`Mr. Norm Harris Robinson (Alt.)
`Mr. Anthony Fung Mr. Stephen G. Mr. Joe Lawlor
`Mr. Charles Brill Finch (Alt.)
`Mr. Jeff Rosa Mr. Mike Yokoyama Mr. John F. Osborn
`Mr. Jan V. Dedek Mr. Erich Oetting (Alt.)
`Mr. Scott Smyers Mr. Robert N. Mr. Heinz
`Mr. Tom Debiec Snively Piorunneck (Alt.)
`Mr. Edward Hrvatin Mr. John Moy Mr. Steve Chang
`Mr. Clifford E. Mr. Ricardo (Alt.)
`Strang Jr. Dominguez Mr. Raymond Gilson
`Ms. Janet Schank Mr. Harvey (Alt.)
`Mr. Kurt Witte Waltersdorf Mr. Lam Dang
`Mr. Joe Chen Mr. James Mang (Alt.)
`Mr. Edward Haske Mr. Chuck Duquette Mr. John Geldman
`Mr. Stephen R. Mr. Peter (Alt.)
`Cornaby Dougherty Mr. Nicos Syrimis
`Mr. Gary S. Mr. Jeff Stai (Alt.)
`Peterson Mr. Doug Piper Mr. Dave Weber
`Mr. Charles Monia Mr. Greg Leonhardt (Alt.)
`Mr. Skip Jones Mr. George Su
`Mr. Edward Lappin Mr. Rick Heidick (Alt.)
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`Mr. Steve Caron Mr. Wayne Roen (Alt.)
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`Mr. Jeffrey L. Mr. Al Wilhelm (Alt.)
`Williams (Alt.) Mr. William Dallas
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`Karunanithi Mr. Bob Whiteman Gardner (Alt.)
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`Mr. Geoff Barton Mr. Gary Porter (Alt.)
`Mr. David H. Shaff (Alt.) Mr. John Morse
`Mr. Robert Bellino Mr. Jon Abilay (Alt.)
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`Mr. Bob Masterson Mr. Harlan Andrews (Alt.)
`Mr. Joe Dambach (Alt.) Mr. Paul R. Nitza
`Mr. Robbie Mr. James Blair (Alt.)
`Shergill (Alt.) Mr. D. W. Spence
`Mr. Bruce Anderson Mr. Mike Eneboe (Alt.)
`Mr. Stephen F. (Alt.) Mr. Tony Kempka
`Heil Mr. Ray Kubick (Alt.)
`Mr. James McGrath (Alt.) Mr. Jim Luttrull
`Dr. Tetsuro Mr. Dennis Pak (Alt.)
`Motoyoma (Alt.) Mr. Fred Yamamoto
` (Alt.)
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 10
`
`
`
`Ms. Chris Borgers Mr. Gene Milligan
`(Alt.) (Alt.)
`Ms. Lingling Mr. Daniel E.
`Polican (Alt.) Moczarny (Alt.)
`Mr. Kurt Chan Mr. Greg Walker
`(Alt.) (Alt.)
`Mr. Russell Smith Mr. Roger Cummings
`(Alt.) (Alt.)
`Mr. Danny Yeung Mr. Vit Novak
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`Mr. Hiroshi Minawa Mr. Pete Tobias
`(Alt.) (Alt.)
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`Mr. Gary R. Mr. Dennis
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`(Alt.) (Alt.)
`Mr. Robert D. Mr. Tak Asami
`Allgood (Alt.) (Alt.)
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`(Alt.) (Alt.)
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`(Alt.) (Alt.)
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`(Alt.)
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`Mr. John Cannon
`(Alt.)
`Mr. Jim McGrath
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`Ms. Lessie Ortega
`de Widman (Alt.)
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`Yang (Alt.)
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`(Alt.)
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`(Alt.)
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 11
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`
`
`Introduction
`
`ANSI X3.221-199x does not replace any existing standard.
`
`The clauses contain material as described below.
`
` Clause 1 describes the scope;
`
` Clause 2 lists the normative references;
`
` Clause 3 provides a glossary common to the whole document;
`
` Clause 4 provides descriptions and conventions;
`
` Clause 5 describes the electrical and mechanical characteristics;
`
` Clause 6 describes the signals of the AT Attachment Interface;
`
` Clause 7 describes the registers of the AT Attachment Interface;
`
` Clause 8 describes the programming requirements of the AT Attachment
` Interface;
`
` Clause 9 specifies the commands of the AT Attachment Interface;
`
` Clause 10 describes an overview of the protocol of the AT Attachment
` Interface;
`
` Clause 11 specifies the interface timing diagrams;
`
` Annex A describes diagnostic and reset considerations;
`
` Annex B describes diagnostic and reset considerations;
`
` Annex C describes alternative connectors.
`
`When the first IBM PC (Personal Computer)(tm) was introduced, there was no
`hard disk capability for storage. Successive generations of product resulted
`in the inclusion of a hard disk as the primary storage device. When the
`PC AT (tm) was developed, a hard disk was the key to system performance, and
`the controller interface became a de facto industry interface for the
`inclusion of hard disks in PC ATs.
`
`The price of desktop systems has declined rapidly because of the degree of
`integration to reduce the number of components and interconnects required to
`build a product. A natural outgrowth of this integration was the inclusion of
`controller functionality into the hard disk.
`
`In October 1988 a number of peripheral suppliers formed the Common Access
`Method Committee to encourage an industry-wide effort to adopt a common
`software interface to dispatch input/output requests to SCSI peripherals.
`Although this was the primary objective, a secondary goal was to specify what
`is known as the AT Attachment interface.
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 12
`
`
`
`AMERICAN NATIONAL STANDARD ANSI X3.221-199x
`
`American National Standard
`for Information Technology -
`
`AT Attachment for Disk Drives
`
`1 Scope
`
`This standard defines the AT Attachment Interface. This standard defines an
`integrated bus interface between disk drives and host processors. It provides
`a common point of attachment for systems manufacturers, system integrators,
`and suppliers of intelligent peripherals.
`
`2 Normative references
`
`None.
`
`3 Definitions, symbols, and abbreviations
`
`For the purposes of this standard, the following definitions apply.
`
`3.1 Definitions
`
`3.1.1 ATA (AT attachment). ATA defines a compatible register set and a 40-pin
`connector and its associated signals.
`
`3.1.2 CHS (Cylinder-head-sector). This term defines the addressing mode of the
`drive as being by physical address.
`
`3.1.3 data block. This term describes a data transfer, and is typically a
`single sector, except when declared otherwise by use of the Set Multiple
`command.
`
`3.1.4 DMA (Direct memory access). A means of data transfer between peripheral
`and host memory without processor intervention.
`
`3.1.5 LBA (Logical block address). This term defines the addressing mode of
`the drive as being by the linear mapping of sectors from 1 to n.
`
`3.1.6 optional. This term describes features which are not required by the
`standard. However, if any feature defined by the standard is implemented, it
`shall be done in the same way as defined by the standard. Describing a
`feature as optional in the text is done to assist the reader. If there is a
`conflict between text and tables on a feature described as optional, the table
`shall be accepted as being correct.
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 13
`
`
`
`3.1.7 PIO (Programmed input/output). A means of data transfer that requires
`the use of the host processor.
`
`3.1.8 reserved. Where this term is used for bits, bytes and fields; the bits,
`bytes and fields are set aside for future standardization, and shall be zero.
`
`3.1.9 VU (Vendor unique). This term is used to describe bits, bytes, fields,
`code values, and features which are not described in this standard, and may
`be used in a way that varies between vendors.
`
`3.2 Symbols and abbreviations
`
`AWG American Wire Gauge
`LSB Least significant bit
`LUN Logical unit number
`MSB Most significant bit
`
`Patent Owner, Bot M8 LLC - Ex. 2024, p. 14
`
`
`
`4 General
`
`The application environment for the AT Attachment Interface is any computer
`which uses an AT Bus or 40-pin ATA interface.
`
`The PC AT= Bus is a widely used and implemented interface for which a variety
`of peripherals have been manufactured. As a means of reducing size and cost,
`a class of products has emerged which embed the controller functionality in
`the drive. These new products utilize the AT Bus fixed disk interface
`protocol, and a subset of the AT bus. Because of their compatibility with
`existing AT hardware and software this interface quickly became a de facto
`industry standard.
`
`The purpose of the ATA standard is to define the de facto implementations.
`
`Software in the Operating System dispatches I/O (Input/Output) requests via
`the AT Bus to peripherals which respond to direct commands.
`
`4.1 Structure
`
`This standard relies upon specifications of the mechanical and electrical
`characteristics of the AT Bus and a subset of the AT Bus specifically
`developed for the direct attachment of peripherals.
`
`Also defined are the methods by which commands are directed to peripherals,
`the contents of registers and the method of data transfers.
`
`4.2 Conventions
`
`Certain words and terms used in this standard have a