`
`www.elsevier.com/locate/apthermeng
`
`Single-phase liquid cooled microchannel heat sink
`for electronic packages
`
`H.Y. Zhang a,*, D. Pinjala a, T.N. Wong b, K.C. Toh b, Y.K. Joshi c
`
`a Institute of Microelectronics, 11 Science Park Road, Science Park II, Singapore 117685, Singapore
`b School of Mechanical and Production Engineering, Nanyang Technological University, Singapore 639798, Singapore
`c George W. Woodruff School of Mechanical Engineering, Atlanta, GA 30332-0405, USA
`
`Received 25 May 2004; accepted 24 September 2004
`Available online 20 December 2004
`
`Abstract
`
`The study of a single-phase liquid cooled microchannel heat sink for electronic packages is reported.
`Two flip chip ball grid array packages (FCBGA) with different chip footprints, 12 mm · 12 mm and 10
`mm · 10 mm, were used for high heat flux characterizations. A liquid-cooled aluminum heat sink with
`finned base dimensions of 15 mm (L) · 12.2 mm (W) populated by microchannels was designed and fabri-
`cated. The microchannel heat sink was assembled onto the chip, using a thermal interface material to
`reduce the contact thermal resistance at the interface. The measured junction to inlet fluid thermal resi-
`stances ranged from 0.44 to 0.32 °C/W for the 12 mm chip under the test flowrate range. The higher thermal
`resistance range from 0.59 to 0.44 °C/W was obtained for the 10 mm chip due to the higher heat spreading
`resistance at the heat sink base. An analytical method that takes into account the simultaneous developing
`flow in microchannel heat sinks is developed to predict the pressure drop and thermal resistance. The cal-
`culations agree well with the measured pressure drop and thermal resistances. The respective thermal resist-
`ance elements are also analyzed and presented.
`Ó 2004 Elsevier Ltd. All rights reserved.
`
`Keywords: Liquid cooling; Microchannel heat sink; Flip chip ball grid array (FCBGA); Experiments; Analytical model;
`Respective thermal resistance
`
`* Corresponding author. Tel: +65 67705438; fax: +65 67745747.
`E-mail address: hengyun@ime.a-star.edu.sg (H.Y. Zhang).
`
`1359-4311/$ - see front matter Ó 2004 Elsevier Ltd. All rights reserved.
`doi:10.1016/j.applthermaleng.2004.09.014
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 001
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1473
`
`Nomenclature
`
`A
`Ar
`Bi
`cp
`dh
`fapp
`h
`H
`k
`K
`L
`N
`Nu
`DP
`Pr
`Q
`R
`Re
`t
`T
`Vf
`W
`
`area (m2)
`aspect ratio
`Biot number
`specific heat (J/kg°C)
`hydraulic diameter (m)
`apparent Fanning friction factor
`heat transfer coefficient (W/m2°C)
`height (m)
`thermal conductivity (W/m°C)
`loss coefficient
`length (m)
`number of microchannels
`Nusselt number
`pressure drop (Pa)
`Prandtl number
`heat input (W)
`thermal resistance (°C/W)
`Reynolds number
`thickness (m)
`temperature (°C)
`volumetric flowrate (m3/s)
`width (m)
`
`Greek symbols
`g
`fin efficiency
`l
`dynamic viscosity
`density (kg/m3)
`q
`r
`area ratio
`
`Subscripts
`a
`fin array
`b
`heat sink base
`ch
`channel
`f
`fluid
`fin
`plate fin
`i
`inlet
`j
`junction
`m
`mean
`o
`outlet
`s
`electronic chip as heat source
`TIM thermal interface material
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 002
`
`
`
`1474
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1. Introduction
`
`The increasing demand for high performance and multiple functionality in electronic systems
`and devices continues to present great challenges in their thermal management. Conventional
`air cooling techniques are reaching their limits for applications in areas such as cost-performance
`and high performance electronics [1,2]. Single-phase liquid cooling techniques with microchannel
`heat sinks provide an approach for removing heat fluxes well beyond air cooling limits, usually in
`the order of hundreds of W/cm2 [3]. Microchannel heat sinks, featuring plate fin structure on
`metallic or silicon substrates, possess unique heat transfer enhancement characteristics compared
`to heat sinks with normal-sized channels.
`Studies on single phase liquid cooled microchannel heat sinks have been increasing rapidly in
`the last two decades. In the landmark work by Tuckerman and Pease [3], microchannel heat sinks
`based on silicon substrates were built and a heat sink thermal resistance of 0.09 °C/W was re-
`ported with a pressure drop of 2.1 bar (31 psi). Ever since numerous characterization studies have
`been carried out on the fluid flow and heat transfer through microchannels. More recent work can
`be found in [4–6]. It is noted, however, that studies are seldom reported on such liquid cooling
`techniques integrated with actual electronic packages. Available experimental studies were mainly
`focused on heat sink characterization and significant variations could be found due to measure-
`ment difficulties such as strong heat spreading effects [7–9]. In contrast, the use of electronic pack-
`ages in-built with resistors and diode temperature sensors facilitates uniform heat flux inputs and
`temperature measurement, making it feasible to assess heat sink performance across package
`operation limits.
`In this study, a liquid cooled metallic microchannel heat sink has been developed and investi-
`gated using de-ionized water as the coolant. The cooling test section, as shown in Fig. 1, includes a
`microchannel heat sink with plate fin structure and a cover plate for flow management. The
`microchannel heat sink was attached onto electronic packages for high heat flux dissipation.
`Two flip chip ball grid array packages (FCBGA) with resistors and diode temperature sensors
`built into the chip were used as thermal test vehicles. They are viewed as suitable candidates in
`
`exiting flow
`
`incoming flow
`
`cover plate
`
`ring seal
`
`channel
`plenum
`housing
`interface material
`
`electronic package
`
`Fig. 1. Schematic diagram of the liquid cooling concept for electronic packages.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 003
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1475
`
`characterization of microchannel heat sinks since the power inputs and chip temperatures can be
`accurately obtained to assess the performance of the liquid cooling technique. Experiments were
`conducted under different flowrates, power inputs and chip sizes. In addition, an analytical
`method is presented to evaluate the thermal performance from the chip to the coolant and pres-
`sure drop characteristics across the microchannel heat sink. This analysis takes into account the
`fin efficiency and the spreading resistance at the heat sink base. The analytical predictions are
`compared with the experimental measurements.
`
`2. Description of experiments
`
`2.1. Experimental setup
`
`In the experiments, two flip chip ball grid array packages were selected as test vehicles because
`of their large area array interconnections, which provide enhanced electrical performance and are
`suitable for high heat flux applications such as computer microprocessors. One package had a
`chip footprint of 12 · 12 mm2 and consisted of 208 peripheral bumps and 352 I/Os on the sub-
`strate area. The other had a smaller footprint of 10 · 10 mm2 with 432 peripheral bumps and
`708 I/Os on the substrate area. Both packages were mounted on a standard 2-layer FR-4 thermal
`test board with a design area of 101.5 mm (400) · 114.5 mm (4.500). Details of the packages are listed
`in Table 2.
`Both chips consisted of four equally sized dies and each die was in-built with a resistor for heat-
`ing and a thermal test diode sensor for temperature measurement. The resistor in each die occu-
`pied 90% of the die area to provide a relatively uniform heating. The layout of the film resistor
`and the diode sensor is shown schematically in Fig. 2. The temperature vs the voltage coefficients,
`known as K factors [10], for the test diode sensors were calibrated prior to the experiments. In the
`experiments, the temperature rises in the chip were recorded based on the voltage drop for the
`diode sensors, with the uncertainties estimated to be ±0.2 °C. The heating power was obtained
`as the product of the voltage and current indicated by the power supply and the uncertainty of
`the net input power on the chip was estimated to deviate within 1% from the actual heating power.
`In the experiments, it was found that the on-chip temperature readings between the down-
`stream and upstream locations were 0.5–3 °C, depending on the flowrates. Hence the average
`of the four temperatures measured at the centers of the four dies was taken as the chip tempera-
`ture Tj.
`The cross-sectional view of the microchannel heat sink integrated with the FCBGA is shown in
`Fig. 3. The heat sink was fabricated by micro end milling microchannels on an aluminum block of
`50 mm (L) · 24 mm (W) · 2.8 mm (H) with natural finish and then anodized to protect against
`corrosion. It had 21 channels and a finned area of 15 mm (L) · 12.2 mm (W), each channel being
`0.21 mm wide and 2 mm high. The large aspect ratio of 9.5 has been purposely made to enlarge
`the surface area for heat transfer augmentation, as compared to the low aspect ratios reported in
`literature [3–6]. Inlet and outlet plenums were also made in the aluminum block for ease of assem-
`bly and reducing the pressure loss when fluid flows into and out of the microchannels. Copper
`heat sinks with high aspect ratio fins were found to be brittle under high flowrates [4] and were
`not studied here.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 004
`
`
`
`1476
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`Fig. 2. Schematic diagram of thermal test chip: four identical dies on the chip, each die with a diode sensor and resistor
`on two different layers of the die. The dashed lines are only for die location illustration.
`
`Fig. 3. Cross-sectional view of the microchannel heat sink on the flip chip ball grid array packages and the
`corresponding thermal resistance network. Heat sink geometrical parameters: (1) channel width Wch, (2) fin thickness
`tfin, (3) fin height Hfin, (4) base thickness tb, (5) chip thickness ts and (6) width of fin array Wa (the length of fin array La
`is not shown).
`
`The Aavid Sil-freeTM 1020 thermal grease was used as the thermal interface material between the
`bottom of the heat sink and the top surface of the chip. To examine the roughness of the heat sink
`base surface, a Proscan 1000 laser profiler was used to conduct a surface morphology measure-
`ment. The root-mean squared profile based on an area of 10 · 10 mm2 with 50 · 50 scanning
`points was found to be 2.3 lm, which is of typical machining tolerance.
`As is illustrated in Fig. 4, the microchannel heat sink was tightened to the cover plate with four
`screws. An O-ring made of Viton was mounted peripherally along the microchannel heat sink for
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 005
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1477
`
`Fig. 4. The liquid cooling test section assembled on the thermal test board.
`
`sealing. The cover plate, made of acrylic, was first attached to the heat sink and then tightened to
`the thermal test PCB through screws with springs to adjust the tightening force. The tightening
`force was kept constant so that the thermal performance of the thermal grease remained the same
`in all the experiments. Perfluoroalkoxy (PFA) tubes were used as tubing materials, which allowed
`for flexible and low-torque layout of the cooling loop.
`De-ionized water was used as the coolant. A variable-speed gear pump was used to provide the
`pressure head. A commercially available compact fin-tube heat exchanger was used to dissipate
`the heat from the liquid to the ambient air. A filter with 10 micrometers mesh filter element
`was used after the pump to remove particles suspended in the liquid. Two variable area flowme-
` 6 to
`ters were connected in parallel to measure the flowrates in the range from 1.67 · 10
` 5 m3/s with a factory-calibrated uncertainty within 2.5%. The pressure drop across
`1.67 · 10
`the test section was measured with a piezo-resistive pressure transducer with a digital display.
`The uncertainty was estimated to be within 2%. Two copper constantan (T-type) thermocouples
`of wire diameter 0.51 mm were mounted at the inlet and outlet of the cover plate respectively to
`measure the water temperatures within 0.2 °C accuracy.
`
`2.2. Data reduction
`
`Although the liquid cooling loop has been carefully designed, a leakage test was carried out be-
`fore the thermal tests. In the thermal characterization, both pressure drop and chip temperatures
`were obtained every 5 min. The thermal resistance results after 40 min were found to deviate by
`less than 1% from the previous measurements and thus were viewed as steady-state. During all the
`tests, no liquid leakage was found.
`In the data reduction, the junction to coolant inlet thermal resistance was used to represent the
`heat sink thermal performance
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 006
`
`
`
`1478
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`Table 1
`Uncertainty analysis of the experimental measurement results
`
`Measured quantities
`
`Junction temperature Tj
`Inlet temperature Ti
`Heating power Q
`Flowrate Vf
`Pressure drop DP
`Thermal resistance Rji
`
`Rji ¼ T j T i
`
`Q
`
`Uncertainty
`60.2 °C
`60.2 °C
`61%
`62.5%
`62%
`64%
`
`ð1Þ
`
`The uncertainty analysis is summarized and listed in Table 1. The tolerance due to different heat
`sink assembly has been ignored. Thus the maximum uncertainty in the thermal resistance Rji was
`estimated to be 4%.
`
`3. Heat transfer and pressure drop analysis
`
`An analytical technique based on conventional fluid flow and heat transfer theory is used to
`perform thermal analysis and to provide design guidelines. The assumptions in the present anal-
`ysis include constant thermophysical properties of the fluid and uniform laminar flow across the
`microchannels. All the heat is assumed to be dissipated uniformly through the top of the chip to
`heat sink base. Heat losses from the chip through the substrate to the ambient, and through the
`cover plate to the surrounding air are neglected. In light of the large deviations between predic-
`tions and experiments in microchannels as pointed out in the previous review work [7,8], the anal-
`ysis method used here is to be compared with the present experiments.
`The thermal resistance network is shown in Fig. 3. The junction to the inlet fluid thermal resist-
`ance Rji consists of four parts in series: the resistance Rs due to the conduction from the active die
`layer near the chip bottom to the top of chip, the resistance RTIM through the interface material,
`the spreading resistance Rsp within the heat sink base, and the resistance Rbi from the top of the
`heat sink base through the fin array to the inlet fluid. Hence
`Rji ¼ Rs þ RTIM þ Rsp þ Rbi:
`
`ð2Þ
`
`Here Rs can be determined by
`ð3Þ
`Rs ¼ ts=ðksAsÞ
`with ts, As, and ks the thickness, footprint and thermal conductivity of the chip, respectively. The
`value of RTIM has been obtained based on in-house characterization and found to be 0.242
`°C cm2/W with assembly deviations around 5%, independent of the flowrate. The thermal resist-
`ance Rbi between the heat sink base and the inlet fluid can be calculated as
`Rbi ¼ 1=ðheqW aLaÞ þ 1=ð2qcpV fÞ
`
`ð4Þ
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 007
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1479
`
`where heq is the equivalent heat transfer coefficient from the heat sink base to the bulk fluid and
`can be determined with the conventional fin analysis below, q the density of fluid, cp the specific
`heat, Vf the volumetric flowrate, and Wa, La the width and length of the fin array, respectively
`(Fig. 3). Note that the factor 2 is introduced in second term of the right-hand side of Eq. (4)
`as the average fluid temperature Tm = (Ti + To)/2 has been used for calculation of the thermal
`resistance from channel walls to bulk fluid [11]. The equivalent heat transfer coefficient heq can
`be obtained based on conventional fin analysis
`ð5Þ
`heq ¼ hm½2N gH fin þ W a ðN 1Þtfin=W a
`where N is the number of channels, tfin the fin thickness, g the fin efficiency given in, for instance,
`[12], and hm the average heat transfer coefficient between fin/base surface to the bulk fluid, eval-
`uated by
`hm ¼ Numkf
`d h
`where kf is thermal conductivity of the fluid, dh = 2WchHfin/(Wch + Hfin) the hydraulic diameter,
`and Num the average Nusselt number. The fitted correlation from [13], which takes into account
`the simultaneous developing flow effect, is used to determine the heat transfer for microchannel
`heat sinks:
`Num ¼ f½2:22ðRe Pr d h=LaÞ0:333 þ ð8:31G 0:02Þ3g1=3
`
`ð6Þ
`
`ð7Þ
`
`with
`
`G ¼ Ar2 þ 1
`ðAr þ 1Þ2
`where Pr is the Prandtl number of the fluid, Ar = Wch/Hfin the aspect ratio, Re = qudh/l, the Reyn-
`olds number and u the average flow velocity in the channel. The theoretically obtained average
`Nusselt numbers under the uniform wall temperature and uniform wall heat flux conditions
`(Num,T and Num,H1) at Ar = 1 to 4 are available from [14]. For brevity, the two representative
`cases of Ar = 1, 4 are shown in Fig. 5 as functions of Re Pr dh/L, together with the calculated
`Nu values at different Ar values based on Eq. (7). Here the aspect ratio Ar = 9.5 corresponds
`to the present microchannel heat sink case. In comparison the Nu data obtained from Eq. (7)
`are closer to the theoretical results under the isoflux condition. It should be noted that the predic-
`tions based on Eq. (7) are applicable within a limited range of Re Pr dh/L and are not suitable for
`extrapolation to fully-developed conditions.
`The spreading thermal resistance Rsp in Eq. (2) can be obtained as [15]:
`ffiffiffi
`p
`kbpa
`
`Rsp ¼ es þ 0:5
`
`p ð1 eÞ3=2/
`
`ð8Þ
`
`ð9Þ
`
`where,
`
`/ ¼ tanhðksÞ þ k=Bi
`1 þ ðk=BiÞ tanhðksÞ
`
`ð10Þ
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 008
`
`
`
`1480
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`Ana:Ar=1 Eq.(7)
`Ana:Ar=4
`Ana:Ar=9.5
`Num,T:Ar=1
`Ar=4
`Num,H1:Ar=1
`Ar=4
`150
`RePrdh/L
`
`200
`
`250
`
`0
`
`50
`
`100
`
`18
`
`16
`
`14
`
`12
`
`10
`
`02468
`
`Nu
`
`Fig. 5. Average Nusselt number vs Re Pr dh/L for different cases.
`
`p
`k ¼ p þ 1
`e
`
`ffiffiffi
`p
`
`ð11Þ
`
`ð12Þ
`
`and the Biot number is defined by
`Bi ¼
`1
`
`ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffip
`p
`ffiffiffiffiffiffiffiffiffiffi
`pkbbRbi
`; e ¼ ab ; s ¼ tb
`
`; b ¼
`with a ¼
`W aLa=p
`As=p
`b . Here tb is the thickness of the heat sink base, and
`kb the thermal conductivity of heat sink base. With Eqs. (2)–(12), the thermal resistance Rji can be
`determined analytically.
`The pressure drop across the heat sink consists of three parts: the pressure drop across the flow
`channels, the pressure drop at the inlet due to the flow constriction and at the exit due to the flow
`expansion. The expression for pressure drop can be written as following [13]
`DP ¼ qu2
`ð4f appLa=d h þ KÞ:
`2
`The apparent Fanning friction factor fapp is expressed as
`fapp ¼ 1
`f½3:2ðd hRe=LaÞ0:572 þ ð4:70 þ 19:64GÞ2g1=2
`Re
`
`ð13Þ
`
`ð14Þ
`
`and the loss coefficient K at inlet and outlet of heat sink is given as
`K ¼ 0:6r2 2:4r þ 1:8
`ð15Þ
`where r is the ratio of the flow cross-sectional area in the fin structure to the inlet/outlet area
`r ¼ NW chH fin=ðW aH finÞ:
`ð16Þ
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 009
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1481
`
`It is noted that Eq. (15) has been fitted from the data for laminar flow reported in Figs. 3–5 in [16]
`and cited in [13].
`
`4. Results and discussion
`
`4.1. Experimental results
`
`The measured pressure drop, chip temperature rises and thermal resistances for the 12 mm chip
`at power inputs of 40 and 60 W are shown in Fig. 6 as functions of the flowrate. As expected,
`when the flowrate increases, the pressure drop increases but the chip temperatures and the thermal
`
`Q=40W
`Q= 60W
`
`0
`
`0.2
`
`0.4
`
`0.6
`
`0.8
`
`1
`
`1.2
`
`Q=40W
`Q=60W
`
`0
`
`0.2
`
`0.4
`
`0.6
`
`0.8
`
`1
`
`1.2
`
`Q=40W
`Q=60W
`
`0
`
`0.8
`0.6
`0.4
`0.2
`Flowrate Vf (1.67*10-5m3/s)
`
`1
`
`1.2
`
`120
`100
`80
`60
`40
`20
`0
`
`pressure drop (100Pa)
`
`40
`35
`30
`25
`20
`15
`10
`
`05
`
`0.5
`
`0.4
`
`0.3
`
`0.2
`
`0.1
`
`0
`
`Tj - Ti ( oC)
`
`Thermal resistance Rji ( oC/W)
`
`Fig. 6. Experimental results for the 12 mm · 12 mm chip.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0010
`
`
`
`1482
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`resistances decrease. The power inputs presented here do not have an observable effect on the
`thermal resistances and pressure drops. It is further seen that the thermal resistance decreases rap-
`idly at first and then at a slower rate, whereas the pressure drop increases at a much more rapid
`
` 5 to 1.67 · 10 5 m3/s under 60 W power input, the
`rate. For a flowrate increasing from 0.83 · 10
`thermal resistance decreases by 6%, whereas the pressure drop increases by 120%. This indicates
`that further increase in the flowrate, which produces a much greater pressure drop, may not lead
`to a significant decrease in thermal resistance.
`Since the overall thermal resistance remains constant with power input, the maximum power
`dissipation can be extrapolated from the measured thermal resistance. Taking the maximum flow-
` 5 m3/s as an example, the thermal resistance is found to be 0.317 °C/W and thus
`rate of 1.67 · 10
`the maximum power dissipation of 189 W or 131 W/cm2 is expected with a temperature difference
`
`Q=60W
`Q=85W
`
`0
`
`0.2
`
`0.4
`
`0.6
`
`0.8
`
`1
`
`1.2
`
`Q=60W
`Q=85W
`
`0
`
`0.2
`
`0.4
`
`0.6
`
`0.8
`
`1
`
`1.2
`
`Q=60w
`Q=85W
`
`120
`
`100
`
`80
`
`60
`
`40
`
`20
`
`0
`
`55
`50
`45
`40
`35
`30
`25
`20
`
`Pressure drop (100Pa)
`
`Tj - Ti (oC)
`
`0.60
`
`0.55
`
`0.50
`
`0.45
`
`0.40
`
`0.35
`
`Thermal resistance Rji (oC/W)
`
`0
`
`0.8
`0.6
`0.4
`0.2
`Flowrate Vf (1.67*10-5m3/s)
`
`1
`
`1.2
`
`Fig. 7. Experimental results for the 10 mm · 10 mm chip.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0011
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1483
`
`Table 2
`The detailed parameters for the electronic packages used in this study
`
`FCBGA
`
`Chip footprint
`I/Os
`Bumps
`Measured Rji (over test flowrates)
`Heat dissipation at Tj Ti = 60 °C
`Heat flux dissipationat Tj Ti = 60 °C
`
`No. 1
`12 · 12 mm2
`352
`208
`0.32–0.44 °C/W
`189–136 W
`131–95 W/cm2
`
`No. 2
`10 · 10 mm2
`708
`432
`0.44–0.59 °C/W
`136–102 W
`136–103 W/cm2
`
`of 60 °C between the component and the inlet fluid. It is noted that, in an earlier air cooling study
`with a fan on the top of a heat sink [17], the minimum thermal resistance was found to be 0.73 °C/
`W for a similar FCBGA with a chip footprint of 12 mm · 12 mm, which corresponds to a heat
`removal rate of 57 W/cm2. The present investigation indicates the significant improvement in ther-
`mal performance through using the liquid cooled heat sink populated by microchannels.
`The experimental results for the 10 mm chip are given in Fig. 7 for 60 W and 85 W power in-
`puts. The pressure drop, chip temperature rise and the thermal resistance varied in a way similar
`to the 12 mm chip. The thermal resistance decreases from 0.59 to 0.44 °C/W as the flowrate in-
` 6 to 1.67 · 10 5 m3/s. Since the chip is smaller, the spreading resistances
`
`creases from 1.67 · 10
`are larger and the overall thermal resistances are higher than those for the 12 mm chip even
`though the same heat sink is used. Nonetheless, it is worthy to point out that the heat flux dissi-
`pation range remains almost unchanged for the two chip footprints, as listed in the last row of
`Table 2.
`
`4.2. Comparison of analytical results with experiments
`
`The analytical results are obtained on the basis of Eqs. (2)–(16) and shown for the pressure
`drop in Fig. 8 in comparison with the experimental results for the two chip cases. For the sake
`
`Analysis
`Exp. 12mmchip@40W
`Exp. 12mmchip@60W
`Exp. 10mmchip@60W
`Exp. 10mmchip@85W
`
`140
`
`120
`
`100
`
`80
`
`60
`
`40
`
`20
`
`0
`
`Pressure drop (100Pa)
`
`0
`
`0.8
`0.6
`0.4
`0.2
`Flowrate Vf (1.67*10-5m3/s)
`
`1
`
`1.2
`
`Fig. 8. Comparison of analytical results with experiments for pressure drops.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0012
`
`
`
`1484
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`12mm chip:present exp
`12mm chip:present ana
`12mm chip:high perf TIM ana
`10mm chip:present exp
`10mm chip:present ana
`10mmchip:high perf TIM ana
`
`0.8
`
`0.7
`
`0.6
`
`0.5
`
`0.4
`
`0.3
`
`0.2
`
`Rji ( oC/W)
`
`0.0
`
`1.0
`0.8
`0.6
`0.4
`0.2
`Flowrate (1.67*10-5m3/s)
`
`1.2
`
`Fig. 9. Comparison of analytical results with experiments for thermal resistances.
`
` 5 m3/s has been used as
`of convenience, the mean fluid temperature at the flowrate of 1.67 · 10
`the reference temperature for the evaluation of fluid thermophysical properties. We can see that
`the predicted pressure drops are generally higher than the experiments by around 10–15%,
`although a similar quadratic dependence is attained. The overestimation can be partially attrib-
`uted to the simplified mean fluid temperature calculation as above-mentioned. In addition, the
`non-symmetric heating effect on the fluid viscosity and flow field [18] is not captured in the present
`analytical correlations. Flow bypassing over microchannels could also exist due to the use of the
`O-ring between the heat sink and the cover plate. Further analysis on these effects remains to be
`explored in the future work.
`The comparison of Rji for the analytical results and experiments at 60 W for both sizes of
`chips is shown in Fig. 9. It is seen that the thermal resistances are predicted within 3% for all
` 6 m3/s where
`the flow range for both chip cases, except at the lowest flowrate of 1.67 · 10
`the deviation is close to 6%. The good agreement between the predictions and experiments also
`indicates that the conventional heat transfer theory can still be utilized for prediction of heat
`transfer at small channels of width around 0.2 mm without significant deviations from
`experiments.
`
`4.3. Analysis of thermal resistance elements
`
`It is of practical interest to examine the respective thermal resistance elements on the right-hand
`side of Eq. (2). Such analysis has been conducted for both chip sizes and the results are illustrated
` 6 to 1.67 · 10
` 5 m3/s leads
`in Fig. 10. For both chip cases, the increase in flowrate from 1.67 · 10
`to a reduction of 55% in Rbi due to the enhanced convection. Coupled with a reduction in Rsp of
`13% for the 12 mm chip and 21% for the 10 mm chip, the overall decreases in Rji is 22% and 19%,
`respectively.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0013
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1485
`
`Rbi
`Rsp
`RTIM
`Rs
`
`0.5
`
`0.4
`
`0.3
`
`0.2
`
`0.1
`
`0.0
`
`Thermal resistance (oC/W)
`
`(a)
`
`0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
`Flowrate Vf (1.67*10-5m3/s)
`
`1
`
`Rbi
`Rsp
`RTIM
`Rs
`
`0.7
`
`0.6
`
`0.5
`
`0.4
`
`0.3
`
`0.2
`
`0.1
`
`0.0
`
`Thermal resistance (oC/W)
`
`0.1
`
`0.2
`
`0.8
`0.7
`0.6
`0.5
`0.4
`0.3
`Flowrate Vf (1.67*10-5m3/s)
`
`0.9
`
`1
`
`(b)
`
`Fig. 10. Respective thermal resistance elements for (a) 12 mm chip and (b) 10 mm chip.
`
`Rs and RTIM are known to be related to material properties, independent of flowrates, and
`therefore become more dominant as the flowrate increases and the convection resistance de-
`creases. This is especially so for RTIM, which accounts for 50% or more for both chip sizes at a
` 5 m3/s. Further increase in flowrate does not reduce the overall
`flowrate larger than 0.83 · 10
`thermal resistance significantly whereas the pressure drop increases in a quadratic way, as indi-
`cated in Figs. 6 and 7. Instead of continuing to increase the flowrate, further thermal enhancement
`can be achieved through other means such as thinning of the wafer thickness and, especially, the
`improvement of thermal interface material performance. A thermal interface material with an
`impedance of 0.1 °C cm2/W, which represents a high performance thermal adhesive [19], is ana-
`lyzed here for illustration. The calculated thermal resistances for the 12 and 10 mm chip cases
`have been shown in Fig. 9. It is seen that the thermal resistances for both chips are reduced by
`around 30% on average due to the introduction of the advanced interface material. At a flowrate
` 5 m3/s, the thermal resistance for the 12 mm chip is 0.222 °C/W and, given a temper-
`of 0.83 · 10
`ature window of 60 °C, the estimated power dissipation goes up to 270 W without further increase
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0014
`
`
`
`1486
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`in system complexity and operation cost. The above example indicates that the thermal interface
`material plays an important role in reducing the junction to coolant inlet thermal resistance.
`
`5. Concluding remarks
`
`A liquid cooled microchannel heat sink has been developed and characterized for high heat flux
`electronic packages with de-ionized water as coolant. The microchannel heat sink, made of alum-
`inum and with a high aspect ratio of 9.5, has been tested under different power inputs and flow-
`rates. Two FCBGAs of different chip sizes, 12 mm · 12 mm and 10 mm · 10 mm, were evaluated
`as thermal test vehicles. With built-in resistors and diode sensors, such thermal test chips facilitate
`both high flux heating and chip temperature measurements. By using thermal grease as the inter-
`face material, the junction to inlet thermal resistances Rji for the assembly with the heat sink were
`measured to be 0.32–0.45 °C/W for the 12 mm chip, and 0.59–0.44 °C/W for the 10 mm chip under
`the test flowrate range. The thermal resistance difference in the two chip cases can be attributed
`mainly to the spreading resistance at the heat sink base. Implementation issues such as liquid leak-
`age can be addressed through proper design of the liquid cooling loop and the cooling apparatus.
`Analytical prediction of the pressure drop and thermal resistance through the microchannel
`heat sink assembled with the FCBGA package has been carried out. The predicted results are
`compared with experiments and good agreement has been achieved in both chip cases for both
`thermal resistances (66%) and the pressure drop (615%). In addition, the respective thermal
`resistance elements are examined and the interface resistance is identified to be a key element,
`accounting for over 50% of the overall thermal resistance at larger flowrates. Analytical results
`reveal that the thermal resistances based on the present liquid cooling apparatus can be reduced
`greatly if advanced thermal interface materials are employed.
`
`Acknowledgements
`
`This work is part of a collaborative project among Institute of Microelectronics, Nanyang
`Technological University and Georgia Institute of Technology. The authors acknowledge K.H.
`Toh and W.J. Yeong for their assistances in the experimental work.
`
`References
`
`[1] Assembly and Packaging, ITRS Roadmap 2001, pp. 4–8.
`[2] R.C. Chu, Thermal management roadmap cooling electronic products from handheld device to supercomputers,
`MIT Rohsenow Symposium, Cambridge, MA, May 2002.
`[3] D.B. Tuckerman, R.F.W. Pease, High-performance heat sinking for VLSI, IEEE Electron. Dev. Lett. EDL-2
`(1981) 126–129.
`[4] C. Perret, J. Boussey, C. Schaeffer, M. Coyaud, Analytic modeling, optimization, and realization of cooling
`devices in Silicon technology, IEEE Trans. Compon. Pack. Technol. 23 (2000) 665–672.
`[5] P.S. Lee, J.C. Ho, H. Xue, Experimental study on laminar heat transfer in microchannel heat sink, in: Proceedings
`of ITHERM 2002, San Diego, pp. 379–386.
`
`CoolIT's Exhibit No. 2028
`IPR2020-00747 - Page 0015
`
`
`
`H.Y. Zhang et al. / Applied Thermal Engineering 25 (2005) 1472–1487
`
`1487
`
`[6] W. Qu, I. Mudawar, Experimental and numerical studies of pressure drop and heat transfer in a single-phase
`microchannel heat sink, Int. J. Heat Mass Transfer 45 (2002) 2549–2565.
`[7] C.B. Sobhan, S.V. Garimella, A comparative analysis of studies on heat transfer and fluid flow in microchannels,
`Microscale Thermophys. Eng. 5 (2001) 293–311.
`[8] B. Palm, Heat transfer in microchannels, Microscale Thermophys. Eng. 5 (2001) 155–175.
`[9] G.E. Kendall, P. Griffith, A.E. Bergles, J.H. Lienhard V, Small diameter effects on internal flow boiling, in:
`Proceedings of ASME 2001 IMECE, New York, 2001, pp. 1–17.
`[10] Integrated circuits thermal measurement method—Electrical test method (single semiconductor device), JEDEC
`Standard 51-1, December, 1995.
`[11] A.D. Kraus, A. Bar-Cohen, Design and Analysis of Heat Sinks, John Wiley & Sons, Inc., 1995.
`[12] F.P. Incropera, D.P. DeWitt, Fundamentals of Heat and Mass Transfer, fourth ed., John Wiley and Sons, 1996.
`[13] D. Copeland, Optimization of parallel plate heat sinks for forced convection, in: Proceedings of 16th IEEE SEMI-
`THERM Symposium, San Jose, 2000, pp. 266–272.
`[14] R.K. Shah, A.L. London, Laminar flow forced convection in ducts, in: Handbook of Single-phase Convective
`Heat Transfer, John Wiley & Sons, 1987, p. 3.52.
`[15] S. Lee, S. Song, V. Au, K.P. Moran, Optimization and selection of heat sinks, IEEE Trans. Compon. Pack.
`Manuf. Technol. A 18 (1995) 812–817.
`[16] W.M. Kays, A.L. London, Compact heat exchangers, third ed., McGraw-Hill, New York, 1984.
`[17] D. Pinjala, N. Khan, L. Xie, P. Teo, E.H. Wong, M.K. Iyer, C. Lee, I.J. Rasiah, Thermal des