`
`1990 IEEE
`
`INTERNATIONAL SYMPOSIUM ON
`
`CIRCUITS AND SYSTEMS
`
`5
`
`Volume 4 of 4
`
`Sheraton Hotel
`
`New Orleans, LA
`May 1—3, 1990
`
`©
`
`90 CH2868-8
`
` Xilinx Exhibit 1016
`Xilinx Exhibit 1016
`Page 1
`Page 1
`
`

`

`7mm
`
`ir
`
`Page 2
`Page 2
`
`Additional copies may be obtained from
`IEEE Service Center
`445 Hoes Lane
`
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`1-800—678-IEEE
`
`IEEE Catalog No. 90CH2868-8
`
`Library of Congress Catalog No. 90-80891
`
`Copyright and Reprint Permissions: Abstracting is permitted with credit to the source. Libraries are permitted
`to photocopy behind the limits of us. copyright law for private use of patrons those articles in his volume that
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`permission, write to Director, Publishing Services, IEEE, 345 East 47 Street, New York, NY 10017-2394. All
`rights reserved.
`Copyright © 1990 by The Institute of Electrical and Electronics Engineers, Inc.
`
`
`
`l i
`
`, i l
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`

`

`
`
`Table of Contents
`
`
`
`VOLUME I
`
`TUESDAY SESSION SCHEDULE
`
`
`TUAM-IA
`
`Design and Testing of Integrated Circuits I
`
`Chair:
`
`1
`
`S. Shinoda, Chlo U., Japan
`
`Testing of Multiple-Output Domino
`Inglct'MODUCMOS Circuits
`N. K. Jim and Q. Tong, Princeton U.
`
`13
`
`1?
`
`Chair:
`
`21
`
`25
`
`0n Detecting Single and Multiple Brldgiug Faults in
`CMOS Circuits Using the Current Supply Monitoring
`Method
`K.-J. Lee and M. A. Bretter, U. of Southern California
`
`Testing of Zipper CMOS Logic Circuits
`Q. Tong and N. K. Jha. Princeton U.
`
`Go the Equivalence of Fanottt-Point Faults
`A. Lioy, Politecnioo di Torino
`
`Test Generation for Hybrid Interactive Logic Arrays
`A Chatterjee. General Electric CRD and J .A Abraham,
`U. of Texas at Austin
`
`TUAM-IB
`
`DeSign and Testing of Integrated Circuits 11
`
`G. Moschytz, Swiss Federal Institute of Technology,
`Switzerland
`
`An Error CorrectoriDetector Implemented in a Desktop
`Programmable Gate Array
`L. M. Na
`litano, D. D. Andaleon, W. 0. Shreeve, Sandia
`National
`boratories, G. R. Redinbo. U.C.-Davis
`
`Automatic Test Point Selection for Linear Analog Net-
`work Fault Diagnosis
`A. Liberatore, S. Manettl and M. C. Ploclrilli,U. of Flor-
`enoe
`
`Multiple-Fault location in Linear Circuits Via Multiple
`Excitations
`
`I-I. Tang and R. J. Mack, U. of Essex
`
`A Framework for Analog Circuit Verification
`T. Kelessoglou and DD. Pederson, U.C.-Berlreley
`
`3"!
`
`A Fast Algorithm for the Generation of Fault Dictionary
`of Linear Analog Circuits Using Adjolnt Network Ap-
`proach
`V. C. Prasad and S. N. R. Pinjala, Indian Institute of Tech-
`nology
`
`TUAM-Z
`
`VLSI Circuits for Image Processing
`
`Chair:
`
`M. Bayoumi, U. of SW Louisiana
`
`41
`
`45
`
`49
`
`53
`
`57
`
`61
`
`65
`
`69
`
`73
`
`77
`
`Data Compressor Dccompressor 1C
`1. A Shah and B. C. Johnson, North American Philips Gor-
`poration
`
`VLSI Architectures for Hierarchical Block Matching Al-
`gorithms
`T. Komarek and P. Plrsch, U. of Hannover
`
`Cache Memory Design for the Data Transport to Array
`Processors
`
`H. Volkers, H. Jeschlte and T. Wehbcrg, U. of Hannover
`
`Analog Implementation of the Hough Transform Suit-
`able for Single Chip VLSl Implementation
`D. Ben—Tzvi and M. Sandler. U. of London
`
`VLSI Recursive Motion Estimator Chip Set
`8. Brofferio, U. of Bari, M. Monti, M. Taiiercio, SGS-
`Thomson, V. Ramps, STE-Chi R
`
`The One Otter Eight Squared Algorithm: A New Way for
`Computing Convolutions and Complex Multiplications
`A. Skavantzos, Louisiana State U.
`
`A Video Delay Line Compiler
`F. Roman, C. Joanblanq and P. Senn, Centre National
`d‘Etudes des Telecommuni-tions
`
`VLSI Architecture for Template Matching
`C. Chakrabarti and J. JaJa, U. of Maryland
`
`ESEU-A Hardware Architecture for Fast Image Genera-
`tion
`
`K.-I. Bang, S.-0. Rae and C.-M. Kyung. Korea Advanced
`Institute of Science and Technology
`
`A DCI' Chip Based on a New Structured and Com-
`putationally Efficient DCT Algorithm
`P. Duhamel, CNETI C. Guillemot and J. C. Carlach,
`CCETI'
`
`vii
`
`Page 3
`Page 3
`
`

`

`
`
`TUAM-3
`
`Modeling and Simulation of Solid State Devices
`
`Chair:
`
`A. M. Davis, San Jose State U.
`
`A New Method for an Efficient Optimization of MOS
`Transistor Models
`F. Pornbacher, U. Fichter, G. Muller-Liebler, H. Zapf,
`Siemens AG
`
`A Process and Geometry Driven Device Macro Model for
`Statistical Simulation of Bipolar 105
`R. Hester, T. Nge, A. Felt, B. Abdi, M. Rencher, B. Burns
`and 1. Miller, Motorola Inc. SPS
`
`A Model for Delay Evaluation era CMOS Inverter
`S. R. Vemuru and A. R. Thorbjornsen, U. of Toledo
`
`A New Frequency Domain Physical Device Simulation
`Technique
`Y. Xuan and C. M. Snewden, U. of Leeds
`
`A New SPICE-Compatible Model and Related Self-Cou-
`sistent Parameter Extraction for the Dual-Gate JFET
`P. Van Haien, Fenland State U., S. Lloyd, M. Metcalf, A.
`Moore, F. Seversen, Teirtrenix ICC
`
`471
`
`129
`
`3271
`
`133
`
`137
`
`141
`
`A Novel Design Technique for Tuneable Notch Filters
`G. W. Medlin, U. of South Carolina
`
`0n the Elimination of Zero-Input Limit Cycles
`J. Szczupalr, Catholic U., C. Green, Federal U. of Rio de
`Janeiro
`
`Properties and Structures of Linear-Phase FIR Filters
`Based on Switching and Resetting of [IR Filters
`T. Saramaki, Tampere U. of Technology, A. T. Fain, State
`U. of New York at Bufiale
`
`High Performance Variable Cutoff Frequency Linear
`Phase Filters
`
`K. Estola, Nelda Mobile Phones
`
`A Novel IIR Filter Delay Equalizer Design Approach
`Using a Personal Computer
`K. Umine, IBM, .1. Andersen, U. of Washington, R. G.
`Hove, Boeing Company
`
`On the Design of Nearest-optimal Recursive Linear Shift-
`variant Digital Filters
`Z. Hui, North China U. of Technology, D.Wang and Z.
`Zhengang, Beijing U.
`
`Comparison of Mixed Analog-Digital Simulators
`P. E. Allen, B. P. L S. Chan, Georgia Institute of Technol-
`egy, W. M- Zuberelr, Memorial U. of Newfoundland
`
`144
`
`Quadrature Mirror Filter Design by Chebyshev Approxi-
`mation
`
`W.-T. Chang and M.-S. Lin, National Chiao Tung U.
`
`A Simple Short-Channel MOSFET Mode] and its Appli-
`cation to Delay Analysis of Inverters and Series-Con-
`nected MOSFETs
`T. Sakurai and A. R. Newton, U.C.-Berkeley
`
`
`
`TUAM-SA
`
`Power Systems Analysis
`
`A One-Dimensional MOSFET Model for Simulation of
`Hot-Carrier Induced Device and Circuit Degradation
`Y. Leblebici and S. M. Kang, U. of Illinois at Urbana-
`Champaign
`
`Chair:
`
`148
`
`113
`
`A High Speed Pipelined CMOS Accumulator for Imple-
`menting Numerically Controlled Oscillators
`J. Yuan, C. Svensson, LSI Design Center, IFM, F. Lu, H.
`Samueli, U.C.-I.es Angela
`
`
`TUAM-4
`
`Digital Filter Design I
`
`Chair:
`
`W. B. Mikhael, U. of Central Florida
`
`117
`
`121
`
`125
`
`A New Method of Realization of Digital Filters
`J. Martins and M. S. Piedade, Institute Superior Tecnice
`
`Pipeling Techniques for [IR Digital Filters
`M. A. Soderstrand, H. H. Loomis and R. Gnanasckaran,
`Naval Postgraduate School
`
`A New Approach to the Design of Perfect Reconstruction
`QMF Banks
`R. D. Keipillai and P. P. Vaidyanathan, California Institute
`of Technology
`
`152
`
`156
`
`160
`
`164
`
`viii
`
`P. W. Sauer, U. of Illinois at Urbana-Champaign
`
`Nonlinear Monotone Networks and Their Role in Elec-
`tric Power
`
`M. D. Ilic, Massachusetts Institute of Technology
`
`Probablistic Transient Stability Utilizing A Transforma-
`tion
`D. R. Romero and H. M. Martinez Merci, Institute
`Peliteenioe Nacional
`
`A New Approach to Estimate Stability Regions of Inter-
`connected Nonlinear Systems via the Nonlinear Compari—
`son Principle
`L. Fcltih—Ahrned and H.-D. Chiang, Cornell U.
`
`Basic Property Study of Power System Topological Space
`and the Mappings on them
`Y. Zhang and J. A. Memeh, Howard U.
`
`A Class of Power Network Reliability Problems Via Col-
`ored Noise Modeling
`(1 O. Nwanlcpa and S. M- Shahidehpeur, Illinois Institute
`of Technology
`
`Page 4
`Page 4
`
`81
`
`85
`
`89
`
`93
`
`97
`
`101
`
`105
`
`109
`
`
`
`___a
`
`

`

`TUAM-SB
`Nonlinear Filters and Oscillators
`
`Chair:
`
`E. F. Deprettere, Delft U. of Technology, The Neth-
`erlands
`
`215
`
`Winner-Take-All Networks: Time-Based Versus Activa-
`tion-Based Mechanisms for Various Selection Goals
`
`3. Barnden, K. Srinivas and D. Dharmavaratha, New Mex-
`ico State U.
`
`3256
`
`Classification Boundaries and Gradients of Trained Mui-
`
`tilnyer Peroeptous
`J.-N. Huang, 5. 0h, 3. J. Choi and R. J. Marks, U. of
`Washington
`
`TUAM-‘i'
`
`Multidimensional Digital Signal Processing
`
`Chair:
`
`D. C. Munson, Jr., U. of Illinois at Urbano-Cham-
`paisn
`
`219
`
`223
`
`227
`
`231
`
`234
`
`238
`
`242
`
`Robust Adaptive Array Beamformlng in Two Dimensions
`JH Lee and J.—H. Chen, National Taiwan U.
`
`Identification of Image Blur Parameters by the Method
`of Generalized Cross-Validation
`
`S. J. Rem and R. M. Mersereau, Georgia Institute of
`Technology
`
`A Study on Source Coding of Super Definition Images
`with Vector Quantization
`T. Fujii, T. Sawabe, N. Ohta and S. Ono, Nippon Tele-
`graph and Telephone Corporation
`
`Application of Time-Frequency Distributions to Radar
`Imaging
`B. Boashash, O. P. Kenny, Bond U., H. J. Whitehouse,
`Naval Oceans Systems Center
`
`A High-Speed Radon Transform and Backprojectlon Pro-
`cessor
`
`E. Shieh, W. Current, P. Hurst and I. Agi, U.C.-Davis
`
`Decomposition of the Focusing Transformation in Coher-
`ent Signal Subspace DOA Estimation
`D. Lee and J. H. McClellan, Georgia Institute of Technol-
`0E"
`
`Time-Frequency Waveform Synthesis Using A Least
`Squares Approach
`0. Arikan and D. C. Manson, U. of Illinois at Urbana-
`Champaign
`
`Sinusoidal Responses of Nonlinear Signal Processing
`0 rotors
`C. Ifi Chu and A. Sahoo, U. of SW Louisiana
`
`The Configuration of Stack Filters by Probabilistic
`Search
`K. Ere, C. H. Chu and K. B. Rao, U. of SW Louisiana
`
`Theoretical Approach of the Application of Negative Dy-
`namic Feedback in VCO Oscillators
`E. Efstathiou, Warsaw U. of Technology
`
`The Influence of Harmonic Distortion on Injection lock-
`ing of Synchronous Oscillators
`T. D. Flamouro
`ulos, AT&T Bell laboratories, M. H.
`White, Lehigh
`
`.
`
`An Algorithm to Measure High Order Volterra Kernels
`P. Zhang and Y. Song, Beijing U.
`
`TUAM-éA
`
`Neural Networks: Theory and Design
`
`F. M. A. Salam, Michigan State U.
`
`Unifying the Hopfield and Hamming Binary Associative
`Memories
`
`P. Houselander and J. T. Taylor, U. College London
`
`Scale-invariance and the Upper Limits of interconnec-
`tion Complexity
`P. Christie, U. of Delaware, B. Dorrioott, Imperial College
`
`A Network that Uses the Outer Product Rule, Hidden
`Neurons, and Peaks in the Energy Landscape
`M. R. Davenport and G. W. Hoffmann, U. of British Co-
`lumbia
`
`New Artificial Models: The Basic Theory and Character-
`istics
`
`F. M. A. Salam, Michigan State U.
`
`TUAM-6B
`
`Neural Networks: Learning Strategies
`
`F. M. A. Salem, Michigan State U.
`
`The Neural Network Self-Healing Process by Using a Re-
`constructed Sample Space
`R. E. Hodges and C.-H. Wu, Auburn U.
`
`168
`
`172
`
`177
`
`130
`
`184
`
`Chair:
`
`188
`
`192
`
`196
`
`200
`
`Chair:
`
`204
`
`207
`
`211
`
`Torrard the Use of Set-Membership Identification in Effi-
`cient Training of Feedfomrd Neural Networks
`J. R. Deller, Michigan State U.
`
`Tho-Dimensional Adaptive Block Kalman Filtering of
`Radar Imagery
`M. R. Azimi-Sadjadi and S. Bannour, Colorado State U.
`
`A learning Rule in the Chebyshev Norm for Multilayer
`Peroeptrons
`P. Burrascano and P. Lueci, U. of Rome
`
`AVery Fast Kalman Filter for Image Restoration
`J. Y. Zhaug and W. Steenaart, U. of Ottawa
`
`
`
`Page 5
`' Page 5
`
`

`

`
`
`
`
`254
`
`258
`
`262
`
`266
`
`271
`
`275
`
`279
`
`283
`
`Advances in Adaptive Orthogonal Filtering with Applica-
`tions to Source Imalization
`P. A. Regalia, INT/ENST and P. Loubaton
`
`The QRD-Based [east Squares Lattice Algorithm: Some
`Computer Simulations Using Finite Wordlengths
`I. K. Proudler, J. G. McWhirter and T. J. Shepherd, RSRE
`
`Lattice and QR Decompos
`ition-Based Algorithms for Re-
`cursive Least Squares Adaptive Nonlinear Filters
`M. A. Syed and V. I. Mathews, U. of Utah
`
`Performance Comparison of 111.8 and LMS Algorithms
`for Tracking a First Order Markov Communication
`Channel
`N. J. Bershad, UC-Irvine and S. McLaughlin, C. F. N.
`Cowan, U. of Edinburgh
`
`Adaptive Sinusoid Detection Using HR Notch Filters
`and Multirate Techniques
`M. R. Petragalia, S. K. Mitre, UC-Santa Barbara and .T.
`Snczupait, Pontifical U. Catolica of Rio de Janerio
`
`Blind Adaptive Filtering In the Frequency Domain
`1. J. Shynlt, C. K. Chan and M. R. Petragalia, UC—Santa
`Barbara
`
`Adaptive Echo Compensation Applied to the Hands-Free
`Telephone Problem
`E. Hansler, Institut fur Netzwerk-und Signaltheorie
`
`New Fast Split-Type Algorithm for Adaptive Au-
`toregressive Spectral Analysis
`K. Berberidis, Computer Technical Institute and S. The-
`odoridis, U. of Patras
`
` _____——..._——-——-———-—
`
`TUAM-s
`
`Advances in Adaptive Signal Processing
`
`Invited
`
`Organizer: M. Bellanger, T. R. T., France
`Chair:
`M. Bellanger, T. R. T., France
`
`TUAM-9
`
`Current-Mode Analog lC Design
`
`Invited
`
`Analog Signal Processing Technical Committee
`Sponsor:
`Organizers: C. Toumazou, Imperial College of Science,Technol-
`ogy and Medicine and I. Lidgey, Oxford Polytechnic
`Y. P. Tsividis, Columbia U.
`
`Chair:
`
`28?
`
`291
`
`295
`
`The Performance and Applications of a New Current
`Conveyor Integrated Circuits
`D. C. Wadsworth, Phototroniec Co. Regci.
`
`High Frequency, Precision Integrations Using Current-
`Conveyor Compensation Techniques
`C. A. Makris and C. Toumazou, Imperial College of Sci,
`Tech & Medicine
`
`The Operational Conveyor Amplifier - A New Circuit De-
`sign Block
`D. E. Bowers, and J.E.C. Brown, Precision Monolithic Inc.
`
`299
`
`303
`
`30‘?
`
`Some Properties of Continuous-Time and Switched Ca-
`pacitor Filters Based on Current Charge and Voltage
`Simulation
`D- G. Haigh, RR. Radmore, U. College, London
`
`Switched-Current System Cells
`J. B.Hu hes, I. C. Macbeth and D. M. Pattullo, Philips
`Researc Labs
`
`Noise Analysis of Current Copier Circuits
`S. J. Daubert, AT&T Bell labs and D. Vallanoourt, Oo-
`lumbia U.
`
`311
`
`A [me-Power High-Speed lfl-Bit CMOS-Compatible DIA
`Converter
`
`H. W. Singor and C. A. T. Salama, U. Toronto
`
`3283 Current-Mode Neural Network Building Blocks for Ana-
`log MOS VLSI
`S. Bibyk, N. Khachab, K. Adkins, M. Ismail, S. Dupie, R.
`Kan! and T. Borgstrom, Ohio State U.
`
`TUAM-lo
`
`Applications of Graph Theory to Layout Problems
`
`Invited
`Organizer: Y. Kajitani, Tokyo Inst. of Tech, Japan
`Chair:
`Y. Kajitani, Tokyo Inst. of Tech., Iapart
`
`315
`
`Optimal Rectilinear Drawing of 3 Graph Whose Vertices
`are Fixed on a Hone
`
`Y. Kajitani and T. Takahashi, Tokyo Inst. of Tech.
`
`319
`
`323
`
`327
`
`Planar Orthogonal Drawings of Graphs
`R. Tamassia, Brown U.
`
`Embedding Large Meshes into Small Ones
`I. H. Sudborough and RC. Sang, U. of Texas-Dallas
`
`Linear Time Optimization of Partially Solved Floorplans
`S. L. Hakimi and T. S. Moh, UC-Davis
`
`332 Maximum K-Coverings of Weighted Transitive Graphs
`With Applications
`M. Sanafzadeh and R. D. loo, Northwestern U.
`
`336
`
`340
`
`An Algorithm for Reconfiguration of U0 Butters
`K. Nakajima and J. Narashimham, U. of Maryland
`
`A Permutation Layout with Arbitrary Between-Pins Ca-
`pacities
`T. Kashiwabara, Osaka U., C. S. Rim, E’I'Rl, Korea and
`K. Naltajima, U. of Maryland
`
`lnterchanging Terminals for Improved Channel Routing
`I. G. Tollis and S. G. Tragoudas, U. of Texas-Dallas
`
`Use of Performance Sensitivities in Routing Analog Cir-
`cuits
`
`U. Choudhury and A. Sangiovanni-Vinoentelli, UC-Berke-
`133'
`
`Page 6
`Page 6
`
`

`

`352
`
`On the Design of a Parallel Algorithm for VISI Layout
`Compaction
`K 'I'hulasiraman, M. A. Comeau, A. Das, R. P. Chalasani
`and J. W. Atwood, Concordia U.
`
`
`TUAM-ll
`
`2— A Conversion, Part I
`
`Invited
`
`387
`
`Time-Domain Reactive Power Concepts for Nonlinear,
`Nonsinusoidal or Nonperiodic Networks
`J. L. Wyatt and M. Ilic, MIT
`
`391
`
`Qualitative Analysis of Neural Networks Under Struc-
`tural Perturbations
`
`L. T. Grujic and A. N. Michel, U. of Notre Dame
`
`395 Monotonlcity in Nonlinear Resistive Circuits
`P. Chauffeureaux and M. Hasler, Swiss Fed. Inst. of Tech.
`
`Sponsors: Analog Signal Processing and Digital Signal Process-
`ing Technical Committees
`5. R. Norsworthy, AT&T Bell Laboratories
`S. R. Norsworthy, AT&T Bell Laboratories
`
`Organizer:
`Chair:
`
`356
`
`360
`
`Technology Scaling and Performance Limitations in
`Delta-Sigma Analog-Digital Converters
`M. W. Hauser, Cornell
`
`A New Architecture for Second Order E—A Modulation
`I. T. Stonick, J. L. Rulla, S. H. Ardalan and J. K.
`Townsend, North Carolina State U.
`
`399
`
`403
`
`407
`
`Chaos in Mutually Coupled Phase-Locked [oops
`T. Endo, National Defense Acad. and L. 0. Chna, UC-
`Berkeley
`
`A Globally Convergent Algorithm for Solving a Broad
`Class of Nonlinear Resistive Circuits
`L. Vandenberghe and J. Vandewalle, Catholic U.-Leuven
`
`On the Uneariaation ofVolterra Nonlinear Systems
`Using Third-Order lnverses in the Digital Frequency-Do-
`main
`S. W. Nam and E. J. Powers, U. of Texas-Austin
`
`3275 Multiplier-Free Decimator Algorithms for Superrasolu-
`tion Oversampled Converters
`T. Sararnaki, T. Karema, 'I‘. Ritoniemi and H. Tenhunen,
`Tampere U. of Tech.
`
`TUAM-Pl
`
`Topics in Computer Aided Analysis and Design of
`Circuits and Systems
`
`32.67
`
`The Design of Stable High Order 1-Bit Sigma-Delta Mod-
`ulators
`
`T. Ritoniemi, T. Karema and H.Tenhunen, Tampere U.
`of Tech-
`
`Poster
`
`Chair:
`
`I. N. Hajj, U. of Illinois at Urbana-Champaign
`
`364
`
`368
`
`372
`
`376
`
`Linemization ol'a Sigma—Delta Modulator by a Proper
`Loop Delay
`A. Gosslau and A. Gottwald, U. der Bundeswehr,
`Muenchen
`
`Dithering and Its Effects on Sigma-delta and Multi-stage
`Sigma-delta Modulation
`W. Chou and R. M. Gray, Stanford U.
`
`An Improved Sigma-Delta Modulator Architecture
`T. C. Leslie and B. Singh, Pleasey Research Caswell Ltd.
`
`Simulation of E—A Modulators Using BehaVioral Models
`C. M. Wolff and L. R. Carley, Carnegie Mellon U.
`
`TUAM-IZ
`
`Fundamental Aspects of Nonlinear Circuits
`and Systems
`
`Invited
`
`Organizer: M. Hasler, Swiss Fed. Inst. of Tech, Switzerland
`Chair:
`M. Hasler, Swiss Fed. Inst. of Tech., Switzerland
`
`380
`
`334
`
`g-Representations and Diflerential Equations
`1. W. Sandberg, U. of Texas-Austin
`
`New General Nonlinear Representations for System
`Operators
`R. I. P. DeFiguciredo and G. Chen, Rice U.
`
`3238
`
`Logical Function and Delay Time Extraction from a
`MOS Circuit
`
`K. Fujiyoshi, M. Kaneito and M. Onoda, Tokyo Institute
`of Technology
`
`411
`
`Can Logic Simulators Handle Bidirectionality and
`Charge Sharing?
`P. Agrawal and V. D. Agrawal, AT&'I‘ Bell Laboratories
`
`3242 Current-Mode Circuits: Analysis and CAD Modelling
`B. Wilson, U. of Manchester
`
`415
`
`420
`
`424
`
`423
`
`432
`
`Efficient Techniques for Timing Correction
`D. Hathaway, 1.. H. Trevillyan, C. L. Berman, IBM, A. S.
`LaPaugh, Princeton U.
`
`MDCSim- A Fast Timing Simulation Program for MOS
`Digital Circuits
`F. Zoo, Technical U. of Munich
`
`Orthogonal Array Approach to Gradient Based Yield
`Optimization
`M. A Styblinslti and J. C. Zhang, Texas A&M U.
`
`Computer-Aided Analysis of Non-Linear Lumped-
`Distributed Multiport Networks
`E. A. Hosny, M. A. Nasser, Military Technical College,
`Cairo, M. I. Sobhy, U. of Kent, Canterbury
`
`Generation of Network Functions in Symbolic Form by
`Using the Mixed Block Diagonal Node Admittance Matrix
`A. F. Kader, U. of Technology
`
`Iii
`
`Page 7
`Page 7
`
`
`

`

`
`
`
`
`
`
`436
`
`A New Testable Design of Field Programmable Logic
`Arrays
`R. Rajsuman, Case Western Reserve U., Y. K. Malaiya
`and A. P. Jayasumana, Colorado State U.
`
`New Approach to the State Reduction in Incompletely
`Specified Sequential Machines
`M. J. Avediilo, J. M. Quintana and J. L. Huertas, U. of
`Seville
`
`0n the Optimal Code Generation for Signal Flow Graph
`Computation
`B. Wess, Technische U. Wien
`
`HALO: An Efficient Global Placement Strategy for
`Standard Cells
`Y.-Y. Yang and C.-M. Kyung, Korea Advanced Institute
`of Science and Technology
`
`KGD: An Automatic Gate Level Schematic Design System
`K. M. Ian, H. A. Andrade, C. Wiley and C.-L. Wu, U. of
`Texas at Austin
`
`Efficient Management of Complex Elements in Physical
`IC Design
`F. Curatelli, M. Barraghi and G. M. Bisio, U. of Geneva
`
`Analog Computing Method for Solving 'Dvo-Point Bound-
`ary Problems
`H. Li, Texas Tech U.
`
`448
`
`452
`
`456
`
`3286 A New Algorithm for Model Reduction by ImpulsefStep
`Error Minimisation
`H. Singh, B. Bandyopadhya
`ogy, Bombay, S. S. Lambs,
`Delhi
`
`Indian Institute of Technol-
`dian Institute of Technology,
`
`_______,__..__———————
`TUAM-P2
`
`Topics in Neural Networks - I
`
`Poster
`Chair:
`
`464
`
`468
`
`4'71
`
`475
`
`479
`
`K. Mondal, AT&T Bell Laboratories
`
`Layered Neural Networks Applied in the Recognition of
`Voicelass Unaspiratetl Stops
`L-C. Lia, L-M. Lee and H.-C. Wang, National Tsing Hua
`U.
`
`Unfully Interconnected Neural Networks as Associative
`Memory
`0. Gan and Y. Wei, Seutheast U.
`
`A Novel Design Technique for Tuneable Notch Filters
`G. w. Medlin, U. of so
`
`VLSI Placement with a Neural Network Model
`C-X. Zhang and D. A. Myiinslri, U. Karlsruhe
`
`Nonlinear Adaptive Filtering Using Annealed Neural Net-
`works
`R. A. Nobakht, S. H. Ardalan, G. L. Bilbro, and D. E. Van
`den Bout, North Carolina State U.
`
`A Neural Network Solution for Routing in Three Stage
`Interconnection Networks
`P. J. Melsa, Tellabs Research Center, J. B. Kenney and C.
`E. Rohrs, U. of Notre Dame
`
`Hoplield Neural Network for AR Spectral Estimator
`S. K. Park, Tennessee Technological U.
`
`A Noise-Reduction Neural Network as a Preprocessing
`Stage in the SVD Based Method of Harmonic Retrieval
`S. S. Rao and P. M. Pisharam, Villanova U.
`
`An Investigation of High-Order Bidirectional Associative
`Memories: Performance, Application and Parallel Imple-
`mentations
`C-H. Wu, D.A. Roland, Auburn U., C.-J. Wan U. of
`Colorado at Colorado Springs, H.-M. Tai, U. o
`ulsa
`
`487
`
`491
`
`495
`
`3246 Nonlinear Principal Component Using Feedi'orward Neu-
`ral Network
`M. Hambaba and G. Ritschel, Stevens Institute of Tech-
`nology
`
`3249
`
`A New Feature Fbttraction Method by Neural Netwarks
`I.-C. Jou, S.-S- Yu and S. C. Tsay, Telecommunication
`Labs
`
`499
`
`503
`
`Adaptive Weighted Order Statistic Filters Using Back-
`Propagation Algorithm
`1... Yin, J. Astola and Y. Neuvo, Tampere U. of Technology
`
`Interface Cancellation Using a Hopl'ieid Neural Network
`A. M. Haimovich and B. Even-Or, AEL Defense Corpora-
`tion
`
`Muted-Capacitor (SC) Simulation of Hopiieid Type
`Neural Networks
`M. Nikodetn, B. B. Bhattacharyya and S. M. Faruque,
`Concordia U.
`
`_____—__———————
`TUPM-lA
`
`Circuit Simulation Techniques
`
`Chair:
`
`P. Yang, Texas Instruments, Inc.
`
`510
`
`514
`
`519
`
`523
`
`521
`
`A Learning Scheme for SPICE Simulations Diagnostics
`M. Zanella and P. Gubian, U. degii Studi di Brescia
`
`On Exponential Fitting for Circuit Simulation
`L M. Silveria, J. K. White, HI). Note and L. M. Vidigal,
`INESC
`
`Dynamic Circuit Restructuring for Hierarchical Wave-
`form Relaxation
`P. Saviz and 0. Wing, Columbia U.
`
`Equivalent Analysis of Large Transistor Networks with
`Distributed Interconnection Circuits
`H. Mizutani, Sagami Institute of Technology, M. Tanaka,
`Sophia U.
`
`Subspace Based Approach for Circuit Simulation
`M. Wu, G. Lin and R. Liu, Tsinghua U.
`
`Page 8
`Page 8
`
`
`

`

`Chair:
`
`531
`
`536
`
`545
`
`TUPM—lB
`
`CAD Tools for Analog Design
`
`V. Rao, U. of Illinois, Urbana-Champaign
`
`[SAID-A Methodology for Atumated Analog IC Design
`C. M. Berrah, C. A. Makris and C. Toumazou, Imperial
`College
`
`Symbolic Simulation of Harmonic Distortion in Analog
`Integrated Circuits With Weak Nonlinearities
`P. Wambaoq, G. Gielen and W. Sansen, Katholieke U.
`Ieuven
`
`Adjoint Networks Revisited
`G. W. Roberts, McGill U., A. S. Sedra, U. of Toronto
`
`Sensitivity Analysis of Dynamic Circuits via Adjoint Sim-
`ulation
`J. ijiciechowsld, U. of Waterloo and J. Goszczycin', War-
`saw . of Technology
`
`549
`
`Digital Filter Symbolic Analysis
`I. Smcupak, Catholic U., M. V. Brandolino, FUCAPI
`
`
`TUPM-z
`
`Digital Integrated Circuits
`
`Chair:
`
`553
`
`S. M. Kang, U. of Illinois, Urbana—Champaign
`
`Resisterless Bi-CMOS Logic Circuit
`H. Javan and H. Chamas, State U. of New York at New
`Paltz
`
`558
`
`562
`
`566
`
`570
`
`574
`
`578
`
`582
`
`An Accurate Analytical Delay Model for BiCMOS Driver
`Circuits
`
`C. H. Diaz, 3. M. Kang and Y. Leblebici, U. of Illinois at
`Urbana-Champaign
`
`A High-Speed CMOS Full-Adder Cell Using a New Cir-
`cuit Design Technique - AdaptivelyuBiased Pseudo-
`NMOS Logic
`F. Lu and H. Samueli, U.C.-Los Angeles
`
`Self-Timed Precharge Latch
`Y. K Tan and Y. C. Urn, National U. of Singapore
`
`A Novel Design of Binary Majority Gate and Its Applica-
`tion to Median Filtering
`C. L. Lee and C.-W. Jen, National Chiao Tung U.
`
`CMOS Digital Adaptive Decision Feedback Equalizer
`Chip for Multilevel QAM Digital Radio Modems
`M. Schobinger, J. Harri and T. G. Noll, Siemens AG
`
`Pulsewidth Measurements Using An Integrated Pulse
`Shrinking Delay Line
`T. Rahkonen and J. Kostamovaara, U. of Oulu
`
`A New Two-Phase Pipelined Dynamic CMOS Ternary
`Logic
`C.-Y. Wu and H.-Y. Huang, National Chiao Tung U.
`
`587
`
`Monolithic GaAs Programmable Parallel-to-Serial and
`Serial-to-Parallel Converters
`RA. Burrier, W. L. Miranda, J. A. Irvine, R. A. Sadier and
`H. P. Singh, UT
`
`591
`
`The Superconductive Node-Pair Memory
`S. H. Smith and H. Krad, U. of Newr Orleans
`
`
`Modeling and Simulation of Circuits and Systems
`
`TUPM-S
`
`Chair:
`
`595
`
`599
`
`603
`
`613
`
`617
`
`621
`
`624
`
`628
`
`Chair:
`
`632
`
`636
`
`I. K. Fidler, U. of York, Great Britian
`
`The Squeezed Spiral Map. A One-Dimensional Model of
`Dynamics for a Class of Third Order Systems
`M. J. 0gorzalek, IMISUE
`
`Analysis of Systems Subject to Parameter Uncertainties:
`Application of Interval Analysis
`A N. Michel and H. F. Sun, U. of Notre Dame
`
`Investigation of the Use of Analog Design Methods for
`the Integration of a High Frequency Mixed Analog Digi-
`tal Fiber Optic Receiver
`R. Spat-ices, Tektronix, Inc. and K. MacKenzie, M.I.T.
`
`Viterhi Decoder for Microwave Digital Radio - A Novel
`Architecture and System Simulation Results
`5. R. Meierand T.G. Noll, Siemens AG
`
`Asymptotic Waveform Evaluation for Circuits Contain-
`ing Floating Nodes
`L. T. Pilla e, U. of Texas at Austin, X. Huang, R. A.
`Rohrer,
`rnegie Mellon U.
`
`Improved Operational Amplifier Setting Behavior Using
`Active Compensation Techniques
`C. A. Makris and C. Toumazou, Imperial College
`
`Exact Equivalence of Interative Pie-Filtering and IQML
`J. H. McClellan and D. Lee, Georgia Institute of Technol-
`08?
`
`Automatic Generation of Simulation Models for Analog
`Filters
`
`F. M. El-Turlty, AT&T Bell Laboratories
`
`Enhanced Digital Frequency Synthesizer and Its Analysis
`3. Hiltawa, V. K Jain, U. of South Florida, S. Mori, Keio
`
`'I‘UPM-4
`
`Digital Filter Design II
`
`M. A. Soderstrand, Naval Postgraduate School
`
`The New Lossless TWO-Pairs for T-Cascade Passive Digi-
`tal Filters Synthesis
`1. Shi and 2'. Lin, Beijing U.
`
`Synthesis ofMIMO System Structures with Low Fre-
`quency-Weighting Sensitivity
`T. Hinamoto and M. Nouri—Shirazi, Tottori U.
`
`Page 9
`Page 9
`
`
`
`

`

`642
`
`Synthesis of Digital Filters by Means of a Modified Bilin-
`ear Transformation
`S. M. Famine, Marconi Company, B. B. Bhattacharyya,
`Concordia
`.
`
`Design of Digital Filters Using Simulated Annealing
`R. V. Kacelenga, P. I. Granmann and L E. Turner, U. of
`Calgary
`
`Digital All-Pass Filter Design Through Discrete Hilbert
`Transform
`G. R. Reddy and M. N. S. Swamy, Concordia U.
`
`692
`
`3260 Generation of Digital 'l'nransier Functions of the FIR
`Type Approximating a
`“
`V. Ramachandran, Concordia U., C. S. Gargour, U. of
`Quebec, M. Ahmadi, U. of Windsor
`
`The Design of Multiplieriess Two-Channel Linear-Phase
`FIR Filter Banks with Applications to Image Subhand
`Coding
`B.-R. Horng and A. N. Willson, UC-Los Angeles
`
`Invited
`
`650
`
`654
`
`658
`
`Polyphase FFI' Filter Bank for QAM Data Transmission
`N. Fliege, U. of Hamburg
`
`Design otFIR Sampled-data Filters for Data Transmis-
`sion
`H. Baher, Worcester Polytechnic Institute, M. O'Malley,
`U. College, Dublin
`
`661
`
`Logarithmic Filter Banks
`W. F. McGee and G. Zhang, U. of Ottawa
`_________—_._—_————-————
`TUPM-S
`
`Power Electronics
`
`Chair:
`
`M. Iiic, MIT
`
`665
`
`Simulation of Quasi-Resonant Converters in Half—Wave
`Mode Operation by Using the Modified Alternor Equa-
`tions
`
`A. loinovici, Hong Koo Polytechnic and S. Costiner,
`Weizmann Institute of
`‘ence
`
`669
`
`673
`
`A Novel Approach to the Analysis and Design of the
`Class-E DC-to-DC Converter
`R. Liu and C. 0. Lee, U. of Illinois at Chicago
`
`The Ini'easihility of Constant Output Power in a Con-
`stant-Current-Fed Class E Power inverter
`R. E. Zulinski, K. I. Herman and J. C. Mandojana, Michi-
`gan Technological U.
`
`676
`
`General Power Conversion Relation of Switching Con-
`verters
`
`J. Xu, Soutbuest J iaotoo U., J. Yu, U. of Electronic Sci-
`ence and Technology of
`ion
`
`679
`
`Synthesis ofAveraged Circuit Models for Switched
`vaer Converters
`S. R. Sanders, U.C.-Beri:cley, G. C. Verghese, Massachu-
`setts Institute of Technology
`
`
`
`DC and AC Small Signal Analysis of Zero—Current Quasi-
`Resonant Buck Converter
`
`J. Xu, 80th Jiaotong U.
`
`A Nonlinear Continuous Formulation l'or Large-Scale
`Analysis of Switching DC-DC Converters
`F. Guinjoan, A. Poveda, L. Martinez, J... Garcia de Vicuna
`and J. Majo, U. Politecnim of Vilanova
`
`Determination and Minimization of Cross Regulation in
`Mum-Output High Order SRC
`J. P. Agrawal, K. Siri, and C0. Lee, U. of illinois at Chi-
`cago
`
`TUPM-6
`
`Advanced Neural Network Theory
`
`Organizer:
`Chair:
`
`J. M. Zurada, U. of louisfille
`J. M. Zurada, U. of Louisville
`
`696
`
`700
`
`Photonic Neurocomputera and Learning Machines
`N. H. Farhat, U. of Pennsylvania
`
`Analysis and Synthesis of a Class of Discrete-Time Neu-
`ral Networks Described on Hypercuhes
`A. N. Michel, J. Si and G. Yen, U. of Notre Dame
`
`704
`
`Realization of Boolean Functions by Perception Algo-
`rithms
`
`Z-H. Chai and R.-W. Liu, U. of Notre Dame
`
`706
`
`Consistency and Generalization in Incrementally
`Trained Connectionist Networks
`
`T. Martinez, Brigham Young U.
`
`710
`
`Fast Computation of Optimal Paths in 'I‘wo-and Higher-
`Dimension Maps
`-
`M. H. HassOun, Wayne State U.
`
`714
`
`Immunization of Neural Networks Against Hardware
`Faults
`
`R. K. Churn and L. P. McNamee, UCLA
`
`719
`
`723
`
`727
`
`Constrained Principal Component Analysis Via an 0r-
`thogonal [earning Network
`5. Y. Kung, Princeton
`
`A New Nonlinear Functional Analytic Framework for
`Modeling Artificial Neural Networks
`R. J. P. DeFigueiredo, Rice U.
`
`A Neural Network Approach to Statistical Decision Mak-
`ing
`C. Y. Yao and A. N. Willson, In, UCLA
`
`Page 10
`Page 10
`
`

`

`TUPM-TA
`
`Systolic Arrays and Parallel Processing for
`Multidimensional DSP
`
`775
`
`779
`
`Chair:
`
`W. A. Porter, U. of Alabama at Huntsville
`
`Sub‘band Adaptive [IR Noise Cancellation
`B. H. Lee and S. M. Koo, Northern Illinois U.
`
`An Adaptive [IR Echo Canceller Combining Out-put
`Error and Equation-Error Criteria
`J. A. B. Gerald, N. L. Esteves and M. M. Silva,U. Tecnica
`de Lisboa
`
`731
`
`735
`
`739
`
`743
`
`747
`
`Block Pipeline 2-D IIR Filter Structures Via Iteration
`and Retimilg
`C. W. Wu, National Tsing Hua U.
`
`Design and Implementation of High-Speed Signal Pro-
`cessing System for 2-D State-Space Digital Filters Using
`Distributed Arithmetic
`T. Yamakage and M. Kawamata, Toholru U.
`
`VLSI Implementation of Multiple Binomial Filters for
`Real-Time Image Processing
`J. R. Reder, Texas Instruments
`
`A Parallel Implementation of the Self-Organizing Fea-
`ture Map Using Synchronous Communication
`R. E. Hodges. C.-I-l. Wu, Auburn U., C.-J. Wang, U. of
`Colorado
`
`A Reconfigurable Processor Architecture for High-Speed
`Multidimensional Digital Filtering
`S.-M. Park, Old Dominion U., W. E. Alexander, North
`Carolina State U.
`
`TUPM-TB
`
`Image Processing
`
`Chair:
`
`K. M. Yang, Bellcorc, Inc.
`
`784
`
`Adaptive Cancelling for Jammers by Exactly Nailing
`0. Liu and L. Zen, Xian Jiaotong U.
`
`
`TUPM-SB
`
`Advances in Adaptive Digital Filtering Algorithms
`
`Chair:
`
`8. D. Steams, U. of New Meadco
`
`788
`
`792
`
`796
`
`801
`
`805
`
`Steady State and Convergence Characteristics of the
`Fixed Point KLS Algorithm
`T. Adali and S. H. Ardalan, North Carolina State U.
`
`Analysis of Simplified Gradient Adaptive Lattice Algo-
`rithms Using Power-of—Two Quantization
`M. J. Reed and B. Lin, Princeton U.
`
`Transforming SHARE etc into Lattice
`K-X. Miao and H. Fan, U. of Cincinnati
`
`Fast Adaptive Algorithms for Multichannel IS Filtering
`G. 0. Glentis and N. Kalouptsidis, U. of Athens
`
`Time Scale Separation Techniques for Adaptive Filtering
`A. W. Hull and W. K. Jenkins, U. of Illinois at Urbana-
`Champaign
`
`A High Performance Image Processing System
`L. A. Sousa, UNL, J. J. Caeiro and M. S. Piedade, INESC
`and CEAUTL
`
`Image Reconstruction From One—Bit Phase Information
`OBPI with Histogram Equalization Constraint
`X. Tang, Y. Yuan and Y. Wang, Wuhan U.
`
`1'51
`
`755
`
`759
`
`Restoration of Noisy Images Blurred by a Random Point
`Spread Function
`M. Bilgen and H.-S. Hung, Iowa State U.
`
`Invited
`
`
`
`VOLUME ll
`
`TUPM-9
`
`Mixed Analongigital Design Automation
`
`763
`
`High Speed Image Processing Via SLWCCD Devices
`T. Lu, L. Udpa and S. S. Udpa, Colorado State U.
`
`Organizers: E. Berkcan and F. Yassa, General Electric Company
`Chair:
`E. Berkcan, General Electric
`
`767
`
`A Full-Plane Block Kalman Filter for Image Estimation
`S. Citrin and M. R. Azimi-Sadjadi, Colorado State U.
`
`
`TUPM-SA
`
`Techniques for Adaptive Nois