`U.S. Patent No. 6,680,523
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`Petitioner’s Presentation in Support of Unpatentability
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`IPR2020-01630
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`THE CLAIMS
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`Independent Claim 1
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`A semiconductor wafer (1),
`having a multitude of chips (5),
`of which chips (5) each one of a given number of chips (5) is situated in
`one of a multitude of adjacent exposure fields (2),
`and having process control modules (4) which are each arranged in a given
`area on the semiconductor wafer (1),
`in which the given areas are formed by the exposure fields (2), and in
`which each process control module (4) takes the place of at least one chip
`(5).
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`Dependent Claim 2
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`A semiconductor wafer (1) as claimed in claim 1,
`in which a process control module (4) is present in each one of at least 25%
`of all the exposure fields (2), and in which the process control modules (4)
`are situated at equal distances from each other with respect to two mutually
`perpendicular coordinate directions (7, 8).
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`Dependent Claim 3
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`A semiconductor wafer (1) as claimed in claim 2,
`in which a process control module (4) is present in each exposure field.
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`Dependent Claim 4
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`A semiconductor wafer (1) as claimed in claim 1,
`in which all the process control modules (4) are each situated at the same
`location (6) in the respective exposure fields (2).
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`PROSECUTION
`HISTORY
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`Prosecution History
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`JANUARY 14, 2003 OFFICE ACTION
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`APRIL 10, 2003 AMENDMENT
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`Pet. at 11, Ex. 1002 at 37-39.
`Pet. at 11, Ex. 1002 at 29-33.
`Applicant argued the claims are distinguishable from the Have patent because
`the claims require multiple chips.
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`Prosecution History
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`July 14, 2003 NOTICE OF ALLOWABILITY
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`Pet. at 12, Ex. 1002 at 46-48.
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`Petitioner’s prior art overcomes this failure
`as all of the recited limitations are shown
`with multiple chips and exposure fields.
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`THE PRIOR ART
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`Overview of Prior Art: Yamaguchi
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`U.S. Patent No. 6,492,189
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`Filed: October 26, 2000
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` Wafer
` Multitude of chips
` Adjacent exposure fields
` PCMs take the place of at
`least one chip
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`Pet. at 15.
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`Yamaguchi Anticipates and Renders Obvious : Claim 1
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`A semiconductor wafer (1),
`having a multitude of chips (5),
`of which chips (5) each one of a given
`number of chips (5) is situated in one of a
`multitude of adjacent exposure fields (2),
`and having process control modules (4)
`which are each arranged in a given area on
`the semiconductor wafer (1),
`in which the given areas are formed by the
`exposure fields (2), and in which each
`process control module (4) takes the place
`of at least one chip (5).
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`Pet. at 20-22.
`Figures 1 and 7 (modified).
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`Yamaguchi Anticipates and Renders Obvious : Claim 1
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`A semiconductor wafer (1),
`having a multitude of chips (5),
`of which chips (5) each one of a given
`number of chips (5) is situated in one of a
`multitude of adjacent exposure fields (2),
`and having process control modules (4)
`which are each arranged in a given area on
`the semiconductor wafer (1),
`in which the given areas are formed by the
`exposure fields (2), and in which each
`process control module (4) takes the place
`of at least one chip (5).
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`Pet. at 23-24.
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`Yamaguchi Anticipates and Renders Obvious : Claim 1
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`•
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`“PCMs” refers to process control monitors or process control modules (which can contain multiple monitors) “that [are]
`placed on a wafer to assist in the process of producing the integrated circuits … on the wafer.” Petition at 13. “[T]he
`ordinary meaning of PCMs encompasses test structures used to detect flaws at any point in the wafer fabrication
`process.” Pet. Reply at 12.
`• A POSITA would understand the test element groups (“TEGs”) to be within the scope of PCMs
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`Thompson Dec. Ex. 1007 at ¶¶ 42, 44, 74.
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`Yamaguchi Anticipates and Renders Obvious : Claim 1
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`“…in which the given areas are formed by
`the exposure fields (2)…”
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`Pet. at 15-19, Ex. 1003 at 1:17-22.
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`Pet. at 23, Ex. 1003 at 5:10-11; Figure 1 (modified).
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`Yamaguchi Anticipates and Renders Obvious : Claim 1
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`“…each control module (4) takes the place
`of at least one chip (5).”
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`Pet. at 24, Ex. 1003 at 2:1-5.
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`Pet. at 23, Ex. 1003 at 5:10-11, (modified).
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`Yamaguchi Anticipates and Renders Obvious : Claim 4
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`A semiconductor wafer (1) as claimed in claim 1, in which all of the process
`control modules (4) are each situated at the same location (6) in the
`respective exposure fields (2).
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`Same location
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`Pet. at 26-27, Ex. 1003 Figures 1 and 6C (modified).
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`Overview of Prior Art: Satya
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`U.S. Patent No. 6,633,174
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`Filed: August 25, 2000
`Claims priority to two
`provisional patents filed
`December 4, 1999 and April
`18, 2000
` Wafer
` Multitude of chips
` Adjacent exposure fields
` PCMs take the place of at
`least one chip
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`Pet. at 27.
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`Satya Anticipates and Renders Obvious : Claim 1
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`A semiconductor wafer (1),
`having a multitude of chips (5),
`of which chips (5) each one of a given
`number of chips (5) is situated in one of a
`multitude of adjacent exposure fields (2),
`and having process control modules (4)
`which are each arranged in a given area on
`the semiconductor wafer (1),
`in which the given areas are formed by the
`exposure fields (2), and in which each
`process control module (4) takes the place
`of at least one chip (5).
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`Pet. at 30.
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`Figures 4A and 4B (modified).
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`Satya Anticipates and Renders Obvious : Claim 1
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`A semiconductor wafer (1),
`having a multitude of chips (5),
`of which chips (5) each one of a given
`number of chips (5) is situated in one of a
`multitude of adjacent exposure fields (2),
`and having process control modules (4)
`which are each arranged in a given area on
`the semiconductor wafer (1),
`in which the given areas are formed by the
`exposure fields (2), and in which each
`process control module (4) takes the place
`of at least one chip (5).
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`Pet. at 30, Ex. 1004 10:33-35.
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`Pet. at 27-28, EX1004 at 10:33-35.
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`Satya Anticipates and Renders Obvious : Claim 1
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`•
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`“PCMs” refers to process control monitors or process control modules (which can contain multiple monitors) “that [are]
`placed on a wafer to assist in the process of producing the integrated circuits … on the wafer.” Petition at 13. “[T]he
`ordinary meaning of PCMs encompasses test structures used to detect flaws at any point in the wafer fabrication process.”
`Pet. Reply at 12.
`• A POSITA would understand the test die to be within the scope of PCMs
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`Thompson Dec., Ex. 1007 at ¶¶ 42-44, 99.
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`Ex. 1004 at 10:35-38.
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`Satya Anticipates and Renders Obvious : Claim 1
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`“…in which the given areas are formed by
`the exposure fields (2)…”
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`Thompson Reply Dec., Ex. 1011 at ¶ 9.
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`Figures 4A and 4B (modified).
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`Satya Anticipates and Renders Obvious : Claim 1
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`“…in which the given areas are formed by
`the exposure fields (2)…”
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`The reticle is “stepped” across
`the wafer creating a pattern with
`the test die in a “given area
`formed by the exposure fields”
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`Ex. 1007 at ¶ 41.
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`Satya Anticipates and Renders Obvious : Claim 1
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`“…each control module (4) takes the place of at least one chip (5).”
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`Pet. at 30, EX1004 at 11:4-5.
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`Petition at 31, Thompson Decl. Ex. 1007 at ¶ 100.
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`Satya Anticipates and Renders Obvious : Claim 2
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`A semiconductor wafer (1) as
`claimed in claim 1, in which a
`process control module ( 4) is
`present in each one of at least
`25% of all the exposure fields
`(2) and in which the process
`control modules (4) are situated
`at equal distances from each
`other with respect to two
`mutually perpendicular
`coordinate directions (7, 8).
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`Petition at 33, Ex. 1004 at 8:48-53, Thompson Dec., Ex.
`1007 at ¶ 101-02.
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`Satya Anticipates and Renders Obvious : Claim 2
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`A semiconductor wafer (1) as
`claimed in claim 1, in which a
`process control module ( 4) is
`present in each one of at least
`25% of all the exposure fields
`(2) and in which the process
`control modules (4) are situated
`at equal distances from each
`other with respect to two
`mutually perpendicular
`coordinate directions (7, 8).
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`Thompson Dec., Ex. 1007 at ¶ 101.
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`Satya Anticipates and Renders Obvious : Claim 3
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`A semiconductor wafer (1) as
`claimed in claim 2, in which a
`process control module (4) is
`present in each exposure field
`(2).
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`Thompson Dec., Ex. 1007 at ¶ 101.
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`Satya Anticipates and Renders Obvious : Claim 4
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`A semiconductor wafer (1) as
`claimed in claim 1, in which all
`the process control modules (4)
`are each situated at the same
`location (6) in the respective
`exposure fields (2).
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`Petition at 35, Ex. 1004 at 8:48-52.
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`Petition at 35, Ex. 1004 at 10:63-64.
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`Figure 4B (modified).
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`NXP’S CLAIM
`CONSTRUCTION
`ARGUMENTS FAIL
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`PO ASSERTS YAMAGUCHI DOES NOT DISCLOSE PCMS (BUT IT DOES)
`PO’s relies on the following:
`•
`Improperly limiting the meaning of PCMs to test structures: (1) used during the wafer
`manufacturing process (i.e., “in-line” testing); and (2) tested only using optical lithography
`equipment (e.g., no electrical testing).
`• Arguing that TEGs cannot be used for in-line testing.
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`PO Resp. at 18.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`IMPINJ HAS OFFERED THE ORDINARY MEANING OF PCM
`PO wrongly asserts that Petitioner did not disclose the plain and ordinary meaning.
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`The Board merely disagreed that the PCMs encompass alignment marks. Petitioner disagrees, but
`regardless, Yamaguchi’s TEGs and Satya’s test die are PCMS.
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`Petition at 13.
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`Pet. Reply at 12.
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`Paper 12, Decision to Institute at 6.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`IMPINJ HAS PROVIDED TESTIMONY AND OTHER EVIDENCE REGARDING THE
`ORDINARY MEANING OF PCM
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`Dr. Thompson testified that process control monitors are sometimes called process control modules and
`that process control monitors include test structures.
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`Thompson Dec., Ex. 1007 at ¶¶ 42, 44.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THERE IS A PRESUMPTION THAT THE ORDINARY MEANING OF PCM SHOULD APPLY ABSENT
`DISCLAIMER OR CLEAR LEXICOGRAPHY BY THE APPLICANT
`“There is a heavy presumption that claim terms carry their accustomed meaning in the relevant
`community at the relevant time.” Azure Networks, LLC v. CSR PLC, 771 F.3d 1336, 1347 (Fed. Cir.
`2014), vacated on other grounds, 135 S. Ct. 1846, 1846 (2015)
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`The plain and ordinary meaning of a claim term should apply unless the patentee: (1) acted as his
`own lexicographer and defined that term differently in the patent, Markman v. Westview Instr., Inc.,
`52 F.3d 967, 980 (Fed. Cir. 1995); 3M Innov. Prop. Co. v. Avery Dennison Corp., 350 F.3d 1365,
`1371 (Fed. Cir. 2003) (“[A] definition of a claim term in the specification will prevail over a term’s
`ordinary meaning if the patentee has acted as his own lexicographer and clearly set forth a different
`definition.”); or (2) “demonstrate[d] an intent to deviate from the ordinary and accustomed meaning
`of a claim term by including in the specification expressions of manifest exclusion or restriction,
`representing a clear disavowal of claim scope.” Epistar Corp. v. Int’l Trade Comm’n, 566 F.3d
`1321, 1334 (Fed. Cir. 2009) (quoting Teleflex, Inc. v. Ficosa N.A. Corp., 299 F.3d 1313, 1325 (Fed.
`Cir. 2002)).
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`Pet. Reply at 8-9.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THERE IS NO CLEAR DISCLAIMER OF THE ORDINARY MEANING OF PCM OR REDEFINING OF THE TERM
`BY THE APPLICANT
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`Claim 1 cannot be limited to a particular process unless “the patentee made clear that the process steps are
`essential.” Continental Circuits LLC v. Intel Corp., 915 F.3d 788 (Fed. Cir. 2019) (“[I]n order to read a process
`limitation into a product claim, it must meet one more criterion. … [P]rocess steps can be treated as part of a product
`claim if the patentee has made clear that the process steps are an essential part of the claimed invention.”).
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`Pet. Reply at 9-10.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THERE IS NO CLEAR DISCLAIMER OF THE ORDINARY MEANING OF PCM OR REDEFINING OF THE TERM
`BY THE APPLICANT
`Neither the specification nor the prosecution history limited the meaning of PCM.
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`Ex. 1001 at 1:4-9.
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`Pet. Reply at 9-10.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`THE PATENT DOES NOT LIMIT PCMS TO THOSE TESTED USING OPTICAL LITHOGRAPHY EQUIPMENT
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`- The fact that wafers are formed by optical lithography techniques does not limit the meaning of
`PCMs.
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`Thompson Reply Dec., Ex. 1011 at ¶ 7.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`PO asserts U.S. Patent No. 8,415,769 is not probative of the plain and ordinary meaning of PCMs.
`-
`In contradiction to expert testimony that confirmed the meaning did not change from prior to 2001 to
`the time of the ’769 patent.
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`Thompson Reply Dec. Ex. 1011 at ¶ 4.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
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`THE PATENT DOES NOT LIMIT PCMS TO THOSE USED FOR IN-LINE TESTING
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`- Dr. Subramanian admitted detecting or recognizing flaws “during the wafer fabrication process” is
`never stated in the patent.
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`Subramanian Dep., Ex. 1012 at 56:20-57:7.
`Pet. Reply at 9-10.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCM WAS NOT AT THE TIME OF INVENTION LIMITED,
`TO IN-LINE TESTING
`Dr. Subramanian agrees the plain and ordinary meaning does not limit PCMs to in-line test
`structures tested using optical lithography equipment.
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`Pet. Reply at 3-4, Subramanian Dep., Ex. 1012 at
`Pet. Reply at 7, Subramanian Dep., Ex.
`41:17-42:3.
`1012 at 109:10-21.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCM WAS NOT AT THE TIME OF THE INVENTION,
`LIMITED TO IN-LINE TESTING
`PO asserts TEG regions are not PCMs because they perform electrical testing which is performed after
`the wafer fabrication process.
`- However, electrical testing can be performed during the wafer fabrication process.
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`Thompson Reply Dec. Ex. 1011 ¶ 2.
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`Pet. Reply at 9-10.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCM WAS NOT AT THE TIME OF THE INVENTION,
`LIMITED TO IN-LINE TESTING
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`Contrary to NXP’s arguments (Sur-Reply at 11),
`Nistler confirms that PCMs are test structures
`that encompass both electrical and process
`verification testing.
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`Nistler, Ex. 2007, 1:33-44.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCM WAS NOT AT THE TIME OF THE INVENTION,
`LIMITED TO IN-LINE TESTING
`PO’s definition contradicts PO’s own understanding of PCM use in Patent Owner’s own U.S. Patent
`No. 8,415,769.
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`Pet. Reply at 4; EX1011 at ¶ 4., U.S. PATENT NO. 8,415,769, Attachment A at 3:67-4:48
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCMS ENCOMPASSES ELECTRICAL TESTING
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`Thompson Dep., Ex. 2006 at 42:9-14.
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`Thompson Reply Dec., Ex. 1011 ¶ 4.
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`Pet. Reply at 5.
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`Thompson Dec., Ex. 1007 42:9-14.
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`NXP’s Arguments to Narrow the Meaning of PCM
`Fail
`THE ORDINARY MEANING OF PCMS ENCOMPASSES ELECTRICAL TESTING
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`Pet. Reply at 6, Thompson Reply Dec., EX1011 at ¶ 5,
`Attachment B at 546, 549.
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`NXP’s Arguments to Narrow the Meaning of “Take
`the Place of” Fail
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`PO asserts that “taking the place of” a chip requires the replacement be the exact size of the chip or
`larger. Sur-Reply at 15-16.
`- The ordinary meaning of “Take the Place of” does not require they be the exact same size
`- PO cites nothing that would change the ordinary meaning to require the same size
`- The claims do not require the PCMs be the same size
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`Pet. Reply at 9-10.
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`NXP’s Arguments to Narrow the Meaning of “Take
`the Place of” Fail
`Yamaguchi’s TEGs “tak[e] the place of at least one chip”.
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`Both as disclosed in Yamaguchi itself, and as understood by one of ordinary skill.
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`Pet. Reply at 13, Ex. 1003 at
`2:49-54.
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`Pet. at 24, Ex. 1003 at 2:1-5.
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`Pet. Reply at 13-14, Subramanian Dep., Ex. 1012
`at 82:5-9, 10-20.
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`NXP’s Arguments to Narrow the Meaning of “Given
`Areas” Fail
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`PO asserts that “given areas” “must have some meaning—they cannot simply be ‘merely a design
`choice.’” Sur-Reply at 17-18.
`- However, NXP’s explanation that “the stated objective of the ’523 patent to distribute ‘process control
`modules’ in such a way that exposure fields could be identified visually” adds an additional limitation
`in the claims that is not required.
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`Subramanian Dep., Ex. 1012 at 111:13-15.
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`
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`NXP’s Arguments to Narrow the Meaning of “Given
`Areas” Fail
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`Satya discloses PCMs in “given areas” on the wafer. Sur-Reply at 17.
`- The reticle in Satya is “stepped over” the wafer to produce various layouts.
`-
`In the various layouts, a “given area[ ]” is designated for PCMs.
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`Thompson Dec., Ex. 1011 at ¶ 9.
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`Pet. Reply at 18-19.
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`Figures 4A and 4B (modified).
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`
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`THE CLAIMS ARE
`SIMPLE
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`The Claims are Simple
`
`PO’S ADDITIONAL PROPOSED LIMITATIONS ARE NOT IN THE CLAIMS
`
`The claims only require a wafer, a multitude of chips, adjacent exposure fields, process control modules
`in the exposure fields, and that the process control modules take the place of at least one chip.
`- All of which are provided in Yamaguchi and Satya.
`
`What the claims do not require:
`- That the PCMs be in-line test structures
`- That the PCMs be tested using optical lithography equipment
`- The the PCMs be for something other than testing electrical characteristics
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`50
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`| © 2021 Perkins Coie LLP
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`Pet. Reply at 9-10.
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`
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`The Claims are Simple Invalid
`
`Yamaguchi
`
`Satya
`
` Wafer
` Multitude of chips
` Adjacent exposure fields
` PCMs
` PCMs take the place of at least
`one chip
`
`What would one of ordinary skill in
`the art understand?
`
`The claims are unpatentable!
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`51
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`| © 2021 Perkins Coie LLP
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`Figures 1 and 7 (modified).
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Figures 4A and 4B (modified).
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`QUESTIONS
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`52
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`| © 2021 Perkins Coie LLP
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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