Trials@uspto.gov
`571-272-7822
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` Paper 34
`Entered: February 4, 2022
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`___________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________
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`IMPINJ, INC.
`Petitioner,
`
`v.
`
`NXP USA, INC.,
`Patent Owner
`___________
`
`IPR2020-01630
`Patent 6,680,523 B2
`___________
`
`Record of Oral Hearing
`Held Virtually: Wednesday, January 12, 2022
`___________
`
`Before MIRIAM L. QUINN, MICHELLE N. WORMMEESTER, and
`STACY B. MARGOLIES, Administrative Patent Judges.
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`571-272-7822
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` Paper 34
`Entered: February 4, 2022
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`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`___________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________
`
`IMPINJ, INC.
`Petitioner,
`
`v.
`
`NXP USA, INC.,
`Patent Owner
`___________
`
`IPR2020-01630
`Patent 6,680,523 B2
`___________
`
`Record of Oral Hearing
`Held Virtually: Wednesday, January 12, 2022
`___________
`
`Before MIRIAM L. QUINN, MICHELLE N. WORMMEESTER, and
`STACY B. MARGOLIES, Administrative Patent Judges.
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`IPR2020-01630
`Patent 6,680,523 B2
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`A P P E A R A N C E S
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`ON BEHALF OF THE PETITIONER:
`
`
`BRIANNA KADJO, ESQUIRE
`RAMSEY AL-SALAM, ESQUIRE
`PERKINS COIE LLP
`1900 16th Street
`Suite 1400
`Denver, CO 80202-5255
`303-291-2349
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`
`ON BEHALF OF THE PATENT OWNER:
`
`
`YURY KALISH, ESQUIRE
`JOSHUA NIGHTINGALE, ESQUIRE
`JONES DAY
`51 Louisiana Avenue N.W.
`Washington, D.C. 20001-2113
`202-879-3616
`
`
`
`ALSO PRESENT:
`CASANDRA GARCIA, USPTO
`
`The above-entitled matter came on for hearing on Wednesday, January
`12, 2022, commencing at 10:03 a.m. EST, by video/by telephone.
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`IPR2020-01630
`Patent 6,680,523 B2
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` (Proceedings begin at 10:03 a.m.)
` JUDGE QUINN: All right. Okay. So we are here for
` the oral argument of Impinj, Inc. versus NXP USA, Inc.,
` IPR2020-01630, concerning Patent Number 6,680,523.
` With me are Judges Michelle Wormmeester and Stacy
` Margolies, and I am Miriam Quinn. Per our oral argument
` order, each party will have -- initially, it was 45 minutes,
` but each side has requested an additional 15 minutes due to
` participation in the LEAP program. So for that reason, each
` party will have allotted one hour. Of course, you don't have
` to take the entire hour.
` Petitioner will have -- will start with presenting
` its case and may reserve time for rebuttal. Patent Owner will
` present after Petitioner has presented its case in chief and
` will also be able to reserve time for rebuttal.
` Petitioner, how much time would you like to reserve?
` MS. KADJO: We would like 20 minutes for rebuttal,
` please.
` JUDGE QUINN: You said 20?
` MS. KADJO: Yes, please. 20.
` JUDGE QUINN: Okay. Are there any questions or
` issues we need to resolve before we start? Petitioner?
` MS. KADJO: No, Your Honor. I mean, no -- no,
` ma'am.
` JUDGE QUINN: Okay. Patent Owner?
` MR. KALISH: No, Your Honor.
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` JUDGE QUINN: Okay.
` All right. Ms. Kadjo, you may begin.
` MS. KADJO: Thank you.
` Good morning. My name is Brianna Kadjo, and I
` represent the Petitioner, Impinj, Inc., in IPR2020-01630. And
` today, we will discuss the claims of U.S. Patent Number
` 6,680,523 and why they are unpatentable.
` This is a little road map. We will first discuss
` the claims very briefly, then the prosecution history, and
` then the prior art and why our prior art anticipates and
` renders obvious the claims.
` Oh, excuse me. I forgot to share --
` JUDGE QUINN: Ms. Kadjo, before you begin -- before
` you continue, can you spell your name for the record and
` identify yourself when you speak if you're going to be
` interrupted by your colleague?
` MS. KADJO: Sure.
` My name is Brianna Kadjo, B-R-I-A-N-N-A, and then
` Kadjo, K-A-D-J-O.
` All right. So the claims. The '523 Patent has,
` essentially, four claims. One is independent, and the other
` three are dependent claims, and they are very simple claims,
` too. They just require a multitude of chips, adjacent
` exposure fields, the process control modules, that these are
` arranged in a given area, and that they take the place of at
` least one chip.
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` Claim 2, also, is very simple and really adds that
` the PC -- the process control modules, which I will refer to
` as PCMs, are in at least one-fourth of the exposure fields,
` that they're equal distances from each other. Claim 3 is also
` very simple, and it requires that the PCMs are present in all
` the exposure fields. And the last claim, Claim 4, requires
` that the PCMs are each situated at the same location in the
` respective exposure fields.
` Moving on to the prosecution history. On slide 8,
` here we have on the left the January 14, 2003, office action
` where the examiner rejected the present invention based on the
` van der Have Patent. On April 10, 2003, when the applicant
` responded, the remarks focused on the fact that van der Have
` had one large circuit and that the present invention had a
` multitude of chips. This is clearly underlined by the
` applicant.
` The underlying was not provided -- was not added by
` -- (indiscernible) merely added highlighting to show that in
` this area, they were distinguishing the present invention over
` van der Have merely based on there being multiple chips and
` multiple exposure fields on the wafer. After this argument,
` the claims were actually allowed. And so Petitioner -- we
` will show today two respective independent pieces of prior art
` that overcome the failures of the van der Have Patent.
` Now, moving on to the prior art. On slide 11, we
` have the overview of prior art Yamaguchi, which is U.S. Patent
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` Number 6,492,189, and it was filed October 26, 2000. And so
` slide 12 we have, basically, a color-coordinating with figure
` 7 and figure 1, which we cite in the petition and used to show
` that Yamaguchi anticipates and renders obvious the claims.
` And you see that we have -- figure 7 is a wafer that
` has the corresponding figure 1, the reticle, that stepped
` across it. The reticle has a TEG pattern region, and it also
` has chips. Only the TEG pattern region is in the given area
` at the bottom of figure 1.
` Now, turning to a major point of contention, is
` regarding PCMs and their definition. Petitioner has proposed
` the plain and ordinary meaning be used. And this encompasses
` placing the wafer -- process control monitors and process
` control modules that are placed on a wafer to assist in the
` process of producing the integrated wafers -- the integrated
` circuits on the wafer. This also includes test structures
` that are used to detect flaws at any point in the wafer
` fabrication process.
` We provided expert testimony from Dr. Thompson, who
` has stated that process control monitors and process control
` modules are really pretty synonymous. He also used a
` treatise, the Quirk and Serda treatise, with a definition, and
` then concluded that Yamaguchi, the test element groups, you
` know, that contains -- they contain TEG structures, and
` they're within the scope of the PCMs.
` JUDGE QUINN: Counsel, I suspect that at some point
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` you're going to talk about the claim construction. But I want
` to ask you, do you have right now, in your brief or that you
` have been able to identify, a construction or proposed
` construction for the meaning of process control module?
` MS. KADJO: Yes, Your Honor. So if you look on
` slide 14, we state that PCMs refers to process control
` monitors or process control modules that are placed on a wafer
` to assist in the process of producing the integrated wafers --
` the integrated circuits on the wafers.
` And that was provided at petition at 13. And then
` in the petition reply at 12, we also -- on page 12, we also
` stated that this encompasses test structures used to detect
` flaws at any point in the wafer fabrication process.
` And so really -- so moving on to the next
` requirement, in each given -- in which the given areas are
` formed by the exposure fields. Here, we have an excerpt from
` the Yamaguchi that does discuss, you know, exposing a
` semiconductor wafer through a mask pattern, and it's using the
` reticle in figure 1 in order to expose it -- expose the --
` create this same pattern on the wafer, and it's set across the
` wafer. And the TEG region is in the box at the bottom.
` The last requirement for Claim 1 is that each
` control module takes the place of at least one chip. While
` Yamaguchi actually states that the TEG region will take the
` place of several semiconductor chips and other places, it
` states that it will take the place of at least two rows. And
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` so that clearly shows that the control module takes the place
` of at least one chip.
` Moving on to Claim 4, which only requires that the
` PCMs are located in the same location. And as you can see in
` figure 6C, the PCMs are located in the same location at the
` bottom, as required by the figure -- the reticle in figure 1.
` Moving on to Satya, which is our second piece of
` prior art, and it's U.S. Patent Number 6,633,174. And we're
` at slide 18 right now. On slide 19, again, we have a
` color-coordinated graph that shows figure 4A and figure 4B.
` We have modified in -- for figure 4A to also include another
` exposure field just to show how the layout marks -- the figure
` 4B is stepped a cross-wafer as exposed in Satya. And you see
` the exposure fields and the chips are a -- referenced by label
` 206, and test die referenced by label 204.
` Here's an excerpt from Satya that actually shows the
` relationships between figures 4A and Figure 4B. Figure 4A is
` a semiconductor wafer, and it's comprised of a die array. And
` then figure 4B corresponds to figure 4A, and relates that
` square that was on figure 4A.
` So again, the major contention between the parties
` is really, what is PCMs? And, you know, we have provided what
` our -- the ordinary definitions for the ordinary meaning.
` Again, you know, Satya discloses test dies, and they
` allow for defect location, defect identification, defect type,
` and defect density. And Dr. Thompson took those definitions
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` -- that disclose -- disclosures in Satya explaining what the
` test die are in correspondence with the plain and ordinary
` meaning, and concluded that the test die in Satya actually are
` within the scope of the PCMs.
` On slide 22, the next requirement is that there --
` PCMs are located -- are in the given areas formed by the
` exposure fields. And here again, Dr. Thompson discussed
` stepping figure 4B across the wafer as is disclosed in Satya.
` And when it stepped across -- you know, the test die are
` located in their specific locations on the reticle, and it
` will be in each exposure field.
` Dr. Thompson also --
` JUDGE MARGOLIES: Counsel?
` MS. KADJO: -- and more of the background -- sure.
` JUDGE MARGOLIES: Sorry, Counsel. This is Judge
` Margolies. I actually have been thinking about your answer
` to Judge Quinn, and I actually want to go back to
` that. And I think you were referring to your slide 14.
` MS. KADJO: Yes.
` JUDGE MARGOLIES: And maybe we could go back to your
` slide 14. And I believe the question was, has Petitioner
` provided a definition of process control module? And you
` pointed to the statement in the petition and the statement in
` the reply.
` I have a question about that citation to the
` statement in the reply where you say that the ordinary
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` meaning --
` MS. KADJO: Sure.
` JUDGE MARGOLIES: -- encompasses something. So do
` you consider that giving a sufficient definition for purposes
` of this IPR?
` MS. KADJO: Yes, Your Honor. We believe so,
` especially considering the -- in the petition, we actually
` were stating -- and maybe this is, I guess, a question of word
` usage. But in the petition -- if we go to slide 31. In the
` petition, we state that process control modules are usually
` referred to as process control monitors, and they're well-
` known in 2001 as modules that were placed on a wafer to assist
` in the process of producing the integrated wafer -- circuits
` on the wafer.
` Then further down, we also stated that, you know,
` this encompasses alignment markers. Our understanding was
` that the Board did not object the initial definition of what
` process control module was. It really objected to what the --
` it encompassed.
` And when we were saying it encompasses, you know,
` alignment marks, you know, which we still argue that it does,
` then it's more so providing examples of the layout of what
` PCMs actually provide, especially in -- again, in the reply,
` we, more specifically, stated that it encompassed test
` structures using detected flaws at any point within the
` fabrication process because in response, basically, to Patent
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` Owner's assertion that the PCMs should be a narrower
` constrict.
` JUDGE QUINN: Well, let me ask you about that
` because in your proposed construction here, you say, "At any
` point in the wafer fabrication process." And I think there is
` a dispute as to when that point ends in the fabrication
` process. Do you have a position as to what that fabrication
` process -- when does that end such that you have -- you can
` have testing before that event, according to your definition?
` MS. KADJO: So if we actually turn to Dr. Thompson's
` reply declaration, he actually clarifies in paragraph 4 that
` -- let's see -- well, this is mostly -- this is discussing
` electrical characteristics too, but -- excuse me. Sorry.
` Correction. If we turn to his reply declaration at paragraph
` 2 near the bottom of the page, on page 1, it says, The
` ordinary meaning of PCM, both at the time --
` JUDGE MARGOLIES: Sorry.
` MS. KADJO: -- of the filing of the PCM --
` JUDGE MARGOLIES: Sorry. Can you just give us a
` minute to get to that place?
` MS. KADJO: Oh, sorry.
` JUDGE MARGOLIES: Say that again, please?
` MS. KADJO: Sure.
` JUDGE MARGOLIES: With the exhibit number, please?
` MS. KADJO: Oh. Exhibit 101111 -- I mean 1011.
` JUDGE MARGOLIES: Okay. Thank you.
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` MS. KADJO: And so on the bottom of page 1, he
` states, "The ordinary meaning of PCM, both at the time of the
` filing of the '523 Patent and today, would encompass any test
` structures on the wafer, whether the testing is done in-line
` or end-of-line." And as an example, wafer sort testing.
` And so really, with -- I guess, the terminology kind
` of gets a bit loose sometimes. We were referring, and we have
` consistently stated that it can be in-line and end-of-line.
` And therefore, tests with whole-wafer fabrication process
` includes both in-line and end-of-line.
` And this is also consistent with his previous
` declaration and the Quirk and Serda book, which has process
` control monitor and their test structures. And there's
` special structures located on the wafer. Whether this is
` consistent with even a patent that was cited in the '523
` Patent, the Nistler Patent.
` The specification, although NXP argues that is only
` is for one particular process, they actually -- the whole
` paragraph and the full disclosure actually relates test
` structures, and they're done both
` in-line and end-of-line, too.
` JUDGE QUINN: Does it matter, Counsel, that Nistler
` uses the word "monitor" when referring to process control or
` PCMs rather than Process Control Modules as recited in the
` claim?
` MS. KADJO: No, Your Honor. Dr. Thompson testified
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` that process control monitors and process control modules are
` synonymous. They both contain test structures and they both
` can be in-line and end-of-line.
` JUDGE QUINN: And where is that testimony, so we can
` look it up?
` MS. KADJO: Sure.
` So if you look in the deposition at page 40 -- the
` bottom of --
` JUDGE QUINN: And what --
` MS. KADJO: -- page 40, lines 22 --
` JUDGE QUINN: You need to give us the exhibit number
` -- okay -- when referring to --
` MS. KADJO: Oh, I'm sorry.
` JUDGE QUINN: -- something.
` MS. KADJO: Exhibit No. 2006.
` JUDGE QUINN: Okay. Which page and line numbers?
` MS. KADJO: Page 40, lines 22 through 41, lines A.
` And -- wait.
` JUDGE QUINN: I see this testimony is referring to
` in-line parametric testing.
` MS. KADJO: So my apologies. That's the wrong --
` actually, I meant to refer to Dr. Subramanian's testimony in
` Exhibit No. 1012.
` JUDGE QUINN: Do you have a pinpoint cite within
` that exhibit?
` MS. KADJO: Yes. Page 18 -- so page 18, lines 9
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` through 11.
` So in this discussion, he is remarking that in his
` practice, he did have process control monitors that were in
` the same -- that were, in some cases, within larger process
` control modules.
` JUDGE QUINN: So that says that one -- the monitor
` may be within the module, but they're not co-extensive. Is
` that what that says?
` MS. KADJA: Yes, Your Honor. However, Your Honor,
` we understand that the test devices are still in both a
` process control monitor and process control module. And Dr.
` Thompson did testify that -- which let me actually find that
` one. My apologies.
` In the Doctor's testimony he did state that,
` "Process control monitors are sometimes called process control
` modules. And are designed to be fabricated on the silicon
` wafer and processed at the same time as the ICs."
` JUDGE MARGOLIES: I'm sorry. What was the cite for
` that?
` MS. KADJO: So that would be Thompson's declaration,
` Exhibit 1007. And the -- and then it'd be paragraph 42.
` UNIDENTIFIED SPEAKER: Yeah.
` MS. KADJO: And 44. This -- if you look at slide 32
` I just moved to, the specific excerpt actually came from 44 --
` paragraph 44.
` UNIDENTIFIED SPEAKER: Well --
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` MS. KADJO: Excuse me. Was there a question?
` UNIDENTIFIED SPEAKER: No.
` MS. KADJO: So I believe we're back at Satya -- give
` me one second.
` Okay. So, again, with Satya, it discloses test die.
` And Dr. Thompson put that all together and testified it is
` within the scope of PCMs.
` The next requirement is that, "In which the given
` areas are formed by the exposure fields." Dr. Thompson
` discussed that, "Satya discloses reticle across the wafer."
` And, you know, that tests are in a given area. Again, I
` believe -- actually, I believe we already went over this.
` "Each control module takes the place of a least one
` chip." And this is slide 24. And here we have a graphical
` display of, you know, the process control modules or the test
` die are actually the same size as the chip for Satya. So
` therefore, it meets that limitation, also.
` 5.5, moving to Claim 2. Satya discloses a reticle,
` and it could have a large area that's devoted to the test
` structures or it could have a smaller area that's devoted to
` the test structures. Therefore, the -- whether it's one-
` fourth of the exposure fields or not is really a design
` choice.
` And (indiscernible) will understand that Satya
` discloses that at least 25 percent of the exposure fields
` contain a PCM and have equal distances.
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` Claim 3, similar analysis because the reticle from
` 4B can actually be stepped across the wafer. And therefore, a
` PCM in which -- would be located in each exposure field could
` be used out at the same rate across the wafer.
` And lastly, Claim 4, would also, you know, contain
` process control modules. There's locate -- same location. On
` Figure 4B, the same reticle stepped across, which would make
` the same -- PCMs located in the same location.
` So next, we'll turn to NXP's claim construction
` arguments and why they fail.
` JUDGE QUINN: So, Counsel, let me ask you a quick
` question about Claim 4 that you just --
` MS. KADJA: Sure.
` JUDGE QUINN: -- showed us there.
` MS. KADJA: Sure.
` JUDGE QUINN: Can you explain to us your position on
` the argument that Satya does not place -- or would not place
` the test structures in a manner in which the location of the
` semiconductor circuits would be visually identifiable by the
` naked eye, and that somehow -- either Claim 1 or Claim 4, not sure
` which one at this point, would require such a feature?
` MS. KADJA: Okay. So if you turn to slide 47,
` actually. And we understand their surreply that they brought
` the visual identification -- identifiable discussion.
` However, during depositions, Dr. Submarinian actually
` clarified that, Oh, you know, that's not really a requirement.
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`Patent 6,680,523 B2
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` It's just the benefit that they consider in the '523 Patent.
` And as a benefit is not actually in the claims themselves.
` And so therefore, the given areas argument fails,
` but it -- the requirement that it be visually identifiable
` fails because it's not actually required by the claim.
` Further, even when you understand the art, Your Honor, it
` doesn't make sense to require the given areas -- or within
` Claim 1 to be identifiable.
` Because one of ordinary skill will understand that,
` really, the machines are the ones that are doing all the
` inspection, really. Sometimes you do have humans do it, but
` it's mostly machines. And they have to see the device. But
` it's not required by the claims at all. And just generally,
` in the art, the -- still, when you look at the actual reticle,
` the reticle decides where that test die and where the chips
` are going to be placed in that specific exposure field.
` And it provides a given area for the exposure field.
` And so therefore, identifiable is irrelevant to the actual art
` into the claims.
` So going back to Patent Owner's construction of PCM.
` I'm on slide 30 now. Patent Owner wants to construe -- you
` have a structure configured to be tested during the wafer
` fabrication process using optical lithography equipment.
` And so basically -- you know, like I said -- stated
` earlier, these are very simple claims. However, Patent
` Owner's attempting to insert two additional limitations into
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`IPR2020-01630
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` the claim. The first is that it's used during the
` manufacturing process for in-line testing. And second, is
` that it only used optical lithography equipment. And so we'll
` discuss why the PCM should not -- that ordinary meaning should
` not be narrowed down to those limitations.
` JUDGE QUINN: And I -- can I ask you something about
` your parenthetical here. You say here in this slide, "Optical
` lithography equipment (e.g., no electrical testing)."
` MS. KADJO: Yes.
` JUDGE QUINN: Why is that a distinction? My
` understanding from reading Patent Owner's briefs is that it
` precludes the electrical beam testing. Not necessarily
` electrical testing. I'm not sure they're the same.
` MS. KADJO: So, Your Honor, I believe that was our
` understanding of the -- what they were trying to also conclude
` with optical lithography equipment. However, we understand
` today is the e-beam (indiscernible). And we will show still
` that optical lithography testing is not -- I mean, we'll show
` that the -- we'll also discuss that the optical lithography is
` actually the way the wafers are formed and not really tested.
` And so their argument is actually pretty confusing
` and really doesn't make any sense in terms of the art.
` JUDGE QUINN: Well, I agree with you. The arguments
` are confusing in that respect, but I wanted to know if you
` were equating them because you're trying to make that
` distinction or you're trying to respond to a distinction
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` Patent Owner made?
` MS. KADJO: So we're trying to respond to a
` distinction that Patent Owner appeared to make.
` JUDGE QUINN: Okay.
` MS. KADJO: Actually, I think with this it actually
` should have been for the first one used during the wafer
` process to be MI testing due to -- well, NXP's argument is
` that there was no electrical testing for that one.
` JUDGE QUINN: But you -- let me clarify because I
` want to get this straight before you go on. The argument --
` MS. KADJO: Sure.
` JUDGE QUINN: -- was that Yamaguchi, because it
` performs electrical testing, does not meet the claims --
` MS. KADJO: Correct.
` JUDGE QUINN: -- because you can only use the
` testing of the claims during manufacturing processes. And
` that somehow includes electrical testing, right?
` MS. KADJO: Correct.
` JUDGE QUINN: Okay. We're on the same page now.
` MS. KADJO: So can you repeat that? I'm sorry. I
` kind of zoned -- it went out a little bit. So I think I
` missed one or two words. I just want to --
` JUDGE QUINN: Okay.
` MS. KADJO: -- make sure.
` JUDGE QUINN: My understanding of the brief of
` patent owner is that Yamaguchi discloses electrical testing.
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` And that because the claims are limited to testing during
` wafer manufacturing, it somehow excludes electrical testing,
` which according to --
` MS. KADJO: Correct.
` JUDGE QUINN: -- Patent Owner is performed at some
` point after the process is completed. That's my
` understanding.
` MS. KADJO: Correct. Yes, Your Honor.
` JUDGE QUINN: Okay.
` MS. KADJO: That was understanding of Patent Owner's
` briefing, also. And then --
` JUDGE QUINN: Okay.
` MS. KADJO: -- the second one was that Satya
` (indiscernible) -- optical lithography equipment to test.
` JUDGE QUINN: Right. Right. We understand that
` one. I was just wanting to know if there was something
` else --
` MS. KADJO: So --
` JUDGE QUINN: -- concerning electrical testing that
` is also part of the optical lithography argument? Because I'm
` interested in hearing that since I didn't read that in the
` brief.
` MS. KADJO: I'm sorry. Can you repeat the question?
` JUDGE QUINN: I was interested in knowing if there
` were additional arguments about electrical testing that
` corresponded to Patent Owner's position on optical
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` lithography?
` MS. KADJO: Okay. I'm sorry. Which one would you
` like to address first since there are two?
` JUDGE QUINN: Whichever one you're ready to.
` MS. KADJO: Okay.
` JUDGE QUINN: I think -- I think we understand that
` electrical testing was meant for the first part of Patent
` Owner's instruction.
` MS. KADJO: Yes.
` JUDGE QUINN: Not really the second part.
` MS. KADJO: All right. Okay. Thank you.
` Okay. So turning to the first part. And this
` argument was made -- well, actually, first of all, why should
` their narrow meaning not be used?
` So first of all -- now, there's a presumption that
` the ordinary meaning of a PCM should apply absent a disclaimer
` or clear lexicography by the applicant."
` So, you know, in the situation, the Patentee did not
` act as their own lexicographer. They did not state PCMS mean,
` and then provide definition. Nor did they demonstrate that
` they intended to deviate from the ordinary meaning.
` Patent Owner merely cites -- I think generally it
` cites to variants provided in the '523 Patent that discuss
` drop-in areas to (indiscernible) other things regarding
` reticles, you know, the technology to say that, Oh, well, it
` should only be limited to in-line testing, which doesn't
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` include electrical testing, according to them, and optical
` lithography.
` Further, for the optical lithography argument, you
` know, you can only apply a process, which that's what the
` optical lithography process is. It's a process within the
` wafer -- within -- with -- for manufacturing. And the
` Patentee has not made clear that the process steps are
` essential.
` So just off the bat, you know, that's the ordinary
` meaning -- they cannot limit the ordinary meaning in such a
` way.
` JUDGE QUINN: Well, let me ask you something. And
` Patent Owner, I'll guess, we'll hear from them in a minute.
` But more specifically, it seems that both parties are arguing
` what is the --
` MS. KADJO: Sorry.
` JUDGE QUINN: -- ordinary --
` MS. KADJO: I think you're buffering.
` JUDGE QUINN: Can you hear me okay?
` MS. KADJO: Hello? I can hear you now.
` JUDGE QUINN: Okay. It seems to me that both
` parties are arguing about what is the correct plain and
` ordinary meaning, as what would be understood by a person of
`ordinary skill in the art.
` And I see your arguments here as trying to
` characterize Patent Owner's argument as trying to limit the --
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`IPR2020-01
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