`571-272-7822
`
`Paper 24
`Entered: July 20, 2022
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`ASTRONICS TEST SYSTEMS, INC.,
`Petitioner,
`v.
`TERADYNE, INC.,
`Patent Owner.
`
`IPR2021-00350
`Patent 7,395,479 B2
`
`
`
`
`
`
`
`
`
`Before DEBRA K. STEPHENS, TREVOR M. JEFFERSON, and
`NATHAN A. ENGELS, Administrative Patent Judges.
`STEPHENS, Administrative Patent Judge.
`
`
`
`JUDGMENT
`Final Written Decision
`Determining All Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`INTRODUCTION
`I.
`In this inter partes review, Astronics Test Systems, Inc. (“Petitioner”)
`challenges the patentability of claims 1–8 of U.S. Patent No. 7,395,479 B2
`(“the ’479 patent,” Ex. 1003), assigned to Teradyne Inc. (“Patent Owner”).
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`We have jurisdiction under 35 U.S.C. § 6. This Final Written
`Decision, issued pursuant to 35 U.S.C. § 318(a), addresses issues and
`arguments raised during the trial in this inter partes review. For the reasons
`discussed below, we determine that Petitioner has proven by a
`preponderance of the evidence that claims 1–8 of the ’479 patent are
`unpatentable (see 35 U.S.C. § 316(e) (2018) (“In an inter partes review
`instituted under this chapter, the petitioner shall have the burden of proving a
`proposition of unpatentability by a preponderance of the evidence.”)).
`
`
`A. Background and Summary
`Astronics Test Systems, Inc. (“Petitioner”) filed a petition for inter
`partes review (Paper 1 (“Pet.” or “Petition”)) challenging claims 1–13 of
`U.S. Patent 7,395,479 B2 (Ex. 1003 (“’479 Patent”)). Teradyne, Inc.
`(“Patent Owner”) timely filed a Preliminary Response (Paper 6 (“Prelim.
`Resp.”)). Along with its Preliminary Response, Patent Owner filed a
`Disclaimer which disclaimed claims 9–13 of the ’479 Patent (Ex. 2002;
`Prelim. Resp. 10; PO Resp. 7, n.1). As such, claims 1–8 were the remaining
`challenged claims before us and we did not address Petitioner’s challenge to
`claims 9–13. We instituted on all grounds directed to claims 1–8, on
`unpatentability (Paper 8 (“Inst. Dec.”), 39–40).
`During the trial, Patent Owner filed a Response (Paper 10 (“PO
`Resp.”), Petitioner filed a Reply (Paper 13 (“Pet. Reply”), and Patent Owner
`filed a Sur-reply (Paper 15 (“PO Sur-reply”).
`An oral hearing was held April 21, 2022, a transcript of which appears
`in the record (Paper 23 (“Tr.”)).
`
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`Petitioner challenges claims 1–8 as unpatentable under 35 U.S.C.
`§ 103 (Pet. 4). Patent Owner disputes Petitioner’s challenges as presented in
`the Petition ((see PO Resp.).
`
`
`B. Real Parties in Interest
`Patent Owner states that Teradyne, Inc. is the real-party-in-interest
`(Paper 3, 1).
`Petitioner states that Astronics Test Systems, Inc. and Astronics
`Corporation are the real-parties-in-interest (Paper 1, 2). 1
`
`
`C. Related Matters
`As required by 37 C.F.R. § 42.8(b)(2), the parties identify a related
`matter. More specifically, Petitioner and Patent Owner indicate the ’479
`Patent was asserted in the following district court proceeding: Teradyne, Inc.
`v. Astronics Test Systems, Inc., No. 2:20-cv-2713 (C.D. Cal.) (Pet. 2; Paper
`3, 1).
`
`
`
`1 Petitioner notes the District Court in related proceeding Teradyne, Inc. v.
`Astronics Test Systems, Inc., No. 2:20-cv-2713 (C.D. Cal.) (Pet. 2; Paper 3,
`1), dismissed Astronics Corp. for lack of personal jurisdiction (Ex. 1019);
`however, Petitioner listed Astronics Corp. “out of [an] abundance of
`caution” (Pet. 2, n.2). Given that no dispute exists between the Parties as to
`the stated real parties in interest, the Board accepts the Parties’
`representations and, accordingly, does not determine whether the proper
`entities have been named as real parties of interest in this proceeding.
`
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`D. The ’479 Patent
`The ’479 Patent, titled “Over-Voltage Test for Automatic Test
`Equipment,” issued July 1, 2008 (Ex. 1003, codes (45), (54)). The ’479
`Patent describes a test system in which a digital test instrument, e.g.,
`“Automatic Test Equipment (ATE),” is “used to verify the performance of
`electronic devices,” “(sometimes referred to as a Unit Under Test [(UUT)])”
`(Ex. 1003, 1:16–28). ATEs are “programmed to provide stimulus to a
`particular circuit or component in the UUT and then measure the output to
`determine if the UUT has performed to its specifications” (id. at 1:30–33).
`The ATE described by the ’479 Patent “is constructed to allow verification
`of proper operation of a UUT within its intended operating environment”
`(id. at 3:22–24) and, in addition, is “designed to [also] detect over-voltage
`situations” (id. at 5:29–30). Figure 2A shows digital channel 211, a
`component of the ’479 Patent’s ATE, and is reproduced below (id. at 2:62–
`64 (“FIG. 2A is a circuit diagram of a portion of a digital test instrument
`according to one embodiment of the invention connected to a UUT”, 5:47–
`48).
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`As shown in Figure 2A, digital channel 211 connects to interface 187
`(of a UUT) via line 215 (id. at 4:16–18; see id. at 5:47–49, Fig. 1). Digital
`channel 211 senses and analyzes the value of a signal on line 215 to
`“determine whether there are faults within [the] system under test”
`(id. at 6:55–63). Specifically, “comparators 207 and 209 [are] coupled to the
`same signal connection point . . . so that they may receive as an input the
`signal on line 215” and “indicate whether the level of the signal on line 215
`is above or below certain threshold levels that characterize normal operating
`conditions” (id. at 6:23–26, 6:64–66). Those threshold levels are “user
`programmable” (id. at 1:46–51). Then, “[d]igital control circuit 201
`compares the outputs of comparators 207 and 209 to [a] programmed
`expected value. Based on the comparison, digital control circuit 201 places
`a value on pass/fail output 219,” which indicates “whether there are faults
`within the system under test” (id. at 6:45–54, 6:59–63).
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`In addition, as shown in Figure 2A, digital channel 211 includes
`comparators 203 and 205 to further “detect over-voltage conditions” on
`line 215 (id. at 7:7–8). In particular, “[w]hen the value on line 215 falls
`below [a] voltage specified by low over-voltage control input 235,
`comparator 205 asserts its output. Similarly, when the voltage on line 215
`exceeds [a] value specified by high over voltage controlled input 237,
`comparator 203 asserts its output” (id. at 7:13–18). Like comparators 207
`and 209, the thresholds comparators 203 and 205 analyze — over-voltage
`thresholds — may be user programmed (id. at 2:20–23, 3:43–51). Then,
`“outputs of comparators 203 and 205 are provided to digital control circuit
`201” which “sets the value on safe/alarm output 217 based on the values
`output by comparators 203 and 205,” indicating whether or not “an over-
`voltage condition has occurred” (id. at 7:32–42).
`The ’479 Patent states that an “over-voltage condition . . . may be
`used to protect the test equipment” (id. at 1:44–48), but that “[i]t is not,
`however, necessary that a voltage be so large as to cause physical damage in
`order to be considered over-voltage. Any voltage that is out of bounds or
`otherwise outside of the specified operating range may be considered ‘over
`voltage’” (id. at 5:15–19). Further, the ’479 Patent states that “over-voltage
`conditions may also be evaluated by the user program to determine whether
`the UUT is working properly” (id. at 3:49–51).
`
`
`E. Illustrative Claims
`Challenged claim 1 is the sole independent claimed.
`1. Automatic test equipment adapted to execute a user
`program, the test equipment comprising
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`a channel circuit having a signal connection point adapted to be
`coupled to a signal line of a unit under test to receive an input
`signal having a value, the channel circuit comprising:
`a) at least two comparison sub-circuits, each
`comparison sub-circuit having a signal input coupled to
`the signal connection point, a threshold input adapted to
`receive a threshold input signal having a value and a
`comparison output, and wherein each of the comparison
`sub-circuits is adapted to produce a comparison output
`signal at the comparison output having a value indicating
`the value of the input signal relative to the value of the
`threshold input signal; and
`b) control circuitry having at least two measured
`value inputs, each measured value input coupled to the
`comparison output of one of the at least two comparison
`sub-circuits, a test output and an over-voltage output, the
`control circuitry adapted to generate a test output from a
`first subset of the comparison output signals produced by
`the at least two comparison sub-circuits and to generate
`the over-voltage output from a second subset of the
`comparison output signals produced by the at least two
`comparison sub-circuits; and
`c) wherein the automatic test equipment is adapted
`to independently set the value of the threshold input signal
`for each of the at least two comparison sub-circuits based
`on the user program
`(Ex. 1003, 13:57–14:17).
`
`F. Evidence
`Petitioner relies upon the following prior art references:
`
`Reference
`Miyamoto, US 6,292,342 B1, issued Sept. 18, 2001
`(“Miyamoto”)
`Frame et al., US 6,856,158 B2, issued Feb. 15, 2005
`(“Frame”)
`
`Exhibit
`
`1006
`
`1007
`
`7
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`Schinabeck et al., US 4,635,259, issued Jan. 6, 1987
`(“Schinabeck”)
`
`1008
`
`(Pet. 4–5).
`Petitioner also relies on the Declaration of Stephen B. Wicker, Ph.D.
`for support of its contentions in the Petition (Ex. 1001) and Reply
`Declaration of Dr. Wicker (Ex. 1027).
`Patent Owner relies on the Declaration of Mark H. Horenstein, PhD.
`for support of its contentions in the Patent Owner Response (Ex. 20052).
`
`
`G. Prior Art and Asserted Grounds
`Petitioner initially challenged claims 1–13 of the ’479 Patent (Pet. 4).
`Patent Owner disclaimed claims 9–13 in a disclaimer filed with and recorded
`by the Office (Prelim. Resp. 10 (citing Ex. 2002); Ex. 2002; PO Resp. 7,
`n.1). Accordingly, challenged claims 9–13 are deemed to no longer exist in
`the ’479 Patent (see General Electric Co. v. United Techs. Corp., Case
`IPR2017–00491, Paper 9 (July 6, 2017) (Paper 9) (Precedential); Prelim.
`Resp. 10 (citing Dolby Labs., Inc., v. Intertrust Techs. Corp., IPR2020–
`01123, Paper 10 (Jan. 6, 2021); 35 U.S.C. § 253; see also Vectra Fitness,
`Inc. v. TNWK Corp., 162 F.3d 1379, 1383 (Fed. Cir. 1998)). Therefore,
`claims 1–8 remain. Petitioner asserts these claims, claims 1–8, would have
`been unpatentable on the following grounds:
`
`
`2 We note Patent Owner has submitted two Declarations of Dr. Mark
`Horenstein –– Exhibit 2001 and Exhibit 2005 (see PO Resp. vii). Patent
`Owner does not indicate to which Exhibit they are referring when citing
`“Horenstein” in Patent Owner’s Response (see e.g., PO Resp. 4). Based on
`clarification from Patent Owner (Tr. 64, 3:10), we determine Patent Owner’s
`arguments citing “Horenstein” refer to Exhibit 2005.
`
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`Patent 7,395,479 B2
`Claim(s) Challenged
`1–8
`1–7
`8
`
`
`(Pet. 5).
`
`35 U.S.C. §
`103
`103
`103
`
`Reference(s)/Basis
`Schinabeck
`Miyamoto, Frame
`Miyamoto, Frame, Schinabeck
`
`II. ANALYSIS
`A. Principles of Law
`A patent claim is unpatentable under 35 U.S.C. § 103 if the
`differences between the claimed subject matter and the prior art are such that
`the subject matter, as a whole, would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said
`subject matter pertains (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
`(2007)). The question of obviousness is resolved on the basis of underlying
`factual determinations including (1) the scope and content of the prior art;
`(2) any differences between the claimed subject matter and the prior art;
`(3) the level of ordinary skill in the art; and (4) any secondary
`considerations, if in evidence (Graham v. John Deere Co. of Kan. City, 383
`U.S. 1, 17–18 (1966)).
`
`
`B. Level of Ordinary Skill in the Art
`The level of skill in the art is a factual determination that provides a
`primary guarantee of objectivity in an obviousness analysis (Al-Site Corp. v.
`VSI Int’l Inc., 174 F.3d 1308, 1324 (Fed. Cir. 1999) (citing Graham v. John
`Deere Co., 383 U.S. 1, 17–18 (1966); Ryko Mfg. Co. v. Nu-Star, Inc., 950
`F.2d 714, 718 (Fed. Cir. 1991))).
`Petitioner asserts “a person having ordinary skill in the art (‘POSA’)
`at the time of the alleged invention would have had at least a bachelor’s
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`degree in electrical engineering, computer engineering, or a related field, and
`at least one year of experience with the testing of electronic equipment”
`(Pet. 20).
`The prior art itself may demonstrate the level of ordinary skill in the
`art at the time of the invention (see Okajima v. Bourdeau, 261 F.3d 1350,
`1355 (Fed. Cir. 2001) (explaining that specific findings regarding ordinary
`skill level are not required “where the prior art itself reflects an appropriate
`level and a need for testimony is not shown”) (quoting Litton Indus. Prods.,
`Inc. v. Solid State Sys. Corp., 755 F.2d 158, 163 (Fed. Cir. 1985))).
`In our Institution Decision, we adopted Petitioner’s definition of the
`level of ordinary skill in the art with minor modification (Dec. 8–9; see Pet.
`20). In particular, we removed the qualifier “at least” from the education
`level and from the experience level, because the qualifier introduces
`ambiguity.
`Patent Owner does not dispute this determination of the level of a
`person of ordinary skill in the art at the time of the invention (PO Resp. 8).
`Thus, we determine an ordinarily skilled artisan at the time of the invention
`would have had (i) a bachelor’s degree in electrical engineering, computer
`engineering, or a related field and (ii) one year of experience with testing of
`electronic equipment. We determine this asserted level of skill comports
`with the qualifications a person would have needed to understand and
`implement the teachings of the ’479 Patent and the prior art of record (cf.
`Okajima, 261 F.3d at 1355 (the prior art itself may reflect an appropriate
`level of skill in the art)).
`
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`C. Claim Construction
`In interpreting the claims of the ’063 patent, we “us[e] the same
`claim construction standard that would be used to construe the claim[s] in a
`civil action under 35 U.S.C. [§] 282(b)” (37 C.F.R. § 42.100(b) (2018)).
`The claim construction standard includes construing claims in accordance
`with the ordinary and customary meaning of such claims as would have
`been understood by one of ordinary skill in the art and the prosecution
`history pertaining to the patent (see id.; Phillips v. AWH Corp., 415 F.3d
`1303, 1312–14 (Fed. Cir. 2005) (en banc)).
`“Importantly, the person of ordinary skill in the art is deemed to read
`the claim term not only in the context of the particular claim in which the
`disputed term appears, but in the context of the entire patent, including the
`specification” (Phillips, 415 F.3d at 1312). An inventor may rebut that
`presumption by providing a definition of the term in the specification with
`reasonable clarity, deliberateness, and precision (In re Paulsen, 30 F.3d
`1475, 1480 (Fed. Cir. 1994)). In the absence of such a definition, limitations
`are not to be read from the specification into the claims (In re Van Geuns,
`988 F.2d 1181, 1184 (Fed. Cir. 1993)). Only those terms that are in
`controversy need be construed, and only to the extent necessary to resolve
`the controversy (Nidec Motor Corp., 868 F.3d at 1017 (citing Vivid Techs.,
`Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).
`Petitioner states, “no terms require construction to resolve the grounds
`presented herein” (Pet. 5). Patent Owner addresses the “preamble” and the
`limitation “wherein the automatic test equipment is adapted to independently
`set the value of the threshold input signal for each of the at least two
`comparison sub-circuits based on the user program” (PO Resp. 8–13).
`
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`1. Preamble
`Patent Owner contends that “[a]utomatic test equipment adapted to
`execute a user program, the test equipment comprising” is the preamble and
`that it is limiting (Ex. 1003, 13:57–58; PO Resp. 9). In particular, Patent
`Owner contends, “the preamble of claim 1 [is] limiting because it serves as
`antecedent basis for multiple terms in the body of the claim, and it supplies
`‘essential structure’ of the claimed invention” (PO Resp. 9).
`Petitioner does not address this contention (see Pet. Reply 4–5).
`We agree with Patent Owner that the preamble is limiting because the
`body of the claim refers to the user program as well as the automatic test
`equipment (Ex. 1003, 13:57–58, 14:14–17; see Catalina Mktg. Int'l, Inc. v.
`Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002) ([D]ependence on
`a particular disputed preamble phrase for antecedent basis may limit claim
`scope because it indicates a reliance on both the preamble and claim body to
`define the claimed invention”)). Patent Owner asserts the following
`limitation, “a channel circuit having a signal connection point adapted to be
`coupled to a signal line of a unit under test to receive an input signal having
`a value” (Ex. 1003, 13:58–61), “although formatted within the same
`paragraph as the preamble[,] is not actually part of the preamble, but rather
`part of the body of the claim” (PO Resp. 10). However, further in its
`argument, Patent Owner flips its statement in arguing “input signal having a
`value” and contends this is a “requirement[] of the preamble” (id. at 11).
`Petitioner’s contentions are only directed to the limitation (Pet. Reply 4–5).
`We determine the preamble is “[a]utomatic test equipment adapted to
`execute a user program, the test equipment comprising” and does not include
`the limitation that follows the “comprising” recitation: “a channel circuit
`having a signal connection point adapted to be coupled to a signal line of a
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`unit under test to receive an input signal having a value” (Ex. 1003, 13:58–
`61). We consider that limitation to be part of the body of the claim.
`
`2. “a channel circuit having a signal connection point adapted to be
`coupled to a signal line of a unit under test to receive an input signal
`having a value”
`Petitioner argues that although the claim recites an input signal, the
`claim does not recite that the “input signal having a value” is received from
`any particular component (Pet. Reply 4, 9). In particular, Petitioner argues,
`“the claim does not require the single input signal from the UUT [(Unit
`Under Test)]”; rather, “the words ‘a’ and ‘an’ . . . [mean] ‘one or more’” (id.
`at 9–10 (citing KCJ Corp. v. Kinetic Concepts, Inc., 223 F.3d 1351, 1356
`(Fed. Cir. 2000); Baldwin Graphic Sys., Inc. v. Siebert, Inc., 512 F.3d 1338,
`1342 (Fed. Cir. 2008)). Petitioner further contends, “[t]he specification
`contemplates providing the ATE over-voltage protection (OVP) as
`protection is ‘set based on the voltage levels that may cause damage to either
`the system under test 189 or test system 139” (id. at 5 (citing Ex. 1003,
`7:19–21, 3:47–48, 12:58–65)). Thus, according to Petitioner, Patent
`Owner’s construction excludes embodiments disclosed in the ’479 Patent
`(id.). More specifically, Petitioner argues the ’479 Patent “discloses testing
`in cycles, where comparators would receive and measure different values,
`not necessarily from the same signal or signal connection point” which
`Patent Owner does not address, instead “relying solely on one embodiment”
`(id. at 10 (citing Ex. 1003, 3:36–42, 6:23–26)).
`Patent Owner contends “‘an input signal’ serves as antecedent basis
`for ‘the input signal’” and the “‘input signal having a value’ is received from
`a signal connection point coupled to a signal line of the UUT” (PO Resp.
`
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`10–11; PO Sur-reply 4). Patent Owner further responds Petitioner’s
`construction “ignores the claim as a whole, the specification, and the
`purpose of an automatic test equipment” (PO Sur-reply 2). More
`specifically, Patent Owner contends, “[a]n ATE tests a UUT by receiving an
`input signal from the UUT” (PO Sur-reply 2). Pointing to the ’479 Patent,
`Patent Owner argues, it discloses an “ATE . . . provide[s] stimulus to . . . the
`UUT and then measure[s] the output to determine if the UUT has performed
`to its specifications” (id. at 2–3 (citing Ex. 1003, 1:30–33)). According to
`Patent Owner, a channel circuit “interfaces to a signal connection point of
`the test instrument so that it can drive and receive test signals at a test point
`in system under test 189” (id. at 3 (quoting Ex. 1003, 3:65–4:3)).
`Relying on Figure 1, Patent Owner argues, “the system under test
`(containing the UUT) from which the response signal is received is separate
`from ATE 139 and its channel circuits 211” (id. at 3 (quoting Ex. 1003,
`Fig. 1)). Patent Owner further argues the cited statements relied upon by
`Petitioner “explain which portions of the system can be protected, not where
`the received input signal comes from” (id. at 4 (citing Ex. 1003, 7:19–21,
`3:47–48, 12:58–65)).
`Initially, we note the claim recites “a channel circuit having a signal
`connection point adapted to be coupled to a signal line of a unit under test to
`receive an input signal having a value” (Ex. 1003, 13:58–61), Thus, due to
`the recitation, we determine the input signal could be either that the signal
`connection point receives an input signal or the channel circuit receives an
`input signal (id.).
`The next limitation recites the comparison sub-circuit has “a signal
`input . . . wherein each of the comparison sub-circuits is adapted to produce
`a comparison output signal at the comparison output having a value
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`indicating the value of the input signal relative to the value of the threshold
`input signal” (id. at 13:62–14:3). The claim does not recite that the “signal
`input” receives “the input signal.” Nevertheless, in light of the claim
`language and the Specification and because Petitioner has contended both
`interpretations are shown, we interpret the recited “input signal” as the
`signal received from the UUT. The portion of the ’479 Patent describing, in
`part, Figure 1, cited by Patent Owner discloses
`ATE 139 includes multiple instruments that may generate and
`measure signals. A host computer 120 executes a software
`program that controls operation of each of the instruments.
`Host computer 120 may be programmed to analyze these outputs
`to determine whether the system under test 189 is operating
`properly. Such programming is traditionally a part of a user
`program and drives programmed values and compares measured
`values to expected values on one or more signal lines connected
`to the UUT. These steps may be programmed for multiple lines
`for multiple test cycles
`(Ex. 1003, 3:32–51; PO Sur-reply 3). The ’479 Patent further describes an
`“ATE . . . provide[s] stimulus to . . . the UUT and then measure[s] the output
`to determine if the UUT has performed to its specifications” (Ex. 1003,
`1:30–33; PO Sur-reply 3). Thus, these descriptions support both
`interpretations. Nevertheless, the ’479 Patent describes a signal being
`supplied and compared to expected values. Accordingly, we interpret “an
`input signal” as being the signal received from a unit under test (UUT).
`
`
`3. Remaining Terms
`Although Patent Owner argues the interpretation of the terms “based
`on a user program” and “independently set” (PO Resp. 5–6), for purposes of
`this Decision, we need not construe expressly any other claim terms (see
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`Nidec, 868 F.3d at 1017).
`
`D. Ground 1: Asserted Obviousness over Schinabeck – Claims 1–8
`Petitioner contends Schinabeck renders claims 1–8 obvious (Pet. 22–
`
`43).
`
`1. Schinabeck (Ex. 1008)
`Schinabeck is a patent titled “Method and Apparatus for Monitoring
`Response Signals During Automated Testing of Electronic Circuits,” issued
`January 6, 1987 (Ex. 1008, codes (45), (54)). Schinabeck describes a testing
`system “for automatically applying a test signal to and monitoring a
`response signal at a node of a device under test” (DUT) (id. at 3:30–33).
`Figure 1 of Schinabeck, reproduced below, is a block diagram showing a
`“test signal applying and response signal monitoring circuit” which
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`interfaces with and tests a “multi-terminal DUT” (id. at 5:67–68, 6:47–52,
`Fig. 1).
`
`
`As shown in Figure 1, a block diagram of a testing circuit, test head
`controller 12 communicates with test signal applying and response signal
`monitoring circuit 10a control a programmed “pattern of test signals applied
`to the device under test (DUT) by the test signal applying and response
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`signal monitoring circuit 10a” (id. at 5:67–68, 6:25–28, 6:40–46, Fig. 1
`(emphases omitted)). Schinabeck describes that the “test signal applying
`and response signal monitoring circuit 10a includes a plurality of pin
`electronics interface circuits 14a, 14b, 14c, . . . 14n connected to n pins of
`the DUT” and that, “[p]referably, one [of] pin electronics interface circuit 14
`is connected to each terminal of the multi-terminal DUT” (id. at 6:47–52
`(emphases omitted)). As an example, Schinabeck further describes “a DUT
`having sixteen terminals or pins is tested in a fixture containing sixteen
`identical pin electronics interface circuits 14” (id. at 6:58–62 (emphasis
`omitted)). The “single test head controller 12 contain[s] a stored program
`specifically written to test the particular DUT” (id. at 6:60–62 (emphasis
`omitted)). For example, to “test a signal input terminal of the DUT, the test
`head controller 12 closes a relay contact Kla . . . in the pin electronics
`interface circuit 14a to connect the test stimuli section of the test signal
`applying and response signal monitoring circuit 10a to pin 1 of the DUT”
`(id. at 6:63–7:1 (emphases omitted)).
`The test signals applied to the DUT may be provided by driver
`circuits, e.g., driver circuit 18a, and by precision measurement units
`(PMUs), e.g., PMU 22a (id. at 7:6–19 (emphases omitted)). For example,
`PMU 22a “supplies desired voltages or currents to the appropriate pin of the
`DUT” (id. at 7:17–19 (emphasis omitted)). In this example, the test “closes
`only relay contact K4a . . . to enable coupling of pin 1 of the DUT to the
`PMU 22a via a line 24a. Similar PMUs 22b, 22c, . . . 22n can apply
`controlled test signals to corresponding other pins of the DUT, or one or
`more PMUs can be multiplexed to the pins” (id. at 7:20–26 (emphases
`omitted)). Ultimately, the “the output signals from the comparison means
`26a can change in accordance with the test signal applied to the DUT” and
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`the “output signal from the comparison means 26a is returned to the test
`head controller 12 via a line 32a,” causing “the test head controller 12 to
`register either acceptance or rejection of the DUT, or to specify its quality”
`(id. at 7:37–50 (emphases omitted)).
`
`
`2. Analysis of Independent Claim 1
`Petitioner contends Schinabeck renders independent claim 1 obvious
`(Pet. 22–35).
`
`a) “input signal having a value”
`Petitioner relies on Schinabeck to teach
`a channel circuit having a signal connection point adapted to be
`coupled to a signal line of a unit under test to receive an input
`signal having a value, the channel circuit comprising:
`(Pet. 22–25 (citing Ex. 1008, 1:8–9, 1:50–55, 2:3–22, 2:58–62, 3:30–33,
`3:53–63, 6:47–52, 7:59–60, Fig. 1, 11:43–68, 12:46–14:9; Ex. 1001 ¶¶ 88–
`91); Ex. 1003, 13:57–61). More specifically, Petitioner contends
`Schinabeck “is directed to a method and apparatus for automatically testing
`. . . electronic circuits by monitoring response signals during test of the
`electronic circuits in an automated electronic test system” (id. at 23 (quoting
`Ex. 1008, 1:8–9 (emphases added by Petitioner)). Petitioner further
`contends Schinabeck teaches “‘a stored program in the test system’ allowing
`‘the ultimate user’ to select ‘whatever standard or specifications’ the user
`desires” providing a disclosed example that “the test rate is programmable”
`(id. (citing Ex. 1008, 2:3–22, 7:59–60; Ex. 1001 ¶ 88)). Petitioner asserts,
`Schinabeck discloses the recited “channel circuit” because “its ATE has ‘a
`plurality of pin electronics interface circuits . . . connected to n pins of the
`DUT” (Pet. 23 (citing Ex. 1008, 6:47–50, Fig. 1; Ex. 1001 ¶¶ 89–90)).
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`Petitioner additionally asserts an ordinarily skilled artisan “would have
`understood that switch K3a can be opened or closed depending upon the
`desired test set-up” (id. (citing Ex. 1008, 6:47–52; Ex. 1001 ¶¶ 89–90)).
`Petitioner further contends, “[e]ach channel ‘includes a node to be coupled
`to a pin of the [DUT] . . . and a comparison circuit connected to the node’
`for receiving a ‘response signal’ (from the DUT) and comparing the
`response signal to a ‘programmed reference level’” (id. at 24–25 (citing
`Ex. 1008, code (57), 3:53–63, 6:47–50, Fig. 1, 11:43–68, 12:46–14:9)).
`Patent Owner responds that “[t]he output of Schinabeck’s ‘driver
`circuit 18’ is . . . generated by the ATE itself and therefore cannot be the
`claimed ‘input signal’ received from the UUT” (PO Resp. 17–18 (citing
`Ex. 2005 ¶ 48)). Patent Owner argues, “the claim requires that the received
`‘input signal having a value’ is a signal received from the UUT via the
`connection point” (id. (citing Ex. 2005 ¶ 49)). Patent Owner further
`contends Schinabeck’s driver circuit upon which Petitioner relies, “is within
`Schinabeck’s pin electronics interface circuit 14a, and therefore the driver’s
`generated output signal is not an input signal received from a UUT via a
`connection point to the UUT” (id. at 19 (citing Ex. 2005 ¶ 50)).
`Petitioner responds, “Schinabeck’s input signal may come from a
`‘signal line of a UUT,’ either through driver circuit 18a or through DUT
`PIN1OFn (a signal connection point) via switch K2a” as confirmed by both
`Patent Owner’s and Petitioner’s experts (Pet. Reply 7 (citing Pet. 24–25;
`Ex. 1026, 62:13–24, 67:1–22)).
`As set forth supra, we interpret “input signal” as the signal supplied
`by the UUT. Schinabeck discloses the channel circuit receives a “response
`signal” (Ex. 1008, 11:49–53, 12:56–13:7; Pet. 24–25). In particular,
`Schinabeck teaches each of the comparison means indicates a value of the
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`response signal with respect to a programmed level (Ex. 1008, 11:49–53,
`12:56–13:7; Pet. 24–25). Thus, we determine an ordinarily skilled artisan
`would understand that for Schinabeck’s comparison means to perform the
`comparison, the comparison means must receive the response signal which
`comes from the DUT (UUT), i.e., the input signal (see Ex. 1008, 11:49–53,
`12:56–13:7; Pet. 24–25; Pet. Reply 7). Accordingly, we determine
`Petitioner has shown Schinabeck teaches the recited “channel circuit having
`a signal connection point adapted to be coupled to a signal line of a unit
`under test to receive an input signal having a value,” as recited in claim 1
`(Ex. 1003, 13:58–61).
`
`
`b) “at least two comparison sub-circuits, each comparison sub-circuit
`having a signal input . . .and a comparison output” – (limitation 1a)
`Petitioner relies on Schinabeck to teach “at least two comparison sub-
`circuits, each comparison sub-circuit having a signal input coupled to the
`signal connection point” (Pet. 25–27 (citing Ex. 1008, 3:56–63, 4:43–66,
`7:37–39, 8:6–18, 47–52, 11:43–68, 12:46–14:9, Figs. 1–2; Ex. 1001 ¶¶ 92–
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`95)). Petitioner provides an annotated version of Schinabeck’s Figure 1,
`reproduced below:
`
`
`(Ex. 1008, Fig. 1; Pet. 26). In particular, Petitioner asserts that the inputs of
`comparator circuits 26a and 26b of Figure 1, are both connected to “the node
`connected to DUT PIN 1 OF n” (shown in green above) (id.