IEEE Std 1394-1995
`
`IEEE Standard for a High Performance
`Serial Bus
`
`Sponsor
`Microprocessor and Microcomputer Standards Committee
`of the
`IEEE Computer Society
`
`Approved 12 December 1995
`IEEE Standards Board
`
`Approved 22 July 1996
`American National Standards Institute
`
`Abstract: A high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel
`buses, as well as such nonbus interconnects as the IEEE Std 1596-1992, Scalable Coherent Interface, is
`specified. It is intended to provide a low-cost interconnect between cards on the same backplane, cards on
`other backplanes, and external peripherals. This standard follows the IEEE Std 1212-1991 Command and
`Status Register (CSR) architecture.
`Keywords: backplane, bus, computers, high-speed serial bus, interconnect, parallel buses
`
`The Institute of Electrical And Electronics Engineers, Inc.
`345 East 47th Street, New York, NY 10017-2394, USA
`Copyright © 1996 by the Institute of Electrical and Electronics Engineers, Inc.
`All rights reserved. Published 1996. Printed in the United States of America.
`ISBN 1-55937-583-3
`No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the
`prior written permission of the publisher.
`
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`

`

`IEEE Standards documents are developed within the IEEE Societies and the Standards Coordinating Committees of
`the IEEE Standards Board. Members of the committees serve voluntarily and without compensation. They are not
`necessarily members of the Institute. The standards developed within IEEE represent a consensus of the broad
`expertise on the subject within the Institute as well as those activities outside of IEEE that have expressed an interest
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`
`Use of an IEEE Standard is wholly voluntary. The existence of an IEEE Standard does not imply that there are no other
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`
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`
`Interpretations: Occasionally questions may arise regarding the meaning of portions of standards as they relate to
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`
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`
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`445 Hoes Lane
`P.O. Box 1331
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`USA
`
`Note: Attention is called to the possibility that implementation of this standard may require use of subject matter
`covered by patent rights. By publication of this standard, no position is taken with respect to the existence or
`validity of any patent rights in connection therewith. The IEEE shall not be responsible for identifying all patents
`for which a license may be required by an IEEE standard or for conducting inquiries into the legal validity or
`scope of those patents that are brought to its attention.
`
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`
`ii
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`

`

`Introduction
`
`(This introduction is not a part of IEEE Std 1394-1995, IEEE Standard for a High Performance Serial Bus.)
`
`This standard describes a serial bus that provides the same services as modern IEEE-standard parallel buses, but at a
`much lower cost. It has a 64-bit address space, control registers, and a read/write/lock operation set that conforms to
`the IEEE Std 1212-1991, Command and Status Register (CSR) standard. This simplifies bridging between the Serial
`Bus and the other interconnects using the IEEE 1212 architecture: IEEE Std 896-1991, FutureBus+ ® and IEEE Std
`1596-1992, Scalable Coherent Interface (SCI).
`
`There are two physical environments for the Serial Bus: backplane and cable. The backplane environment uses two
`single-ended signals on a broadcast multitapped bus using backplane transceiver logic (BTL) or emitter coupled logic
`(ECL) transceiver technology at 49.152 Mbit/s or enhanced transistor-transistor logic (TTL) transceiver technology at
`24.576 Mbit/s. In all cases, bus arbitration on the backplane is done using a dominant-mode-logic bit serial approach.
`The cable environment uses two low-voltage differential signals to connect devices in a noncyclic topology at 98.304
`Mbit/s, 196.608 Mbit/s, and 393.216 Mbit/s data rates. The cable arbitration system uses a self-configuring hierachical
`request/grant protocol that supports hot plugging and widely varying physical topologies.
`
`In addition to standard read/write/lock transactions, the Serial Bus provides extensive time-based services, including
`isochronous data transport (guaranteed latency and bandwidth) and an accurate submicrosecond global timebase for
`synchronizing events and data.
`
`This standards effort started in 1986 at the request of the membership of the IEEE Microcomputer Standards
`Committee as an attempt to unify the different serial busses originally proposed as parts of the IEEE 1014 VME, IEEE
`1296 Multibus II, and IEEE 896 FutureBus+® efforts. The original chair was Michael Teener, and much of the original
`architecture of this standard was invented by Mr. Teener, David James, and David Gustavson. In particular, the fairness
`and retry algorithms were originally proposed by David James during this early period.
`
`As the proposed standard was developed, it attracted more interest from those that needed a much improved external
`I/O interconnect for multimedia information and for mass storage. This added the requirements for isochronous
`transport, much higher data rates, and a more rugged cable and connector system. To answer these needs
`
`a) David James and Michael Teener developed a isochronous access protocol that was compatible with the
`existing fairness scheme. This protocol was simplified and enhanced based on proposals by Ed Gardner.
`b) Roger Van Brunt and Florin Oprescu developed a much improved physical layer for the cable environment,
`which was capable of 400 Mbit/s peak rates using low-cost digital complimentary-symmetry metal-oxide
`semiconductor (CMOS) technology. Forrest Crowell further reduced the complexity of the cable physical
`layer proposing the data-strobe encoding from INMOS. Florin Oprescu's self-configuring hierarchical
`arbitration protocol was also adopted at this time, with simplifications developed by Willam Duckwall.
`c) Andy Carter proposed the connector and cable system for the cable environment, based on original work done
`by Hosiden Corporation. The connector task group under the leadership of David Hatch refined that proposal
`to meet the requirements of all concerned.
`d) Greg Floryance, Bill Ham, and Max Bassler led the specification for the internal connection system for the
`cable environment. Bill Ham also worked to ensure that system level grounding and power issues were
`handled correctly.
`Thom Potyraj coordinated the development of the backplane environment and contributed much of its
`technical content.
`f) Gerald Marazas defined the bus management protocols with extensive help from David James, Peter
`Johansson, Hisato Shima, Scott Smyers, and Michael Teener. Peter Johansson rewrote the bus management
`text during the ballot resolution process as the best way to respond to extensive ballot comments on this topic.
`
`e)
`
`Gerald Marazas took over as chair of the working group in 1993, while Michael Teener continued as editor of the
`standard. Additional editing was done by Thom Potyraj for the backplane environment physical layer, Jeff Stai for the
`link and transaction layers, Gerald Marazas for the bus management layer, Bill Ham for the cable environment system
`
`Authorized licensed use limited to: Columbia University Libraries. Downloaded on March 04,2021 at 02:16:11 UTC from IEEE Xplore. Restrictions apply.
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`

`

`properties, Max Bassler and Greg Floryance for the internal device physical interface, Jim Baldwin for the PHY-Link
`interface definition, Florin Oprescu for the cable test procedures, and Steven Dunwoody for the shielding effectiveness
`test procedures.
`
`Patent notice
`
`Note: Attention is called to the possibility that implementation of this standard may require use of subject matter
`covered by patent rights. By publication of this standard, no position is taken with respect to the existence or validity
`of any patent rights in connection therewith. The IEEE shall not be responsible for identifying all patents for which a
`license may be required by an IEEE standard or for conducting inquiries into the legal validity or scope of those patents
`that are brought to its attention.
`
`The patent holder has, however, filed a statement of assurance that it will grant a license under these rights without
`compensation or under reasonable rates and nondiscriminatory, reasonable terms and conditions to all applicants
`desiring to obtain such a license. The IEEE makes no representation as to the reasonableness of rates and/or terms and
`conditions of the license agreement offered by the patent holder. Contact information may be obtained from the IEEE
`Standards Department.
`
`Committee membership
`
`The following is a list of voting members of the IEEE P1394 working group at the time of publication.
`
`Max Bassler
`Bob Bellino
`Charles Brill
`Andy Carter
`Greg Floryance
`Giles Frazier
`Bill Ham
`Norm Harris
`David Hatch
`
`Gerald Marazas, Chair
`Michael D. Teener (Editor)
`Ken Stewart, Secretary
`
`David V. James
`James Kuo
`Lawrence J. Lamers
`Gene Milligan
`Jay Neer
`Florin Oprescu
`Thomas J. Potyraj
`Doug Riemer
`Ron Roberts
`
`Scott Smyers
`Jeff Stai
`Roger Van Brunt
`Hans H. Wang
`Harvey Watersdorf
`Alan Wetzel
`Bob Whiteman
`Michael Wingard
`
`The following is a list of other major participants in the IEEE P1394 working group (those that attended at least three
`working group meetings in the last four years).
`
`Mark Andresen
`John Atwood
`James Baldwin
`Peter Bartlett
`Bryan Bell
`Phil Bolton
`Paul L. Borrill
`David Brief
`Ed Cady
`Ramiro Calvo
`Mike Chastain
`Kim Clohessy
`Forrest Crowell
`Wayne Davis
`Tom Debiec
`
`iv
`
`Dhiru Desai
`Frank Duffy
`Sam Duncan
`W. P. Evertz
`Stephen Finch
`Mike Foster
`Richard Fryer
`Bob Gannon
`Edward A. Gardner
`Charles Grant
`Michael Griffin
`David B. Gustavson
`Steffen Hagene
`Emil Hahn
`Ken Hallam
`
`Mark Hassel
`Rick Heidick
`Dan Hillman
`Mark Jander
`Greg Kite
`Lawence Kopp
`Ralph Lachenmaier
`Michael Lazar
`Wendell Lengefeld
`Fred Leung
`John Lohmeyer
`John Lopata
`Ivy Lui
`Don May
`Charles Monia
`
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`

`

`Claude Mosley
`Ray Muggli
`Gary Murdock
`Michael Nguyen
`Dan O'Connor
`Erich Oetting
`Thomas A. Patrick
`Scott Petler
`
`Kevin Pokorney
`Jeffrey M. Rosa
`Don Senzig
`Patricia Smith
`Robert N. Snively
`Chris Stone
`Paul Sweazey
`Lars Thernsjö
`
`The following persons served on the ballot response committee:
`
`Max Bassler
`Larry Blackledge
`Andy Carter
`William Duckwall
`Bill Gamble
`Gary Hoffman
`
`David V. James
`Peter Johansson
`Gerald Marazas
`Richard Mourn
`Dan O'Connor
`Amrish Patel
`
`The following persons were members of the balloting group:
`
`M. Robert Aaron
`Ray S. Alderman
`Richard P. Ames
`Harry A. Andreas
`Keith D. Anthony
`Harrison A. Beasley
`Stephen E. Belvin
`Alan Beverly
`Christus Bezirtzoglou
`John Black
`Martin Blake
`Lim Boon Lum
`Paul L. Borrill
`Michael L. Bradley
`John C. Brightwell
`Charles Brill
`Hakon Ording Bugge
`Andrew L. Carter
`Stephen J. Cecil
`Andy B. Cheese
`C. H. Chen
`Joseph Chen
`Kim Clohessy
`Steven R. Corbesero
`Darrell Cox
`Patrick Crane
`Robert S. Crowder
`Dante Del Corso
`Roberto Divia
`Ian Dobson
`Samuel Duncan
`Sourav K. Dutta
`Roger D. Edwards
`Wayne P. Fischer
`
`Gordon Force
`Giles Frazier
`Martin Freeman
`Richard E. Fryer
`Paul J. Fulton
`Joseph D. George
`Stein Gjessing
`Patrick Gonia
`Julio Gonzalez Sanz
`Bruce Grieshaber
`William Groseclose
`Peter B. Gutgarts
`Mike Hasenfratz
`David Hawley
`Steven Hetzler
`Thomas G. Hillyer
`George Horansky
`Edgar Jacques
`David V. James
`Norman C. Joehlin
`David Kahn
`Richard H. Karpinski
`Stephen Kempainen
`James R. Koser
`Ernst H. Kristiansen
`Thomas M. Kurihara
`Ralph Lachenmaier
`Tuvia Lamdan
`Lawrence Lamers
`Conrad A. Laurvick
`Gerald E. Laws
`Rollins Linser
`Donald C. Loughry
`Gerald A. Marazas
`
`Barry Thompson
`Joel Urban
`Mike Wenzel
`Lee Whetsel
`Dave Wickliff
`Yoshihiko Yano
`
`Thomas J. Potyraj
`Scott Smyers
`Jeff Stai
`Michael D. Teener
`Roger Van Brunt
`Alan Wetzel
`
`Roland Marbot
`Joseph R. Marshall
`William C. McDonald
`S. Fenton McDonald
`Thanos Mentzelopoulos
`Dhenna Moongilan
`Klaus-Dieter Mueller
`J. Michael Munroe
`J. D. Nicoud
`Gregory C. Novak
`Daniel C. O'Connor
`Katsuyuki Okada
`Peter Z. Onufryk
`Florin Oprescu
`Fred J. Orlando
`Michael Orlovsky
`Roman Orzol
`Granville Ott
`Elwood T. Parsons
`Mira Pauker
`Thomas Potyraj
`Suzanne L. Price
`Steve Quinton
`Gordon Robinson
`Fred U. Rosenberger
`John Rynearson
`Frederick E. Sauer
`Donald Senzig
`Gary K. Sloane
`Larry C. Sollman
`Robert K. Southard
`Richard C. Spratt
`Jeffrey Stai
`Larry Stein
`
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`

`

`Nobuaki Sugiura
`Michael D. Teener
`Manu Thapar
`Michael G. Thompson
`Michael Timperman
`Robert C. Tripi
`Roger Van Brunt
`Yoshiaki Wakimura
`Paul Walker
`
`Eike G. Waltz
`Keith Weber
`Thomas H. Wegmann
`H. Michael Wenzel
`Alan Wetzel
`Colin Whitby-Strevens
`Rob White
`Dave Wickliff
`Thomas Wicklund
`
`Robert Widlicka
`Mark Williams
`Ronald T. Wolfe
`David L. Wright
`Forrest D. Wright
`Yoshio Yamaguchi
`Oren Yuen
`Janusz Zalewski
`Jonathan Zar
`
`When the IEEE Standards Board approved this standard on December 12, 1995, it had the following membership:
`
`E. G. “Al” Kiener, Chair
`Donald C. Loughry, Vice Chair
`Andrew G. Salem, Secretary
`
`Jim Isaak
`Ben C. Johnson
`Sonny Kasturi
`Lorraine C. Kevra
`Ivor N. Knight
`Joseph L. Koepfinger*
`D. N. “Jim” Logothetis
`L. Bruce McClung
`Marco W. Migliaro
`
`Mary Lou Padgett
`John W. Pope
`Arthur K. Reilly
`Gary S. Robinson
`Ingo Rüsch
`Chee Kiow Tan
`Leonard L. Tripp
`Howard L. Wolfman
`
`Gilles A. Baril
`Clyde R. Camp
`Joseph A. Cannatelli
`Stephen L. Diamond
`Harold E. Epstein
`Donald C. Fleckenstein
`Jay Forster*
`Donald N. Heirman
`Richard J. Holleman
`
`*Member Emeritus
`
`Also included are the following nonvoting IEEE Standards Board liaisons:
`
`Satish K. Aggarwal
`
`Steve Sharkey
`Robert E. Hebner
`
`Mary Lynne Nielsen
`IEEE Standards Project Editor
`
`Chester C. Taylor
`
`Futurebus+ is a registered trademark of the Institute of Electrical and Electronics Engineers, Inc.
`SCSI is a registered trademark of SCSI Solutions.
`NuBus is a registered trademark of Texas Instruments, Inc.
`
`vi
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`

`

`CLAUSE
`
`PAGE
`
`1.
`
`Overview.............................................................................................................................................................1
`
`1.1 Scope .......................................................................................................................................................... 1
`1.2 References .................................................................................................................................................. 1
`1.3 Document organization .............................................................................................................................. 2
`1.4 Serial Bus applications............................................................................................................................... 2
`1.5 Service model............................................................................................................................................. 3
`1.6 Document notation..................................................................................................................................... 4
`1.7 Compliance .............................................................................................................................................. 11
`
`2.
`
`Definitions and abbreviations ...........................................................................................................................12
`
`2.1 Conformance glossary.............................................................................................................................. 12
`2.2 Technical glossary.................................................................................................................................... 12
`
`3.
`
`Summary description ........................................................................................................................................16
`
`3.1 Node and module architectures................................................................................................................ 17
`3.2 Topology .................................................................................................................................................. 17
`3.3 Addressing ............................................................................................................................................... 19
`3.4 Protocol architecture ................................................................................................................................ 19
`3.5 Transaction layer...................................................................................................................................... 21
`3.6 Link layer ................................................................................................................................................. 24
`3.7 Physical layer ........................................................................................................................................... 31
`3.8 Bus management ...................................................................................................................................... 45
`
`4.
`
`Cable PHY specification...................................................................................................................................46
`
`4.1 Cable PHY services ................................................................................................................................. 46
`4.2 Cable physical connection specification .................................................................................................. 50
`4.3 Cable PHY facilities................................................................................................................................. 81
`4.4 Cable PHY operation ............................................................................................................................... 92
`
`5.
`
`Backplane PHY specification .........................................................................................................................115
`
`5.1 Backplane PHY services ........................................................................................................................ 115
`5.2 Backplane physical connection specification ........................................................................................ 119
`5.3 Backplane PHY facilities ....................................................................................................................... 128
`5.4 Backplane PHY operation...................................................................................................................... 131
`5.5 Backplane initialization and reset .......................................................................................................... 138
`
`6.
`
`Link layer specification...................................................................................................................................139
`
`6.1 Link layer services ................................................................................................................................. 139
`6.2 Link layer facilities ................................................................................................................................ 145
`6.3 Link layer operation ............................................................................................................................... 166
`6.4 Link layer reference code....................................................................................................................... 175
`
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`CLAUSE
`
`PAGE
`
`7.
`
`Transaction layer specification .......................................................................................................................177
`
`7.1 Transaction layer services...................................................................................................................... 177
`7.2 Transaction facilities .............................................................................................................................. 180
`7.3 Transaction operation............................................................................................................................. 181
`7.4 CSR Architecture transactions mapped to Serial Bus............................................................................ 203
`
`8.
`
`Serial Bus management specification .............................................................................................................203
`
`8.1 Serial Bus management summary.......................................................................................................... 203
`8.2 Serial Bus management services............................................................................................................ 204
`8.3 Serial Bus management facilities ........................................................................................................... 207
`8.4 Serial Bus management operations ........................................................................................................ 234
`8.5 Bus configuration state machines (cable environment) ......................................................................... 244
`
`Annex A (Normative) Cable environment system properties.....................................................................................250
`
`Annex B (Normative) External connector positive retention .....................................................................................259
`
`Annex C (Normative) Internal device physical interface ...........................................................................................261
`
`Annex D (Informative) Backplane PHY timing formulas ..........................................................................................291
`
`Annex E (Informative) Cable operation and implementation examples.....................................................................301
`
`Annex F (Informative) Backplane physical implementation example .......................................................................320
`
`Annex G (Informative) Backplane isochronous resource manager selection.............................................................326
`
`Annex H (Informative) Serial Bus configuration in the cable environment...............................................................328
`
`Annex I (Informative) Socket PCB terminal patterns and mounting..........................................................................336
`
`Annex J (Informative) PHY-link interface specification............................................................................................342
`
`Annex K (Informative) Serial Bus cable test procedures ...........................................................................................360
`
`Annex L (Informative) Shielding effectiveness and transfer impedance testing........................................................379
`
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`

`

`IEEE Standard for a High Performance
`Serial Bus
`
`1. Overview
`
`1.1 Scope
`
`This standard describes a high-speed, low-cost Serial Bus suitable for use as a peripheral bus or a backup to parallel
`backplane buses. Highlights of the Serial Bus include
`
`c)
`
`a) Automatic assignment of node addresses—no need for address switches.
`b) Variable speed data transmission based on ISDN-compatible1 bit rates from 24.576 Mbit/s for TTL
`backplanes to 49.152 Mbit/s for BTL backplanes to 98.304 Mbit/s, 196.608 Mbit/s, and 393.216 Mbit/s for
`the cable medium.
`The cable medium allows up to sixteen physical connections (cable hops), each up to 4.5 m, giving a total
`cable distance of 72 m between any two devices. Bus management recognizes smaller configurations to
`optimize performance.
`d) Bus transactions that include both block and single quadlet reads and writes, as well as an “isochronous”
`mode that provides a low-overhead guaranteed bandwidth service.
`e) A physical layer supporting both cable media and backplane buses.
`f) A fair bus access mechanism that guarantees all nodes equal access. The backplane environment adds a
`priority mechanism, but one that ensures that nodes using the fair protocol are still guaranteed at least partial
`access.
`g) Consistent with ISO/IEC 13213 :1994 (IEEE Std 1212-1991).
`
`1.2 References
`
`This standard shall be used in conjunction with the following publications. When the following publications are
`superseded by an approved revision, the revision shall apply.
`
`ANSI/EIA-364-B-90, Electrical Connector Test Procedures Including Environmental Classifications.2
`
`1The lowest data rate of 24.576 Mbit/s is exactly 18 times the 1.536 Mbit/s and 12 times the 2.048 Mbit/s ISDN primary rates. It is also an integer
`multiple of the ISDN basic rate and numerous other communication rates.
`2EIA publications are available from Global Engineering, 1990 M Street NW, Suite 400, Washington, DC, 20036, USA.
`
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`
`1
`
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`Ex. 1026 - Page 9
`
`

`

`IEEE Std 1394-1995
`
`IEEE STANDARD FOR A
`
`IEEE Std 896.2-1991, IEEE Standard for Futurebus+®—Physical Layer and Profile Specification (ANSI).3
`
`IEEE Std 896.5-1993, IEEE Standard for Futurebus+®, Profile M (Military) (ANSI).
`
`IEEE P896.6, IEEE Standard for Futurebus+ ® Telecommunications Systems, Profile T (Telecommunications).4
`
`IEEE Std 1014-1987, IEEE Standard for a Versatile Backplane Bus: VMEbus (ANSI).
`
`IEEE Std 1194.1-1991, IEEE Standard for Electrical Characteristics of Backplane Transceiver Logic (BTL) Interface
`Circuits (ANSI).
`
`ISO/IEC 9899: 1990, Programming languages—C.5
`
`ISO/IEC 10857: 1994 (ANSI/IEEE Std 896.1 1994 Edition) Information technology—Microprocessor systems—
`Futurebus+®—Logi cal Protocol Specification.
`
`ISO/IEC 13213: 1994 [ANSI/IEEE Std 1212 1994 Edition], Information technology—Microprocessor systems—
`Control and Status Registers (CSR) Architecture for microcomputer buses.
`
`1.3 Document organization
`
`This standard contains this overview, a list of definitions, an informative summary description, chapters of technical
`specification, and application annexes. The new reader should read the document in order. The actual specification
`follows the summary and is organized from the bottom up; that is, the specification starts at the physical layer (cable
`and backplane), works up to the link layer, the transaction layer, and the bus management layer.
`
`1.4 Serial Bus applications
`
`Three primary applications have driven the design and architecture of the Serial Bus: an alternate for a parallel
`backplane bus, a low-cost peripheral bus, and a bus bridge between architecturally compatible 32-bit buses.
`
`1.4.1 Alternate bus
`
`There are five main reasons for providing a serial bus on a system that already has a parallel bus:
`
`a)
`
`The many modules that make up a system might operate on different backplane bus standards, yet they need
`to work together.
`b) Although located within the same enclosure, the system is too large or physically disperse to use a single
`backplane, yet modules in the different backplanes have to communicate.
`c) One or more modules of a system are located neither on the same backplane nor within the same enclosure.
`d) A redundant data path increases fault tolerance. The system can use the Serial Bus to isolate and diagnose
`errors without depending on the failed parallel bus.
`e) Many system modules are price-sensitive and do not need the full bandwidth of a parallel bus.
`
`3IEEE publications are available from the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 08855-
`1331, USA.
`4This IEEE standards project was not approved by the IEEE Standards Board at the time this publication went to press. For information about
`obtaining a draft, contact the IEEE.
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`Ex. 1026 - Page 10
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`HIGH PERFORMANCE SERIAL BUS
`
`IEEE Std 1394-1995
`
`1.4.2 Low-cost peripheral bus
`
`The Serial Bus can also be used as a powerful and low-cost peripheral interconnect. The compact Serial Bus cable and
`connector allow bandwidths comparable with existing I/O interconnect standards. The Serial Bus has the added
`advantage of architectural compatibility with parallel computer buses; this leads to lower communications overhead
`than limited function dedicated I/O interconnects.
`
`1.4.3 Bus bridge
`
`The Serial Bus architecture limits the number of nodes on any bus to 63, but supports multiple bus systems via bus
`bridges. The CSR Architecture defines the Serial Bus addressing structure, which allows almost 216 nodes.
`
`A bus bridge normally eavesdrops on the bus, ignoring all transactions between local addresses but listening carefully
`for remote transactions. When the bridge receives a packet for a remote address,