UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`SAMSUNG ELECTRONICS CO., LTD. And
`
`SAMSUNG ELECTRONICS AMERICA, INC.,
`
`Petitioners
`v.
`ACQIS LLC,
`Patent Owner
`
`IPR2021-00668
`
`DECLARATION OF STEPHEN A. EDWARDS, PH.D.
`U.S. PATENT NO. 9,703,750
`
`WEST\293542535.3
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`SAMSUNG
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`

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`I.
`II.
`III.
`IV.
`V.
`
`VI.
`VII.
`
`A.
`B.
`C.
`
`A.
`
`TABLE OF CONTENTS
`
`BACKGROUND AND QUALIFICATIONS ..................................... 1
`MATERIALS REVIEWED ................................................................. 4
`RELEVANT LEGAL STANDARDS .................................................. 5
`TECHNOLOGY BACKGROUND ..................................................... 8
`U.S. 9,703,750 .................................................................................... 13
`Summary ............................................................................................ 13
`Person of Ordinary Skill in the Art .................................................... 15
`Prosecution History ............................................................................ 16
`CLAIM CONSTRUCTION ............................................................... 17
`SUMMARY OF OPINIONS ............................................................. 21
`Ground I: Gulick in view of Goodrum Renders Claims 1-3, 21-
`23, 25-28, and 31-33 Unpatentable .................................................... 22
`1.
`Gulick ....................................................................................... 22
`2.
`Goodrum .................................................................................. 23
`3.
`Motivation to Combine Gulick and Goodrum ......................... 23
`4.
`Claim 1 ..................................................................................... 27
`5.
`Claim 2 ..................................................................................... 39
`6.
`Claim 3 ..................................................................................... 42
`7.
`Claim 5 ..................................................................................... 43
`8.
`Claim 6 ..................................................................................... 48
`9.
`Claim 10 ................................................................................... 48
`10. Claim 11 ................................................................................... 50
`11. Claim 14 ................................................................................... 50
`12. Claim 15 ................................................................................... 54
`13. Claim 16 ................................................................................... 54
`14. Claim 17 ................................................................................... 55
`15. Claim 18 ................................................................................... 55
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`16. Claim 19 ................................................................................... 57
`17. Claim 20 ................................................................................... 58
`18. Claim 21 ................................................................................... 58
`19. Claim 22 ................................................................................... 60
`20. Claim 23 ................................................................................... 61
`21. Claim 25 ................................................................................... 62
`22. Claim 26 ................................................................................... 64
`23. Claim 27 ................................................................................... 65
`24. Claim 28 ................................................................................... 66
`25. Claim 31 ................................................................................... 67
`26. Claim 32 ................................................................................... 69
`27. Claim 33 ................................................................................... 69
`28. Claim 34 ................................................................................... 70
`29. Claim 44 ................................................................................... 70
`30. Claim 45 ................................................................................... 72
`Ground II: Gulick in view of Goodrum and Sauber Renders
`Claims 12, 13, 35-43 Unpatentable .................................................... 73
`1.
`Sauber ....................................................................................... 73
`2.
`Motivation to combine Sauber with Gulick and Goodrum ..... 74
`3.
`Claim 12 ................................................................................... 75
`4.
`Claim 13 ................................................................................... 76
`5.
`Claim 35 ................................................................................... 77
`6.
`Claim 36 ................................................................................... 78
`7.
`Claim 37 ................................................................................... 79
`8.
`Claim 38 ................................................................................... 80
`9.
`Claim 39 ................................................................................... 80
`10. Claim 40 ................................................................................... 82
`11. Claim 41 ................................................................................... 83
`12. Claim 42 ................................................................................... 84
`
`B.
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`C.
`
`D.
`
`E.
`
`13. Claim 43 ................................................................................... 86
`Ground III: Gulick in view of Goodrum and McAlear Renders
`Claims 4, 7-9, 24, 46-50 Unpatentable .............................................. 86
`1.
`McAlear ................................................................................... 87
`2.
`Motivation to combine McAlear with Gulick and
`Goodrum .................................................................................. 88
`Claim 4 ..................................................................................... 89
`3.
`Claim 7 ..................................................................................... 91
`4.
`Claim 8 ..................................................................................... 92
`5.
`Claim 9 ..................................................................................... 93
`6.
`Claim 24 ................................................................................... 93
`7.
`Claim 46 ................................................................................... 95
`8.
`Claim 47 ................................................................................... 96
`9.
`10. Claim 48 ................................................................................... 97
`11. Claim 49 ................................................................................... 99
`12. Claim 50 ................................................................................... 99
`Ground IV: Gulick in view of Goodrum, McAlear and Sauber
`Renders Claim 51 Unpatentable ....................................................... 101
`1.
`Claim 51 ................................................................................. 101
`Ground V: Hart in view of Goodrum and McAlear Renders
`Claims 29-30 Unpatentable .............................................................. 102
`1.
`Hart ......................................................................................... 102
`2.
`Motivation to Combine Hart and Goodrum ........................... 103
`3.
`Claim 29 ................................................................................. 104
`4.
`Claim 30 ................................................................................. 109
`EXHIBITS ........................................................................................ 111
`AVAILABILITY FOR CROSS-EXAMINATION ......................... 111
`RIGHT TO SUPPLEMENT............................................................. 112
`JURAT .............................................................................................. 112
`
`VIII.
`IX.
`X.
`XI.
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`EXHIBIT LIST
`
`Exhibit No.
`EX1001
`EX1002
`EX1004
`EX1005
`EX1006
`EX1007
`EX1008
`EX1009
`EX1014
`EX1015
`EX1021
`EX1022
`EX1023
`EX1024
`EX1025
`EX1026
`EX1027
`EX1028
`
`EX1029
`
`EX1030
`EX1031
`EX1032
`EX1035
`
`Description
`U.S. Patent No. 9,703,750
`Prosecution File History of U.S. Patent No. 9,703,750
`U.S. Patent No. 6,690,676
`U.S. Provisional Application No. 60/109,589
`U.S. Patent No. 5,822,571
`U.S. Patent No 6,389,029
`U.S. Patent No 6,041,372
`U.S. Patent No 6,600,747
`Plaintiff ACQIS LLC’s Disclosure of Asserted Claims and
`Infringement Contentions, Exhibit C-2
`IEEE Std 802.3i-1990
`IEEE Std 802.3u-1995
`U.S. Patent No. 2,799,449
`IBM Personal Computer Technical Reference Manual, 1981
`PCI Local Bus Specification 2.2, December 18, 1998
`I2C-Bus Specification and User Manual rev 6, 2014
`IEEE Std 1394-1995
`Serial ATA: High Speed Serialized AT Attachment, 2003,
`SATA Infographic, 2020
`U.S. Patent No. 2,964,652
`Yourke, Millimicrosecond Transistor Current Switching
`Circuits, IRE Transactions on Circuit Theory, 4(3), September
`1957
`MECL System Design Handbook, 1971
`IEEE Std 1596.3-1996
`IEEE Std 1596-1992
`Plaintiff ACQIS LLC’s Disclosure of Asserted Claims and
`Infringement Contentions, Exhibit C-1
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`EX1036
`
`EX1037
`
`Plaintiff ACQIS LLC’s Disclosure of Asserted Claims and
`Infringement Contentions, Exhibit C-3
`Plaintiff ACQIS LLC’s Disclosure of Asserted Claims and
`Infringement Contentions, Exhibit C-4
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`I, Stephen A. Edwards, Ph.D., declare as follows:
`
`I.
`
`BACKGROUND AND QUALIFICATIONS
`1.
`My name is Stephen A. Edwards.
`
`2.
`
`I have been retained on behalf of Samsung Electronics Co., Ltd. and
`
`Samsung Electronics America, Inc. (collectively “Samsung” or “Petitioners”). I
`
`understand that Samsung is planning to file a petition for inter partes review before
`
`the Patent Trial and Appeal Board (“PTAB” or “Board”) of U.S. Patent No.
`
`9,703,750 (the “’750 Patent”) (EX1001).
`
`3.
`
`I have been asked to opine on the subject of the validity of the claims
`
`of the ’750 Patent.
`
`4.
`
`My complete qualifications and professional experience are described
`
`in my curriculum vitae, a copy of which is attached as Appendix A. The following
`
`is a brief summary of my relevant qualifications and professional experience.
`
`5.
`
`I am currently an associate professor of computer science at Columbia
`
`University.
`
`6.
`
`I have either trained or worked in the fields of electrical engineering
`
`and computer science for approximately twenty-five years. Since joining Columbia
`
`in 2001, I have taught classes on digital design and computer architecture. My
`
`1
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`research focuses on automating the construction of hardware and software through
`
`the use of compiler technology. In short, I teach computers how to make computers.
`
`7.
`
`I received my B.S. in Electrical Engineering in 1992 from the California
`
`Institute of Technology, and my M.S. and Ph.D. in Electrical Engineering from the
`
`University of California, Berkeley, in 1994 and 1997, respectively.
`
`8.
`
`Between 1997 and 2001, I worked at Simplex Solutions and later
`
`Synopsys, where I developed software responsible for the analysis and synthesis of
`
`digital circuits. While at Synopsis, I developed an algorithm that was later patented.
`
`9.
`
`I joined Columbia in 2001 as an assistant professor, was promoted to
`
`associate professor in 2006, and granted tenure in 2008 (such timing is typical at
`
`Columbia). I have advised and graduated four PhD students and many Masters
`
`students.
`
`10.
`
`I have published over 100 articles in peer reviewed journals and
`
`conference proceedings, including some in Proceedings of the IEEE, Computer
`
`Architecture Letters, and the International Conference on Computer Design. I have
`
`also written two complete books and contributed chapters to four others that have all
`
`been published.
`
`11.
`
`I am active in professional service, having served as a member of
`
`editorial boards for several leading technical journals in the areas of computer
`
`2
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`hardware design, computer-aided design of digital systems, and compilation. I have
`
`also served on the technical program committee of many major annual technical
`
`conferences in these areas.
`
`12.
`
`I currently teach an embedded systems course in which students
`
`assemble and program processor-based computer systems using FPGAs. A key
`
`focus of the class is on the hardware-software interface, which is done through buses,
`
`so I teach the history of bus protocols to the students along with details of the specific
`
`buses used in our embedded systems. The students effectively design system-on-
`
`chip devices comprising a mix of components supplied to them, such as ARM
`
`processors, along with custom bus-resident devices they have designed themselves.
`
`I create the reference designs from which the students start their work, so I am quite
`
`familiar with their details.
`
`13.
`
`I also teach Columbia’s undergraduate course on digital design and
`
`computer architecture in which we cover the basics of digital design (gates, flip-
`
`flops, clocks, multiplexers, etc.) along with basic computer architecture (ALUs,
`
`register files, memory systems, controllers, pipelines, caches, and assembly
`
`language).
`
`14.
`
`I have been retained as an expert in a number of patent-related litigation
`
`matters. Most have focused on aspects of computer design, ranging from lower-
`
`3
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`level circuit and electrical issues all the way to systems software considerations. I
`
`first built a bus-resident peripheral (a sound card) when I was a high school student
`
`in 1988 and have been working with such technology ever since.
`
`15. My opinions set forth in this declaration are informed by my experience
`
`in the fields of electrical engineering and computer science. Based on my above-
`
`described experience, I am an expert in the field. Also, based on my experiences, I
`
`understand and know of the capabilities of persons of ordinary skill in this field in
`
`1999 up to the present day.
`
`II. MATERIALS REVIEWED
`16.
`I am not an attorney and offer no legal opinions, but in my work, I have
`
`had experience studying and analyzing patents and patent claims from the
`
`perspective of a person skilled in the art. I am also a named inventor on at least one
`
`U.S. patent.
`
`17.
`
`In preparing this declaration, I reviewed the ’750 Patent, including the
`
`claims of the patent in view of the specification, and I have reviewed the prosecution
`
`history of the ’750 Patent and numerous prior art and technical references from the
`
`time of the alleged invention.
`
`18.
`
`I have reviewed and understand the references listed in the above
`
`Exhibit List.
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`19.
`
`I have been asked to consider whether the references listed above in the
`
`Exhibit list disclose or suggest, alone or in combination, the features recited in the
`
`claims of the ’750 Patent. I have also been asked to consider the state of the art and
`
`the prior art available before the time the ’750 Patent was filed. My opinions are
`
`provided in this declaration.
`
`20.
`
`To the best of my knowledge, I have no financial interest in Petitioner.
`
`Petitioner’s counsel has informed me that ACQIS, LLC (“ACQIS”) purports to own
`
`the ’750 Patent. To the best of my knowledge, I have no financial interest in ACQIS
`
`and, to the best of my recollection, I have had no contact with ACQIS, or the named
`
`inventor of the patent, William W. Y. Chu. To the best of my knowledge, I similarly
`
`have no financial interest in the ’750 Patent. To the extent any mutual funds or other
`
`investments that I own have a financial interest in the Petitioner, Samsung, the Patent
`
`Owner, ACQIS, or the ’750 Patent, I am not aware of, nor do I have control over,
`
`any financial interest that would affect or bias my judgment.
`
`21.
`
`I am being compensated at my standard consulting rate for my time.
`
`My compensation is in no way contingent on the results of these or any other
`
`proceedings relating to the above-captioned patent.
`
`III. RELEVANT LEGAL STANDARDS
`
`5
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`22.
`
`I am not an attorney. For the purposes of this declaration, I have been
`
`informed about certain aspects of the law that are relevant to forming my opinions.
`
`My understanding of the law is as follows:
`
`23.
`
`Petitioner’s counsel has informed me that a patent claim may be
`
`“anticipated” if each element of that claim is present either explicitly or inherently
`
`in a single prior art reference, and that the elements should be arranged in the
`
`reference as in the claim. Petitioner’s counsel has informed me that for a claimed
`
`limitation to be inherently present, the prior art need not expressly disclose the
`
`limitation, so long as the claimed limitation necessarily flows from a disclosure in
`
`the prior art.
`
`24.
`
`Petitioner’s counsel has informed me that a patent claim can be
`
`considered to have been obvious to a person of ordinary skill in the art at the time
`
`the application was filed. This means that, even if all of the requirements of a claim
`
`are not found in a single prior art reference, the claim is not patentable if the
`
`differences between the subject matter in the prior art and the subject matter in the
`
`claim would have been obvious to a person of ordinary skill in the art at the time the
`
`application was filed.
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`25.
`
`Petitioner’s counsel has informed me that a determination of whether a
`
`claim would have been obvious should be based upon several factors, including,
`
`among others:
`
`•
`
`•
`
`the level of ordinary skill in the art at the time the application was filed;
`
`the scope and content of the prior art; and
`
`• what differences, if any, existed between the claimed invention and the
`
`prior art.
`
`26.
`
`Petitioner’s counsel has informed me that a single reference can render
`
`a patent claim obvious if any differences between that reference and the claims
`
`would have been obvious to a person of ordinary skill in the art. Alternatively, the
`
`teachings of two or more references may be combined in the same way as disclosed
`
`in the claims, if such a combination would have been obvious to one having ordinary
`
`skill in the art. In determining whether a combination based on either a single
`
`reference or multiple references would have been obvious, it is appropriate to
`
`consider, among other factors:
`
`• whether the teachings of the prior art references disclose known concepts
`
`combined in familiar ways, and when combined, would yield predictable
`
`results;
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`• whether a person of ordinary skill in the art could implement a predictable
`
`variation, and would see the benefit of doing so;
`
`• whether the claimed elements represent one of a limited number of known
`
`design choices, and would have a reasonable expectation of success by
`
`those skilled in the art;
`
`• whether a person of ordinary skill would have recognized a reason to
`
`combine known elements in the manner described in the claim;
`
`• whether there is some teaching or suggestion in the prior art to make the
`
`modification or combination of elements claimed in the patent; and
`
`• whether the innovation applies a known technique that had been used to
`
`improve a similar device or method in a similar way.
`
`27.
`
`Petitioner’s counsel has informed me that one of ordinary skill in the
`
`art has ordinary creativity, and is not an automaton. Petitioner’s counsel has
`
`informed me that in considering obviousness, it is important not to determine
`
`obviousness using the benefit of hindsight derived from the patent being considered.
`
`IV. TECHNOLOGY BACKGROUND
`
`28. Computer components typically communicate through buses: groups of
`
`wires that convey data through an agreed-upon protocol. The notion of a computer
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`bus has been around since at least the early 1950s. For example, Alan Turing et al.
`
`were using the term as early as 1951. See EX1022.
`
`29.
`
`The first IBM PC, released in 1981, used a simple Intel 8288 bus
`
`controller that watched the PC’s 8088 processor to generate the control signals for
`
`what would ultimately be called the Industry Standard Architecture (ISA) bus. See
`
`EX1023.
`
`30.
`
`The comparatively low speed of the ISA bus quickly became a
`
`bottleneck after its release. Numerous alternatives were proposed, but ultimately the
`
`Peripheral Component Interconnect (PCI) bus took over the role of the ISA bus.
`
`Designed primarily by Intel starting in 1990, the first standard was released in 1992.
`
`By 1994, PCI had grown dominant. See EX1024.
`
`31.
`
` As processors grew faster, PCI became a bottleneck and was extended
`
`a few times, both by simply increasing its speed and later through the PCI-X
`
`standard, which doubled the width of the bus to 64 bits.
`
`32.
`
`ISA, PCI, and PCI-X are all parallel busses, meaning they transmit data
`
`words in parallel, across multiple wires simultaneously. While using multiple wires
`
`like this is an easy way to increase bandwidth, it requires increasingly larger
`
`connectors and becomes harder to run at higher frequencies because it becomes more
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`difficult to account for “skew” where different bit line lengths mean the data no
`
`longer arrives simultaneously and must be sent slower as a result.
`
`33.
`
`Serial peripheral busses have existed for a very long time. The earliest
`
`applications were settings where multiple wires would be prohibitively expensive,
`
`such as over long distances or in highly cost-constrained environments where the
`
`typically lower performance of a serial bus was acceptable. The telegraph (think
`
`Morse code) is a very early example of a serial bus. In 1982, Philips introduced the
`
`I2C serial bus for reduced-cost processor-to-peripheral connections in settings such
`
`as consumer televisions; I2C is still routinely used today in settings where its speed
`
`suffices and there is a desire to reduce the number of wires, such as to temperature
`
`sensors on computer motherboards. See EX1025.
`
`34.
`
`Starting in the late 1980s, it was becoming clear that serial buses would
`
`find more applications as it grew more difficult to run parallel busses at higher
`
`speeds and running more bits in parallel was growing impractical. In 1986, Apple
`
`started development on what would eventually be the IEEE 1394 standard (Apple
`
`called their version “Firewire”). Apple had intended Firewire as a serial replacement
`
`of the parallel SCSI bus standard, although they were not directly compatible. The
`
`first 1394 standard was released in 1995 (See EX1026) and Apple computer
`
`routinely shipped with Firewire ports starting around 1999. For many years, Firewire
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`was the fastest consumer serial communication bus, but it was ultimately overtaken
`
`by USB 3.0 around 2010.
`
`35. Other parallel buses started going serial around 2000. The Serial ATA
`
`or SATA bus replaced the parallel ATA bus standard that started connecting hard
`
`drives to computers in 1984’s IBM PC AT. Using signaling similar to SATA, the
`
`Serial Attached SCSI (SAS) bus was introduced in 2004. See EX1027. SAS is a
`
`compatible version of the SCSI bus standard that Apple had tried to move away from
`
`in the 1990s.
`
`36. Differential signaling using low voltage levels has been known since at
`
`least the 1950s (See, e.g., EX1028 and EX1029), where it was observed that very
`
`high switching speeds could be achieved by operating transistors as high-gain
`
`differential amplifiers and feeding them low voltage swings of perhaps 0.8V.
`
`37.
`
`This technique was widely used in early high-performance IBM
`
`computers and grew to an industry-wide standard after Motorola’s introduction of
`
`their MECL line of integrated circuits in 1962. See EX1030.
`
`38. Differential signaling confers a significant advantage – greatly
`
`improved immunity to electrical noise that arises from unwanted coupling between
`
`wires – at the cost of often doubling the number of wires and support components
`
`on both the transmitter and receiver side. Every wire operates like a little antenna,
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`picking up small voltage variations from its environment when, say, a nearby wire
`
`changes voltage. Digital circuits can generally ignore small variations of this kind,
`
`but longer wires and environments with more electrical noise can ultimately cause
`
`failures. Differential signaling takes advantage of how nearby wires are affected
`
`almost equally by electrical noise, which can cancel it out by looking at the
`
`difference in voltage between two nearby wires rather than the absolute voltage on
`
`a single wire.
`
`39.
`
`Low-voltage signaling
`
`is advantageous because,
`
`to a
`
`first
`
`approximation, it is faster to make a small change in the voltage on a wire than a
`
`large change. The tradeoff is that low voltages are more subject to the electrical
`
`interference described above, so in general simply reducing switching voltages is
`
`dangerous because it makes a circuit more susceptible to noise, but combining low
`
`voltage swings with differential signaling greatly reduces the noise problem to
`
`produce higher-speed communication, which is almost always the goal.
`
`40.
`
`Engineering electronic circuits
`
`is always a
`
`tradeoff among
`
`performance, cost, power consumption, and numerous other factors. For many years,
`
`low-voltage differential signaling only made sense for expensive high-end
`
`computers where the additional cost and power consumption could be justified.
`
`Later, however, as the need for communication speed increased and the cost of
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`implementing the electrical circuits necessary for this style of communication
`
`dropped, it became more and more common.
`
`41.
`
`For example, one Low-Voltage Differential Signaling (LVDS) standard
`
`was introduced in 1996 (EX1031) as a replacement for the ECL signaling levels that
`
`were previously used for the Scalable Coherent Interface (SCI) standard (EX1032).
`
`Its voltage swing was typically only 0.4V. Another LVDS standard was
`
`ANSI/TIA/EIA-644, approved in 1995 and closely related to the IEEE standard.
`
`42.
`
`In the late 1990s, LVDS technology gained widespread use for digital
`
`video, such as the connections between graphics chips in laptops and the LCD
`
`controllers, which needed very high bandwidth over modest (centimeters) distances.
`
`The technique was later adopted by SATA, SAS, and PCI Express busses.
`
`V.
`
` U.S. 9,703,750
`
`A.
`43.
`
`Summary
`The ’750 describes what today might be thought of as a kind of laptop
`
`dock. It describes a console that provides things like a keyboard and a display into
`
`which plugs a “computing module” (like a laptop without a display or keyboard) that
`
`communicates through an “XP Bus” that serializes parallel PCI bus signals to reduce
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`the number of signal paths between the console and computing module.
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`44.
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`In particular, the ’750 patent is directed to a modular computing
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`environment wherein an interface channel “interfaces two computer interface buses
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`that operate under protocols that are different from that used by the interface
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`channel.” EX1001, 3:20-24. The ’750 patent refers to this interface channel as the
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`XPBus. Id., 15:64-66. The XPBus is a part of the larger XIS Bus. Id., FIG. 6.
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`45.
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`The ’750 patent also discloses that control bits, rather than control
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`signals, are transmitted on the interface channel. Id., 5:49-55. “The fact that control
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`bits rather than control signals are transmitted on the interface channel allows using
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`a smaller number of signal channels and a correspondingly small number of
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`conductive lines in the interface channel than would otherwise be possible.” Id.,
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`5:58-61. The ’750 patent states that this small number of signal channels in turn
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`allows the use of low voltage differential signaling (LVDS) channels for the
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`interface channel. Id., 5:65-67.
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`B.
`46.
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`Person of Ordinary Skill in the Art
`It is my opinion that a person of ordinary skill in the art (“POSITA”) at
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`the time the ’750 Patent was filed, is a person who had at least a Master’s Degree in
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`electrical engineering, computer science, or a related subject, or a Bachelor’s Degree
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`in electrical engineering, computer science, or a related subject and three years of
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`experience working with computer architecture, computer busses, and related
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`technologies. In IPR2021-00604, I was asked to assume a priority date for the ’750
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`Patent of April 15, 2011. However, counsel for Petitioners has asked me to use the
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`May 14, 1999 filing date of the ’750 Patent’s initial non-provisional application as
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`the priority date for this Declaration. As used herein, the term “POSITA” is used to
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`refer to a POSITA at the priority date of the ’750 Patent, which is April 15, 2011. 1
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`47. Based on my professional experience, I have an understanding of the
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`capabilities of a person of ordinary skill in the relevant field. I have supervised and
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`directed many such persons over the course of my career. Further, as detailed in
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`Section I, I myself qualified as at least a POSITA as of the priority date of the ’750
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`Patent.
`
`48.
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`The analysis set forth herein evaluates obviousness and priority issues
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`consistent with the legal principles provided to me by counsel and through the eyes
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`of one of ordinary skill in the art as of the priority date of the ’750 Patent.
`
`C.
`49.
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`Prosecution History
`The ’750 Patent issued on July 11, 2017 from Application No.
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`14/511,093 (the “’093 application”). EX1001, (21). The ’093 application was filed
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`on October 9, 2014, claiming priority to numerous applications. EX1001, (63)(60).
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`1 The phrases “priority date,” “filing date,” “time of the alleged invention,” and the
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`like should be interpreted to mean April 15, 2011 throughout this Declaration unless
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`otherwise indicated.
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`50.
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`The ’750 Patent claims priority as a continuation to eleven parent U.S.
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`patent applications, all of which issued as patents, and to one provisional U.S. patent
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`application. EX1001 (63). The ’750 Patent further has one child U.S. patent
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`application, which has issued as a patent.
`
`51.
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`The oldest non-provisional application (US 09/569,758 (“’758
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`application”) in the ’750 Patent priority chain was filed on May 14, 1999 with a 15-
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`page specification and 4 figures. See EX1009.
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`52.
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`For purposes of this Declaration, I do not dispute whether the applicant
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`actually, at the time the ’758 application was filed, contemplated the alleged
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`inventions later claimed based on the various of disclosures combined into the chain
`
`of applications.
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`VI. CLAIM CONSTRUCTION
`
`53.
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`In my analysis, I have given claim terms their ordinary meaning in light
`
`of the specification. I have considered whether any claim term has been defined in
`
`the specification, and for those terms which lack a definition in the specification, I
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`have similarly applied the ordinary meaning that one skilled in the art would have
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`applied at the time the ’750 Patent was filed.
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`A.
`54.
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`“peripheral bridge”
`The ’750 Patent discloses two types of bridges -- a CPU bridge and a
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`peripheral bridge. Claims 14-17, 29-30 and 42-43 recite a “peripheral bridge.” See,
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`e.g., EX1001, 42:1-10 (“a peripheral bridge directly coupled to the integrated central
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`processing unit and graphics subsystem…”). The ’750 patent repeatedly identifies
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`only one component as a “peripheral bridge” – peripheral bridge 1846. EX1001,
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`33:62-34:3