(12) United States Patent
`Sauber
`
`USOO6600747B1
`(10) Patent No.:
`US 6,600,747 B1
`(45) Date of Patent:
`Jul. 29, 2003
`
`(54) VIDEO MONITOR MULTIPLEXING
`CIRCUIT
`
`(75) Inventor: Wym F. Sauber, Georgetown, TX
`
`(73) Assignee: Dell Products L.P., Round Rock, TX
`(US)
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(*) Notice:
`
`(21) Appl. No.: 09/156,085
`22) Filled
`Se. 17, 1998
`CC
`O
`(22)
`P. lf,
`(51) Int. Cl. ................................................ H04L 12/28
`(52) U.S. Cl. .................. 370,395.64; 370/465; 370/539.
`345/761
`(58) Field of Search
`370/532,537
`370/395 1.395.64. 465,466.539.345 707
`76
`so. 1
`s
`s
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`3,840,702 A 10/1974 Woods .................... 179/1 SW
`5,077.542 A 12/1991 Lanoiselee .................. 332/151
`5,137,022 A 8/1992 Henry .................. 128/419 PT
`5,168.273 A 12/1992 Solomon ............... 340/870.05
`5,311,295 A 5/1994 Tallman et al. ............. 348/180
`5,319,305. A
`6/1994 Baba .......................... 324/115
`
`5,528,309 A 6/1996 Nguyen ...................... 34.8/587
`6,223,283 B1
`4/2001 Chaiken et al. ................ 713/1
`6,373,476 B1 * 4/2002 Dalgleish et al. ........... 345/204
`OTHER PUBLICATIONS
`National Semiconductor, “DS90C363/DS90CF364 +3.3V
`Programmable LVDS Transmitter 18-Bit Flat Panel Display
`(FPD) Link-65 MHz +3.3V LVDS Receiver 18-Bit Flat
`Panel Display (FPD) Link-65 MHz", www.national.com,
`pp. 1-14, Jul. 1997.
`sk -
`cited by examiner
`Primary Examiner Alpus H. Hsu
`ASSistant Examiner. Thien D Tran
`(74) Attorney, Agent, or Firm-Baker Botts L.L.P.
`(57)
`ABSTRACT
`A single group of signals interfaces a computer system to
`either an analog display or a digital display. A video signal
`in digital format and a Video signal in analog format are both
`Supplied to a circuit that multiplexes the digital signal and
`the analog signal, generating an appropriate output Signal for
`the display, either analog or digital, that is coupled to the
`computer System. In one example, the Signal connector
`interfaces the computer System to either an analog CRT
`display or a digital FPD display. The multiplexer multi
`plexes the analog signal and the digital signal Supplied by
`the computer System and generates an output signal that is
`suitable for the CRT display or the FPD display, depending
`on the type of display coupled to the computer System.
`
`23 Claims, 6 Drawing Sheets
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`221
`
`300
`
`
`
`
`
`
`
`MEMORY
`BUS
`
`PROCESSOR
`AND
`CACHE
`
`
`
`
`
`HOSTBUS
`208
`
`MEMORY
`CONTROLLER
`
`210
`PCE BUS
`
`ORPANEL WITH
`ANALOG 17F
`NOTDDC
`
`DIGITAL TO
`DIFFERENTIAL
`
`
`
`VIDEO
`CONTROLLER
`
`BIOS ROM
`POST
`
`
`
`SAMSUNG
`EX 1009, PAGE 1
`
`

`

`U.S. Patent
`
`Jul. 29, 2003
`
`Sheet 1 of 6
`
`US 6,600,747 B1
`
`
`
`
`
`S08 10d
`
`S08
`
`ÁHOWJW
`
`SAMSUNG
`EX 1009, PAGE 2
`
`

`

`U.S. Patent
`
`Jul. 29, 2003
`
`Sheet 2 of 6
`
`US 6,600,747 B1
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`003
`
`000]
`
`01:49
`
`SAMSUNG
`EX 1009, PAGE 3
`
`

`

`U.S. Patent
`
`
`
`
`
`S08 1S0H
`
`HOSS3008'd
`
`
`
`SAMSUNG
`EX 1009, PAGE 4
`
`

`

`U.S. Patent
`
`Jul. 29, 2003
`
`Sheet 4 of 6
`
`US 6,600,747 B1
`
`220
`
`LVDS I/F
`
`4.
`
`LVDSDATAOH
`AWALOGRED
`
`LVDSDATAOL
`)
`ANALOGGREEN
`LVDSDATA 1H K
`ANALOGBLUE
`)
`LVDSDATA1L K
`NCPW4
`)
`| HORIZONIALSYNC )
`LVDSDATA2H
`
`LVDSDATA2L
`
`Pl
`N1
`
`PN2
`
`PIN3
`PIN4
`
`PIN13
`
`PIN14
`
`409
`
`
`
`WIDEO
`CONTROLLER
`
`GPI/O
`
`VCC PIN10
`
`| LVDSCLOCKH
`)
`| GROUNDPIN10
`PIN1 f
`LVDSCLOCK K
`PIN6
`NCPIN11
`PIN7
`H/
`SELECT 408 IANALOGGROUND pins
`ENABLE 407
`GROUND
`PIN5
`DDCVCC
`PN9
`PIN12
`PIN 15
`
`DDCDATA 406
`DDCCLOCK 405
`
`FIG. 4
`
`SAMSUNG
`EX 1009, PAGE 5
`
`

`

`U.S. Patent
`
`Jul. 29, 2003
`
`Sheet 5 of 6
`
`US 6,600,747 B1
`
`220
`LVDS I/F
`
`509
`
`
`
`WIDEO
`CONTROLLE LLER
`
`521
`LVDSDAIAOH N
`AWALOGRED
`)
`WDSDATAOL K
`ANALOGGREEN )
`LVDSDAIA1H K
`AWALOGBLUE
`)
`LVDSDAIA 1L K
`| WCPW4
`)
`LVDSDATA2H K
`| HORIZONIALSYNC )
`
`PIN1
`
`PN2
`
`3
`PIN
`PIN4
`PIN13
`
`510
`
`WCC PIN10
`| LVDSCLOCKH K
`| GROUNDPIN10
`)
`PIN11
`LVDSCLOCKL K
`PIN6
`U NCPIN11
`PIN7
`SELECT 508 IANALOGGROUND PINs
`ENABLE 507
`GROUND
`PIN5
`DDCWCC
`PIN9
`PIN12
`PIN 15
`
`FIG. 5
`
`SAMSUNG
`EX 1009, PAGE 6
`
`

`

`U.S. Patent
`
`Jul. 29, 2003
`
`Sheet 6 of 6
`
`US 6,600,747 B1
`
`RESET
`
`605
`
`DSABLE
`
`EDD-LCD
`
`603
`
`604
`
`F.G. 6
`
`RESET
`
`PW10 = 1
`
`701
`
`DISABLE
`
`
`
`
`
`
`
`PIN 10 ISTED TO GROUND
`(PIN 5) IN THE VGA CABLE
`PW10-0 PIN 10 ISOPEN IN THE
`LCD CABLE
`
`703
`
`702
`
`704
`
`FIG. 7
`
`SAMSUNG
`EX 1009, PAGE 7
`
`

`

`1
`VIDEO MONITOR MULTIPLEXING
`CIRCUIT
`
`US 6,600,747 B1
`
`BACKGROUND
`
`1. Field of the Invention
`The present invention relates to interfaces between com
`puters and Video monitors, and more particularly to an
`interface that multiplexes analog and digital Signals for the
`purpose of using one Set of lines between a computer System
`and either an analog monitor or a digital monitor.
`2. Description of the Related Art
`The Substantial growth of the personal computer is due, in
`part, to the technological breakthroughs in computer design.
`A typical personal computer System available today includes
`a plethora of peripheral devices undreamed of in years past.
`Today a computer System available to a typical consumer
`might include a System processor, associated memory and
`control logic, and a number of peripheral devices, including
`a display monitor, a keyboard, a mouse-type input device,
`floppy and hard disk drives, CD-ROM drives, a laser printer,
`a color Scanner, a modem, network capabilities and even a
`Voice recognition device.
`An important peripheral available in a personal computer
`system is the video monitor. From the time of the television
`Set to today's newer digital-type displays, technology has
`expanded the capabilities of Video monitors. As a result of
`technological breakthroughs in Video monitors, higher
`resolutions, faster refresh rates, and different types of Video
`monitors are available at reasonable prices. One type of
`Video monitor, the digital Video monitor, has been improved
`upon and is becoming increasingly popular. A typical com
`puter System may provide a connector for both digital and
`analog video monitors. What is needed is one set of lines that
`can connect either a digital or an analog video monitor to a
`computer System.
`
`15
`
`25
`
`35
`
`SUMMARY
`A connector with a Single set of Signal lines interfaces a
`computer System to either an analog display or a digital
`display. A video signal in digital format and a video signal
`in analog format are both Supplied to a circuit that multi
`plexes the digital Signal and the analog signals, generating
`appropriate output Signals for the display, either analog or
`digital, that are coupled to the computer System.
`In one example, the Set of Signals interfaces the computer
`System to either an analog cathode ray tube (CRT) display or
`a digital flat panel display (FPD). The multiplexer multi
`plexes the analog signal and the digital signal Supplied by
`the computer System and generates an output signal that is
`suitable for the CRT display or the FPD display, depending
`on the type of display coupled to the computer System.
`In one embodiment of the present invention, an apparatus
`includes a Video controller, a connector and a circuit coupled
`to the Video controller and coupled to the connector, the
`circuit Selectively coupling one of either an analog video
`Signal and a digital video signal received from the Video
`controller to a Video monitor. In another embodiment, an
`apparatus includes a Switch, a first input terminal coupled to
`the Switch for receiving an analog signal, a Second input
`terminal coupled to the Switch, for receiving a differential
`digital signal, and an output terminal coupled to the Switch,
`the Switch for multiplexing the analog signal and the dif
`ferential digital Signal, and the output terminal for Supplying
`a multiplexed signal. In a further embodiment, a computer
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`System includes a processor, a Video monitor coupled to the
`processor, a controller, and a circuit coupled to the Video
`controller and coupled to the connector, the circuit Selec
`tively coupling one of either an analog video signal and a
`digital Video signal received from the Video controller to a
`Video monitor.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`The present invention may be better understood, and its
`numerous objects, features, and advantages made apparent
`to those skilled in the art by referencing the accompanying
`drawings. The use of the same reference Symbols in different
`drawings indicates Similar or identical items.
`FIG. 1, labeled prior art, illustrates a conventional inter
`face between a computer System and either an analog
`monitor or a digital monitor.
`FIG. 2 is a block diagram illustrating a computer System
`including an interface between either an analog or a digital
`monitor and the rest of the computer System according to an
`embodiment of the present invention.
`FIG. 3 is a block diagram illustrating a computer System
`including an interface between either an analog or a digital
`monitor and the rest of the computer System according to a
`Second embodiment of the present invention.
`FIG. 4 is a Schematic circuit diagram illustrating a circuit
`Suitable for use as an interface between a computer System
`and either an analog or a digital monitor as shown in FIG.
`2.
`FIG. 5 is a Schematic circuit diagram illustrating a circuit
`Suitable for use as an interface between a computer System
`and either an analog or a digital monitor as shown in FIG.
`3.
`FIG. 6 is a state diagram that illustrates a first suitable
`method for controlling the interface shown in FIG. 2 to
`Select the type of monitor coupled to the computer System.
`FIG. 7 is a State diagram chart that illustrates a Second
`suitable method for controlling the interface shown in FIG.
`3 to Select the type of monitor coupled to the computer
`System.
`
`DETAILED DESCRIPTION
`The following description is intended to be illustrative of
`the invention and should not be taken to be limiting.
`In a color display device such as an FPD or a CRT display,
`Video display characteristics are typically provided by a
`Display Data Channel (DDC) signal upon power-up. ADDC
`monitor generally includes an Electrically Erasable Pro
`grammable Read Only Memory (EEPROM), which stores
`Video display characteristics in a data format called
`Extended Display Identification Data (EDID) developed by
`VESA (Video Electronics Standards Association). The cur
`rent EDID data format is described in Extended Display
`Identification Data Standard, Version 2, Revision 0, dated
`Apr. 9, 1996, the disclosure of which is expressly incorpo
`rated herein by reference.
`Referring to FIG. 1, a System block diagram of a computer
`system 100 is presented. This typical computer system 100
`includes a processor and cache 103 electrically coupled to a
`memory controller 119 via a host bus 108. The memory
`controller 119 is further coupled to memory 105 through a
`memory bus 106. The memory controller 119 is further
`coupled to slots 115, video controller 109 and input/output
`control (I/O controller) 107 via a PCI (Peripheral Compo
`nent Interconnect) bus 110. The I/O controller 107 is elec
`trically coupled to a Super input/output controller (Super I/O
`
`SAMSUNG
`EX 1009, PAGE 8
`
`

`

`US 6,600,747 B1
`
`15
`
`40
`
`45
`
`25
`
`3
`Controller) 114 and to Basic Input/Output System (BIOS)
`113 through an ISA (Industry Standard Architecture) bus
`112.
`Upon startup of the computer system 100, the system
`Power On Self Test (POST) program, typically stored in
`BIOS Read Only Memory (ROM) 113, receives EDID
`information which is sent from an EEPROM located in a
`DDC monitor that includes either a panel display 111 or a
`CRT display 112 through the video controller 109 to the
`processor 103 of a computer system 100, which reads the
`information provided in an EDID format. The EDID format
`information is processed during System Setup and the run
`ning of the POST program. The processor 103 interfaces
`with a video controller 109 which is programmed according
`to monitor characteristics.
`Monitor characteristics and information in EDID format
`may include an identification code for the monitor defined
`by the system manufacturer. Once the computer system 100
`obtains monitor identification information, the Video con
`troller 109 is programmed as directed by the stored charac
`teristics of the coupled monitor.
`The video controller 109 generally transmits both digital
`and analog signals. For a CRT 112, the video controller 109
`transmits analog Signals by first converting a digital video
`Signal through a digital-to-analog converter (DAC), not
`expressly shown. For an FPD 111, the video controller 109
`transmits digital signals without first converting the Signal.
`In a typical desktop computer system 100, the video con
`troller 109 is generally set up for a CRT display 112. In a
`typical notebook or laptop computer System the Video con
`troller 109 is generally set up for a digital FPD display 111.
`For many years the only type of monitor used with
`desktop computer Systems was the CRT. Currently, however,
`designers of desktop computer Systems Supply both CRT
`35
`and FPD capable Systems. One conventional technique,
`illustrated in FIG. 1, Supports both FPD displays and CRT
`displays by Supplying respective analog signals and digital
`signals to separate interfaces 125 and 126. The method is
`disadvantageous because the system 100 will have two sets
`of Signal lines output from the Video controller and two
`COnnectOrS.
`Another method for providing both digital and analog
`signals to either a CRT or FPD display is to attach an
`analog-to-digital converter (ADC) at the input terminal of an
`analog interface on an FPD display. A problem with this
`method is that the additional conversion degrades the image
`quality of the video. Another problem with this method is
`that it adds additional cost to the System.
`Referring to FIG. 2, a block diagram illustrates a com
`50
`puter system 200 in which a monitor selected from either an
`analog DDC monitor or a digital DDC monitor is coupled to
`the rest of the computer system 200. Like the computer
`system 100 shown in FIG. 1, the computer system 200
`includes a CPU or system processor and cache 203 that is
`electrically coupled to a memory controller 219 through a
`host bus 208 and to memory 205 through the memory
`controller 219 and a memory bus 206. As in FIG. 1, the
`memory controller 219 is electrically coupled to a video
`controller 209 via a PCI bus 210. A video interface circuit
`including an analog multiplexer 221 and a digital to differ
`ential circuit 220 is electrically coupled to a video controller
`209 and to a video monitor, either a digital video monitor
`211 such as a FPD or an analog video monitor 212 such as
`a CRT display. The video controller 209 receives DDC
`65
`signals from the video monitor. The multiplexer 221 and the
`digital to differential circuit 220 receive electrical signals
`
`55
`
`60
`
`4
`from the video controller 209. The digital to differential
`circuit 220 may include a Low Voltage Differential Signal
`ing (LVDS) transmitter or another suitable transmitter, such
`as a transmitter for Transition Minimized Differential Sig
`naling (TMDS) based on PANELLINK technology devel
`oped by SILICON IMAGE, located in Palo Alto, Calif., or
`such as an optical transmitter. One type of LVDS transmitter
`that is suitable for usage with the computer system 200 is a
`DS90C363 integrated circuit manufactured by National
`Semiconductor, Inc.
`Referring to FIG. 2 in combination with FIG. 4, the
`illustrative System shows a Video monitor, either an analog
`video monitor 211 or a digital video monitor 212, electri
`cally coupled to the video controller 209. The video monitor,
`either analog video monitor 211 or digital video monitor
`212, is a Display Digital Channel (DDC) monitor with an
`EEPROM that supplies data in the Extended Display Iden
`tification Data (EDID) format. As discussed earlier, the
`Video controller is programmed according to the EDID
`monitor characteristics. This information is initially Supplied
`through a DDC data line 406 and a DDC clock line 405 from
`the video monitor to the video controller 209 before being
`read by the processor 203.
`Digital signals generated by the video controller 209 are
`electrically coupled to the digital to differential circuit 220
`that converts 18 bits of Red/Green/Blue (RGB) data and 3
`bits of Liquid Crystal Display (LCD) timing and control
`data, for a total of 21 bits of CMOS/TTL data into three
`LVDS data streams, and a fourth phase-locked transmit
`clock line. The three data Streams and the clock line are then
`electrically coupled to an analog multiplexer 221. Analog
`signals received from the video controller 209 are also
`electrically coupled to the analog multiplexer 221. In the
`video controller 209, only the digital signals are received by
`a digital to analog converter.
`The analog multiplexer 221 is a high bandwidth, low
`resistance analog multiplexer. A Suitable multiplexer is a
`P15V330 integrated circuit manufactured by Pericom, Inc.
`A Standard VGA connector is one type of connector
`Suitable to electrically connect the output signal from the
`analog multiplexer 221, the DDC clock line 405 the DDC
`data line 406 to a video monitor, either the analog monitor
`211 or the digital monitor 212.
`Although FIG. 2 shows the multiplexer 221 and digital to
`differential circuit 220 as separate from the video controller
`209, other embodiments may include both the multiplexer
`221 and the digital to differential circuit 220 as part of the
`video controller 209.
`Referring to FIG.4, a Schematic circuit diagram illustrates
`an analog multiplexer 421 Suitable for usage as an interface
`between either an analog or a digital monitor and the rest of
`a computer System. The analog multiplexer 421 is coupled
`to receive both digital and analog Signals from the Video
`controller 209. A Suitable video controller for use with an
`embodiment described by the claims is the NM2160, manu
`factured by NeoMagic Inc. Some video controllers could
`have both an analog and a digital output and Support either
`or both LVDS and TMDS.
`In one embodiment as shown in FIG. 4 in combination
`with FIG. 2, a select line 408 and an enable line 407 for the
`analog multiplexer 421 are electrically coupled between the
`analog multiplexer 421 and a general purpose input/output
`(GPIO) signal line from the I/O Control 207. The video
`controller 209 is electrically coupled to either an analog
`video monitor 211 or a digital video monitor 212 through
`cabling that transmits both a data line DDCDATA 406 that
`
`SAMSUNG
`EX 1009, PAGE 9
`
`

`

`US 6,600,747 B1
`
`15
`
`25
`
`S
`receives EDID data from the video monitor, (either the
`analog monitor 211 or the digital monitor 212) and a clock
`line, DDCCLOCK 405. The EDID data is received by the
`video controller 209.
`AS discussed earlier, the video controller 209 and the
`System processor 203 are electrically coupled through the
`PCI bus 210, the memory controller 219 and the host bus
`208. The EDID data is electrically transmitted to the pro
`cessor 203 for interpretation. The interpreted EDID data is
`used to Set up the General Purpose input/output lines output
`from the input/output controller 207 and electrically coupled
`to the SELECT 4.08 to select either the analog lines in the
`multiplexer 209 or the digital to differential lines output
`from the LVDS interface 420. The interpreted EDID data is
`used to control the General Purpose input/output lines, and
`is also used to ENABLE 407 the multiplexer after a type of
`monitor has been selected. The SELECT 4.08 and ENABLE
`407 lines, in alternate embodiments, could be taken from a
`Suitable video controller.
`The digital to differential circuit 220 shown in FIG. 2 is
`shown in FIG. 4 as LVDS interface 420. In other
`embodiments, however, the LVDS interface could be
`replaced by a TMDS interface.
`Referring to FIG. 6 in combination with FIGS. 2 and 4, a
`State diagram illustrates a first Suitable method for control
`ling the interface to Select the type of monitor coupled to the
`computer System in a method that is controlled by the Video
`controller 209, the processor 203, and the I/O controller 207.
`In Step 601, the video controller in cooperation with the
`processor detects during the POST operation whether a
`digital or analog video monitor is installed. In the illustrative
`technique, the display 211 or 212, sends the EDID format
`information to the system POST program 213 running on the
`processor 203 via a DDCDATA line 406 through the video
`controller 209. The processor 203 interfaces with the video
`controller 209 which is programmed according to monitor
`characteristics. The processor 203 also interfaces with the
`I/O controller 207 which selects either an analog signal or a
`digital Signal by Selectively performing either Step 602
`SELECT VGA or step 603 SELECT LCD. Upon selection,
`the enable line to the analog multiplexer 221 will enable
`communication of either analog signals or digital Signals.
`Referring to FIG. 7 in combination with FIG. 3, a flow
`chart illustrates a Second Suitable method for controlling the
`interface to Select the type of monitor coupled to the
`computer system 300. In the second illustrative method the
`monitor is a non-DDC monitor. Thus, unlike the first illus
`trative method, neither the analog video monitor 311 nor the
`digital video monitor 312 shown in FIG. 3 is a DDC monitor.
`Referring to FIG. 5 and FIG. 3, the embodiment now under
`consideration does not use DDCDATA line 406, or DDC
`50
`CLOCK 405. Instead, as shown in FIG. 5 and in FIG. 7, Pin
`10 (labeled 510) of the analog multiplexer 521 shown in
`FIG. 5 is electrically coupled between the analog multi
`plexer 521 and either the analog video monitor 311 or the
`digital video monitor 312. The digital monitor 311 has a
`cable with Pin 10 (labeled 510) open, and the analog monitor
`312 has a cable with Pin 10 (labeled 510) grounded. If the
`voltage on Pin 10510 is HIGH, the select line on the analog
`multiplexer 521 Selects a digital interface. If the Voltage on
`Pin 10510 is LOW, the select line on the analog multiplexer
`521 selects an analog interface. Similar to the above
`described embodiment, once the Select line chooses an
`analog or a digital interface, the enable line 507 tied to pins
`in the analog multiplexer 521 enables the Selected analog or
`digital interface.
`While the invention has been described with reference to
`various embodiments, it will be understood that these
`
`6
`embodiments are illustrative and that the Scope of the
`invention is not limited to them. Many variations,
`modifications, additions and improvements of the embodi
`ments described are possible. Variations and modifications
`of the embodiments disclosed herein may be made based on
`the description Set forth herein, without departing from the
`Scope and Spirit of the invention as Set forth in the following
`claims.
`What is claimed is:
`1. An apparatus comprising:
`a Video controller operable to generate at least two Video
`Signals, the at least two Video Signals including an
`analog video signal and a digital Video signal;
`a connector operable to provide a plurality of pins for
`attaching a Video monitor thereto, the connector oper
`able to receive a monitor identification information
`from the Video monitor on at least one of the pins,
`a circuit coupled to the video controller and coupled to the
`connector, the circuit operable to receive the at least
`two video signals from the video controller and the
`monitor identification information from the connector;
`and
`the circuit operable to use the monitor identification
`information to Selectively couple one of the at least two
`Video signals to the connector.
`2. An apparatus comprising:
`a Video controller operable to generate at least two Video
`Signals, the at least two Video Signals including an
`analog video signal and a digital Video signal;
`a connector operable to provide a plurality of pins for
`attaching a Video monitor thereto;
`a circuit coupled to the video controller and coupled to the
`connector, the circuit operable to receive the at least
`two Video Signals from the Video controller, wherein
`the circuit Selectively couples one of the at least two
`Video signals to the connector based on the electrical
`Signal of at least one of the connector pins,
`one of a multiplexer coupled between the Video controller
`and the connector and a multiplexer incorporated into
`the Video controller and electrically coupled to the
`connector, the multiplexer comprising:
`Select lines for Selecting one of digital Signal data lines,
`analog signal data lines, and null lines, and
`a plurality of Switches, and
`one of a digital to differential circuit coupled between the
`Video controller and the multiplexer and a digital to
`differential circuit incorporated into the Video control
`ler and electrically coupled to the multiplexer.
`3. The apparatus of claim 1 wherein the video monitor is
`Selected from a group comprising:
`a DDC monitor;
`a DDC compatible monitor; and
`a monitor compatible for use with a DDC emulator.
`4. The apparatus of claim 1 wherein the video controller
`comprises:
`a digital to analog converter;
`a memory;
`an imaging circuit; and
`a display refresh circuit.
`5. An apparatus comprising:
`a Switch;
`a first input terminal coupled to the Switch for receiving
`an analog signal;
`a Second input terminal coupled to the Switch for receiv
`ing a differential digital Signal;
`
`35
`
`40
`
`45
`
`55
`
`60
`
`65
`
`SAMSUNG
`EX 1009, PAGE 10
`
`

`

`US 6,600,747 B1
`
`1O
`
`15
`
`40
`
`45
`
`25
`
`7
`an output terminal coupled to the Switch, the Switch for
`multiplexing the analog signal and the differential
`digital signal, and the output terminal for Supplying a
`multiplexed signal to a Video monitor; and
`a Video controller communicatively coupled to the Switch,
`the Video controller operable to receive monitor iden
`tification information from the video monitor to control
`whether the analog signal or the differential digital
`Signal is Supplied as the multiplexed signal.
`6. The apparatus of claim 5 further comprising a multi
`plexer having a Select line coupled to a general purpose
`input/output line.
`7. The apparatus of claim 5 further comprising a multi
`plexer having a Select line coupled to the Video controller.
`8. The apparatus of claim 7 further comprising:
`a digital to differential circuit that receives a digital Video
`signal from the video controller and outputs the differ
`ential digital Signal to the multiplexer.
`9. The apparatus of claim 7 further comprising:
`a digital to analog converter that receives a digital Video
`Signal from the video controller and Sends an analog
`Video signal to the multiplexer.
`10. The apparatus of claim 7 wherein the multiplexer is
`connected to a connector coupled between the Video monitor
`and the multiplexer.
`11. The apparatus of claim 10 wherein the video monitor
`is Selected from a group comprising:
`a digital Video monitor; and
`an analog video monitor.
`12. The apparatus of claim 11 wherein the video monitor
`is a Display Data Channel (DDC) monitor including a DDC
`clock line and a DDC data line.
`35
`13. The apparatus of claim 12 wherein the DDC clock line
`and the DDC data line are coupled to the video controller.
`14. The apparatus of claim 13 wherein the video control
`ler reads the DDC data line in the format of Extended
`Display Identification Data (EDID), and outputs one of an
`electrical Signal indicating a digital code to the apparatus as
`the Select line and an electrical signal indicating an analog
`code to the apparatus as the Select line.
`15. The apparatus of claim 11 wherein the select line of
`the multiplexer tests the Voltage on an electrical line
`between the multiplexer and the connector to determine
`whether or not the Video signal is analog or digital.
`16. A computer System comprising:
`a processor operable to couple to a controller through a
`bus,
`a Video monitor coupled to the processor through the
`controller via the bus;
`the controller operable to generate at least two Video
`Signals, the at least two video signal including an
`analog video signal and digital Video signal;
`a circuit coupled to the controller and coupled to the Video
`monitor, the circuit operable to receive the at least two
`Video signals from the controller; and
`the circuit receives monitor identification information
`from the video monitor via the bus to selectively couple
`one of the at least two Video Signals.
`17. The computer system of claim 16 wherein the con
`troller is a video controller.
`
`50
`
`55
`
`60
`
`8
`18. A computer System comprising:
`a processor operable to couple to a Video controller
`through a bus,
`a Video monitor coupled to the processor through the
`video controller via the bus;
`the Video controller operable to generate at least two
`Video signals, the at least two Video signal including an
`analog video signal and digital Video signal;
`a circuit coupled to the video controller and coupled to the
`Video monitor, the circuit operable to receive the at
`least two Video signals from the Video controller,
`wherein the circuit Selectively couples one of the at
`least two Video signals to the connector based on
`information received from the video monitor via the
`bus,
`the circuit includes a multiplexer coupled between the
`Video controller and the connector, the multiplexer
`comprising:
`Select lines for Selecting one of digital Signal data lines,
`analog signal data lines, and null lines, and
`a plurality of low resistance, high bandwidth analog
`Switches,
`a digital to differential circuit coupled between the Video
`controller and the multiplexer; and
`a digital to analog converter coupled between the Video
`controller and the multiplexer.
`19. The computer system of claim 17 wherein the video
`controller is Selected from the group consisting of a text
`display adapter, a graphics adapter, a 3-D graphics adapter,
`a SVGA display adapter, an XGA adapter, a display adapter
`Supporting VESA graphics Standards, a CGA adapter, and an
`adapter Supporting Hercules graphics standards.
`20. The computer system of claim 17 wherein the video
`monitor is one of a digital Video monitor and an analog video
`monitor.
`21. The computer system of claim 17 wherein a multi
`plexer receives both a digital and an analog video signal and
`Sends one of a digital and analog video signal to the
`connector coupled between the multiplexer and the Video
`monitor.
`22. A method for multiplexing an analog Signal and a
`digital signal, the method comprising:
`receiving an analog Signal from a Video controller at a
`multiplexer;
`receiving a digital Signal from the Video controller at the
`multiplexer;
`receiving monitor identification information from a Video
`monitor at the multiplexer;
`in response to receiving the monitor identification
`information, automatically determining whether the
`Video monitor uses the digital Signal or the analog
`Signal; and
`in response to determining, automatically connecting
`either the digital Signal or the analog signal to the Video
`monitor.
`23. The method of claim 22 wherein the digital signal is
`one of a Low Voltage Differential Signaling (LVDS) inter
`face and a Transition Minimized Differential Signaling
`(TMDS) interface.
`
`SAMSUNG
`EX 1009, PAGE 11
`
`