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`Ex. 1011, Page 185
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`Ex. 1011, Page 185
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`

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`Ex. 1011, Page 186
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`Ex. 1011, Page 186
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`

`

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`x. 1011, Page 187
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`Ex. 1011, Page 187
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`

`

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`Tbs DRAWINGS
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`Ex. 1011, Page 188
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`Ex. 1011, Page 188
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`Ex. 1011, Page 189
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`Ex. 1011, Page 189
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`

`

`
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`{fin-or memcs
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`Ex. 1011, Page 190
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`Ex. 1011, Page 190
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`

`

`{£15765 nmwmcs
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`Ex. 1011, Page 191
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`Ex. 1011, Page 191
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`Ex. 1011, Page 192
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`Ex. 1011, Page 192
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`

`

`no: DRAWINGS
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`Ex. 1011, Page 193
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`Ex. 1011, Page 193
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`

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`inf-or memcs
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`Ex. 1011, Page 194
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`

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`Ex. 1011, Page 195
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`Ex. 1011, Page 195
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`

`

`
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`m7.105 DRAWINGS
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`Ex. 1011, Page 196
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`Ex. 1011, Page 196
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`

`

`
`Efiwbs DRAM'
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`Ex. 1011, Page 197
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`Ex. 1011, Page 197
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`

`

`Ex. 1011, Page 198
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`Wm
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`Ex. 1011, Page 198
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`

`

`
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`Ex. 1011, Page 199
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`Ex. 1011, Page 199
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`Ex. 1011, Page 200
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`Ex. 1011, Page 200
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`

`

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`‘Acm :03 ans Coman-no;rm mm (‘3: pm):
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`Ex. 1011, Page 201
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`Ex. 1011, Page 201
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`

`

`
`,
`i-rr-br DRAWINGS ’
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`
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`Ex. 1011, Page 202
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`Ex. 1011, Page 202
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`

`

`W‘
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`LINT OF DRAW [NOS
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`5 ORIGINALL? [MD
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`Ex. 1011, Page 203
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`Ex. 1011, Page 203
`
`

`

`
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`Ex. 1011, Page 204
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`Ex. 1011, Page 204
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`Ex. 1011, Page 205
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`Ex. 1011, Page 205
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`Ex. 1011, Page 206
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`Ex. 1011, Page 207
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`Ex. 1011, Page 207
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`Ex. 1011, Page 203
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`Ex. 1011, Page 208
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`Ex. 1011, Page 209
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`Ex. 1011, Page 209
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`Ex. 1011, Page 210
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`Ex. 1011, Page 211
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`Ex. 1011, Page 211
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`733165 DRAWINGS
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`Ex. 1011, Page 212
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`Ex. 1011, Page 212
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`Ex. 1011, Page 213
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`Ex. 1011, Page 213
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`Ex. 1011, Page 214
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`Ex. 1011, Page 214
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`Ex. 1011, Page 215
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`Ex. 1011, Page 215
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`

`

`
`T'OF DRAWINGS
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`Ex. 1011, Page 216
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`Ex. 1011, Page 216
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`Ex- 1011. Page 217
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`Ex. 1011, Page 217
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`Efifi‘os DRAWINGS
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`Ex. 1011, Page 218
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`Ex. 1011, Page 218
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`{13:16: DRAWINGS
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`FiGuRE 35»
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`Ex. 1011, Page 219
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`FiGuRe 36
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`FIGURE 37
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`Ex. 1011, Page 221
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`Ex. 1011, Page 221
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`Enos mu!wmcs
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`lcontrol/ID :
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`Ex. 1011, Page 222
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`Ex. 1011, Page 222
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`W n
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`Ex. 1011, Page 223
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`Ex. 1011, Page 223
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`Tor DRAWINGS
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`mommy nun .
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`.m' 43‘: 'm “V"
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`33 Mb: PCI Writetransaction.
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`Ex. 1011, Page 224
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`Ex. 1011, Page 224
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`Ex. 1011, Page 225
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`Ex. 1011, Page 225
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`.1:“‘3'...I...““weI::1u"MI14
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`Ex. 1011, Page 226
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`Ex. 1011, Page 226
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`Peripheral to Host: PCI Master (on XPBus) Control data packets with PQI response:
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`Ex. 1011, Page 228
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`Ex. 1011, Page 228
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`RINTor n‘ wmcs
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`HTC2 is reserved for futm'e use.
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`HGMKE Ll;
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`Ex. 1011, Page 229
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`Ex. 1011, Page 229
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`PCI Control Se-« ent ”KEE- reserved
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`Bufi‘erFulH mmW
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`Ex. 1011, Page 230
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`System Error. HIC asserts SERR# under the following conditions:
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`Address parity error, Secondary bus SERRll asserted,
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`Delayed read or write transaction discarded, and
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`Request for bus. Ifa target retry or disconneet'is received'in response to initiating
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`GNT#
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`Bus is granted to HIC. HIC can initiate transaction ifGNT# is asserted and the
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`bus is idle. When HIC is not requesting bus and GNT# is asserted, HIC must
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`drive AD, C/BE, and PAR to valid logic levels.
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`Input indicating clock status. HIC can request the central clock resource-to start,
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`speed up or maintain the PCI clock. There are 3 clocking states:
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`Clock running, Clock about to stop/slow down, and Clock stopped/slowed
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`PCI Clock Allinputs are sampled on the rising edge of PCICK Frequency range
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`from 0 to 33Mhz.
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`CLKRUN#
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`PCICK
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`FIGURE 47
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`Ex. 1011, Page 231
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`Ex. 1011, Page 231
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`@105 memcs‘
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`\s ORIGINALLY ,WV’
`im
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`Peripheral ClockDifi‘erenfial Sigflal Pair Output to XPBus
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`peripheral ClockDifi‘erential Signal Pair Input from XPBuS'
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`I. Peripheral pmDifi‘erential Signal Pair Inpur'trom XPBus
`Peripheral Control Differential Signal Pair Input from XPBus
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`Ex. 1011, Page 232
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`Ex. 1011, Page 232
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`

`

`
`iifiwos DRAWINGS
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`
`us omcmuvrfl-D‘
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`“
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`XIS Bus Video Port Signals
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`_ FIGURE Ll"?
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`,WNW
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`Ex. 1011, Page 233
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`Ex. 1011, Page 233
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`EMT-Or DRAWINGS
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`s ORIGINALLY my!
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`Video Port Signfls
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`Ex. 1011, Page 234
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`Ex. 1011, Page 234
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`W A
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`LLY [11:31)
` I “”4
`.w. c.1411“ ‘
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`Test Port (JTAG) Signals
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`....xxum»;i2...»u‘.2..,muu..6”iii}...nu(hm.II..."R..."-’:...l'HHI!"'6...“H...“
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`mp:-u“umun...!i'lml‘film“‘1...“
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`chyu R E 5.7,.
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`Ex. 1011, Page 235
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`Ex. 1011, Page 235
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`

`

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`3‘70: nmw‘fifi‘s’
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`s omcmfllflkm
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`3:111:21“sz
`1..5 {7.1: .
`' "w ,»'- ‘-.~-
`" '
`'
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`CPU Signals
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`—_
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`-[--
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`maul—u—
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`—_—
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`mI-M
`.-:=.II:IIi!l':"=hullK...“
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`m_
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`mm—
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`ELI--
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`m-I-
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`__-
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`E5
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`&
`Ex. 1011, Page 236
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`Ex. 1011, Page 236
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`

`

`
`Enos 0mm?
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`5 omquauv mmxl‘l‘cflv
`\
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`,..,.‘
`._
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`£2:
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`'.
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`North Bridge Signals
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` sussrATw
`PHI..DA#'
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`/
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`Ex. 1011, Page 237
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`Ex. 1011, Page 237
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`

`

`
`
`
`r‘or DRAWINGS
`
`NGP‘ALPY H9?“
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`1-4-30
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`..
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`‘ GPIO Sigdals
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`,_—_
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`m-E-l- crmsm-cwcrockswwwom
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`(mom __ pc1_s"rp#‘— PCI Clock Stop (optional)
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`_Ifi-_ General Mose InPUt/WPUtSisws
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`.
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`--F)"GU(KE SS ._
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`Ex. 1011, Page 238
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`Ex. 1011, Page 238
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`

`

`W-
`
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`PRINT0? DRAWUV'GS
`
`
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`ks ORIGINALLY FILED
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`
`
`
`ERROR/RESET Signals
`
`ESTER
`
`
`
`gum
`4
`
`Signal um (‘01-sz from Host, Padty error for PIC transmission, &
`
`no connect detection
`Signal um for: Rout fi'om Pgfiphcml, Parity error for HIC
`transmission, No connect detection
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`H‘GMKE SC,
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`Ex. 1011, Page 239
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`Ex. 1011, Page 239
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`_——-
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`II».—
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`m_—
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`:: voccvm —I-a__
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`l-m—-
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`'2 —I-_'H_V
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`W I
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`PRINT 0F DRAW [365
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`_-\S ORIGINALLY ml)
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`Power/Ground/OSC input Signals
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`Ex. 1011, Page 240
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`Ex. 1011, Page 240
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`

`

`
`Notebook P9
`
`:00
`
`High Pin Count
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`
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` 4 Secondary POI Bus.
`
`
`‘P'CI
`Devioe1,
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`
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`Ex. 1011, Page 241
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`Ex. 1011, Page 241
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`

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`..
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`‘200‘
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`Ex. 1011, Page 242
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`Ex. 1011, Page 242
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`

`

`Computing System
`
`signals
`
`North Bridge's Pdmary PCI Bus
`
`POI Bus Bridge with
`Interface Dev. Pair
`:
`1“ And PBus
`
`Board 2 ,
`
`Peripherals Isterril
`
`CPU/NB l
`IL_-——
`signals
`
`Secondary bCI Bue
`
`PCl'Add-on
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`Ex. 1011, Page 243
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`Ex. 1011, Page 243
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`

`

`
`Computing System
`
`Graphics
`Subsystem
`
`Integrated
`
`Host
`Interface
`
`Cntlr. & .
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`North Bndge
`
`
`
`Integrated
`Peripheral
`Cntlr. 8.
`Interface
`8. Bridge
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`
`. 90;
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`0
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`Ll I
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`Ex. 1011, Page 244
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`Ex. 1011, Page 244
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`

`

`
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`Wan), p'cua
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`
`:
`5%
`
`505'
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`
`‘
`Host _
`lnlarfaca
`Connolly
`
`Pedpheral
`Inlelfeoo
`6mm
`
`
`
`:illL.lilllu1122333:13?"HiI!"ui...§l
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`
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` :13"
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`ii
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`'-
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`Ex. 1011, Page 245
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`Ex. 1011, Page 245
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`

`

`
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`m “I
`!- Cntl
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`I fill”
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`Flash Memory
`BIOSI
`Configuration
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`r-Ill-
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`XPBus
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`Parallel to
`serial .l
`Converter
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`ParalleltoSeriala.
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`Converter
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`RESET#
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`PCNR
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`Encoder &
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`Merge
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`Data Path
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`Serial to
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`Parallel
`Converter
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`CPU CNTL
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`
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`& GPIO
`
`Latch/Driver
`
`
`______________________
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`
`Receiver
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`Parallel
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`
`vldeo Port Control
`Convener
`
`
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`Nonh'
`Bridge
`
`‘
`Graphics
`Controller
`
`
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`
`
`ézl
`
`
`VPD (fl/
`
`,
`l
`I
`‘
`’
`’
`VPCKI
`l
`lJ
`
`FlGuK-E Q
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`Ex. 1011, Page 246
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`Ex. 1011, Page 246
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`

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`Ex. 1011, Page 247
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`Ex. 1011, Page 247
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`

`

`
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`HIC as Master
`
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`
`
`Prima
`PCI Bus ‘
`
`lam—-
`Controxsmn
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`
`W——
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`
`
`
`Y#
`———-- .
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`———
`m—
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`DEVSEL#
`~ “——
`_
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`
`Local
`r - handles locall
`STOP#
`- _
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`
`
`
`
`Encode
`Pan for NC D/BE —
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`
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`
`
`IDSEL
`Used local!
`for confi. 0
`-
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`
`
`
`ft
`_W—
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`_ _
`Decode
`Address/S stem Pan Error
`V
`0
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`
`
`Decode PCI device can end RE. #— BIC contmue to be Master
`IE].
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`
`
`_mm_— Arbiter 2 = t bus to HIC
`Arbiter can deassert GNT#
`
`
`ST
`—— hide-.endentsinal
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`‘
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`r
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`Figuka'B
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`Ex. 1011, Page 248
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`Ex. 1011, Page 248
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`i1:"Mi2...:1
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`f3.-
`*l‘fi
`25:
`1.3
`=. aa:
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`==.
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`1;
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`Ex. 1011, Page 249
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`Ex. 1011, Page 249
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`

`

`A33
`J
`
`x:
`53:
`E
`‘35
`
`
`{"459|ll1!"(1...““mil
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`

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`
`P004
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`§‘5‘ aE
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`
`
`
`
`FRAME l0
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`Ex. 1011, Page 250
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`Ex. 1011, Page 250
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`

`

`
`
`Flash Memory 5
`(Optional)
`
`I I O )
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`Converter
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`Converter
`
`
`"""""""""
`
`A .
`
`
`
`
`l I 6 0
`
`32:;
`
`
`
`'
`
`
`
`
`his"
`South
`Brld e
`.
`
`RESET#
`
`\fideo
`Ca ure
`Chaim
`
`Vldeo Clock
`
`
`
`1555,:
`gépondary
`
`ROI Bus
`
`
`Parallel tosee-1.1m
`ParalleltoSeriali'm
`
`
`
`XPBus
`
`PCKR
`
`
`
`PCNR
`
`5557
`
`
`
`
`
`
`
`
`
`n
`
`
`RD/WR
`
`COWO'
`
`
`
`
`
`l
`
`Control
`Decoder &
`
`
`Separate
`
`
`Data Path
`
`
`
`
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`
`
`
`
`
`
`MASTER
`Control
`
`
`
`RD/WR
`Encoder &
`
`
`
`
`
`Control
`Merge
`
`Data Path
`
`
`
`
`‘
`
`"""" _
`
`
`
`
`k
`
`
`
`—-—---—----___-
`________
`Parallel
`
`
`
`
`Convener
`Bus Controller
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`
`
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