United States Patent (19)
`Tien et al.
`
`USOO61381.83A
`Patent Number:
`11
`(45) Date of Patent:
`
`6,138,183
`Oct. 24, 2000
`
`54) TRANSPARENT DIRECT MEMORY ACCESS
`
`(75) Inventors: Paul Tien, Fremont; Cheng-Yeuan
`Tsay, Pleasanton; RSong-Hsiang Shiao,
`Fremont, all of Calif.
`73 Assignee: ESS Technolgoy Inc., Fremont, Calif.
`
`21 Appl. No.: 09/074,656
`22 Filed:
`May 6, 1998
`(51) Int. Cl." ...................................................... G06F 13/14
`52 U.S. Cl. ................................ 710/22; 710/129; 703/23
`58 Field of Search ................................ 710/22, 28, 126,
`710/129, 240, 260, 261, 264, 128; 395/500.44,
`500.45, 500.46, 500.47; 703/26, 25, 24,
`23
`
`56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`5,506.997 4/1996 Maguire et al. ........................ 710/260
`5,619,703 4/1997 Omid et al. ......
`... 710/261
`5,621,902 4/1997 Cases et al. .....
`... 710/129
`5,664,197 9/1997 Kardach et al. .
`... 710/240
`5,673,400 9/1997 Kenny ..............
`... 710/129
`... 710/28
`5,678,064 10/1997 Kulik et al. ......
`... 710/22
`5,729,762 3/1998 Kardach et al. .
`710/261
`5,740,452 4/1998 Story et al. ......
`... 710/266
`5,745,772 4/1998 Klein ........
`5,752,043 5/1998 Suzuki ..
`... 710/264
`5,765,024 6/1998 Riley ......................................... 710/22
`
`5,778,242 7/1998 Wang ........................................ 71.2/40
`5,805,842 9/1998 Nagarajetal
`710/126
`5,848,278 12/1998 Sakai ....................................... 710/260
`OTHER PUBLICATIONS
`Implementing Legacy Audio On The PCI Bus, by Gary
`Solomon, Intel Corporation 1997.
`Primary Examiner-Glenn A. Auve
`Attorney, Agent, or Firm-Gray Cary et al.
`57
`ABSTRACT
`A transparent direct memory acceSS method comprises emu
`lating an ISA-bus mapped direct memory access controller
`(ISA-DMAC) with a PCI-bus mapped direct memory access
`controller (PCI-DMAC). The ISA-DMAC exists, but there
`may not actually be any resources mapped into the ISA-bus
`space. Write Snooping by the PCI-DMAC of a PCI-bus
`processor detects whenever an attempt is made to write the
`ISA-DMAC, and copies the data written into the ISA
`DMAC registers into a corresponding register of the PCI
`DMAC. The direct memory access operation commanded
`by the PCI-bus processor of the ISA-DMAC is performed by
`the PCI-DMAC in the PCI-bus resource space. When the
`direct memory access operation is completed, the PCI
`DMAC updates its registers and does a write back to update
`the ISA-DMAC registers. The PCI-buS processor can then
`read the PCI-DMAC directly for status, or if legacy software
`is running the ISA-DMAC will respond with the appropriate
`register value.
`
`6 Claims, 3 Drawing Sheets
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`register
`
`Intel Corporation v. ACQIS LLC
`Intel Corp.'s Exhibit 1041
`Ex. 1041, Page 1
`
`

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`U.S. Patent
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`Oct. 24, 2000
`
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`Ex. 1041, Page 4
`
`

`

`1
`TRANSPARENT DIRECT MEMORY ACCESS
`
`FIELD OF THE INVENTION
`The present invention relates to digital electronic circuits,
`and more particularly to personal computer PCI-bus direct
`memory acceSS controllers that emulate ISA-bus direct
`memory access controllers and that redirect ISA-bus
`resource acceSS requests to PCI-bus resources. The present
`invention further relates to high performance PCI-bus based
`PC audio Solutions with a common architecture for desktop,
`notebook, and add-in card computers. The present invention
`specifically relates to PCI-bus solutions that maintain DOS
`and SOUNDBLASTER(R) compatibility without requiring
`an ISA-bus, a particular core logic chipset, or a System
`motherboard implementation.
`DESCRIPTION OF THE PRIOR ART
`IBM-compatible personal computerS almost universally
`used the industry standard architecture (ISA) bus in combi
`nation with a motherboard. A great deal of Software has been
`written and Sold in the industry that is at least, in part,
`dependent on the ISA-bus Software interfaces and Systems
`resources. The peripheral component interconnect (PCI) bus
`is now rapidly becoming the universal Standard amongst
`personal computer manufacturers and users. However, the
`Software interfaces and Systems resources on a PCI-buS
`System are different enough to make the installed base of
`ISA-bus dependent Software at least partially incompatible
`and not upward compatible.
`A group of System-bus chip manufacturers have joined
`forces to endorse a technology they say will help vendors
`mix PCI and ISA bus subsystems or integrated circuits.
`However, analysts describe the so-called Common Archi
`tecture proposal as a new Solution to a problem already
`adequately Solved. The alliance members, Digital Equip
`ment Corp., National Semiconductor Corp., Opti, Pico
`Power Technology, Standard Microsystems Corp., Texas
`Instruments, and VLSI Technology, say the proposed Stan
`dard will improve the handling and implementation of ISA
`and PCI devices in a Single computer. The new proposal
`partitions the motherboard, allowing System integrators
`greater flexibility in their choices of components Such as
`core logic, PCI bridges, and graphics controllers. Because
`integrators will have more component options, its advocates
`Say, Common Architecture should reduce overall manufac
`turing costs. Devices based on Common Architecture will
`emphasize the newer PCI bus, with the older ISA bus
`Supported as an optional feature. While ISA legacy devices
`will be fully Supported, physical-component connections
`will be routed through the PCI bus to eliminate sideband
`signals that straddle the chip set. The PCI bus will support
`distributed direct memory access (DMA) on the ISA side.
`Manufacturers will have the option of using Sideband Signals
`and extra chips on either Side. Analysts are nonplused,
`pointing out that System vendors seem Satisfied with current
`PCI/ISA architectures, buS Standards, and core-logic chip
`SetS.
`The PCI-based audio and communications accelerator
`industry is also rapidly transitioning from ISA bus-based
`audio solutions to the more powerful PCI-bus enabled
`engines. The ISA-bus is increasingly unable to Support the
`advanced audio processing required by new multimedia
`applications and upcoming personal computer Standards.
`This is driving the need for high bandwidth PCI-bus accel
`erators. A Second factor is the close coupling of audio and
`modem technology that makes integrating these Subsystems
`more attractive.
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`PC-audio is predicted to move from ISA-bus based prod
`ucts implementing the SOUNDBLASTER(R) standard to
`PCI-bus based products that will deliver enhanced levels of
`performance. Products that provide backward compatibility
`for legacy applications, as well as enhanced DIRECT
`SOUND(R) performance, are expected to have a commercial
`advantage during this period of transition.
`Legacy game compatibility will need to be maintained as
`more audio equipment and their manufacturers move to use
`the PCI-bus.
`Microsoft DOS-based games are conventionally Sup
`ported by at least two industry legacy-Support protocols,
`e.g., PC/PCI-bus, and distributed DMA (DDMA). However
`these do not offer complete hardware game compatibility
`that is independent of the PC/PCI-bus or DDMA Support.
`Market realities are such that software compatibility must be
`maintained for all applications written for SOUND
`BLASTER PRO(E), Ad Lib, Microsoft WINDOWS Sound
`System, DIRECTSOUNDTM, and Microsoft ACTIVEX(R).
`The bandwidth and bus mastering capabilities required for
`optimum Support of Software that has been written to
`Microsoft DIRECTSOUND(R), DIRECT3DSOUNDE), and
`DIRECTXOR) application programming interfaces require a
`PCI-bus system. The market also demands that PC audio
`Solutions continue to Support the vast installed base of
`applications developed for the SOUNDBLASTER/ISA-bus
`Standard. Complete hardware Support is needed for existing
`Software titles written for the SOUNDBLASTER Standard
`without diminishing the new audio capabilities enabled by
`the PCI-bus.
`Therefore, an advanced and Scalable PCI-bus based audio
`product family is needed that preserves complete DOS game
`Support, regardless of core logic legacy Support, to eliminate
`the competitive risk of not being compatible with the huge
`installed base of DOS games.
`As a baseline feature, the PC audio system has been
`overlooked for years. While the graphics market has been
`the recipient of broad and rapid innovation, the PC audio
`System has been neglected. All of this is about to change. AS
`the audio system makes the jump from ISA to PCI, it is
`afforded access to a tremendous increase in bandwidth that
`translates into a host of new features and innovation. One
`new feature, wavetable Synthesis, has really been around for
`Several years. However, most traditional wavetable Solutions
`were implemented in an extra Synthesis chip and required a
`wavetable ROM to store sound samples. The latest PCI
`audio controller chips integrate the wavetable Synthesis onto
`an audio controller chip. With access to PCI’s bandwidth,
`Sound Samples can be stored in main memory and the
`wavetable ROM can be eliminated. The net result is less cost
`for the audio Subsystem.
`A major stumbling block to PCI-based audio is so-called
`“legacy” audio compatibility. PC audio was initially devel
`oped in a DOS world, along with ISA interrupts and ISA
`DMA requests. A large base of PC game developers incor
`porated ISA hardware-Specific code in their Software. AS a
`result, these games are married to SOUNDBLASTER
`compatible legacy audio. Supporting Such hardware-specific
`code has turned out to be a tremendous challenge for new
`audio chips as they move to the ISA bus. However, Support
`of the installed Software base remains a baseline requirement
`for new audio solutions. Despite such challenges, PCI-based
`audio is here.
`According to Aureal Semiconductor (Fremont, Calif.)
`DOS legacy compatibility is important, no PC audio solu
`tion is complete without Support for DOS legacy applica
`
`Ex. 1041, Page 5
`
`

`

`3
`tions. The Aureal AU8820 provides DOS audio legacy
`emulation for SOUNDBLASTER Pro with OPL3 FM
`synthesis, for both real-mode DOS and Windows DOS box
`operation. A "patent pending legacy emulation technology
`used in the AU8820 is claimed to have been in production
`for two years, and is said to be fully compatible for both
`motherboard and add-in card Solutions. This, without the
`need for a work-around PC/PCI or D/DMA side band
`connection to the ISA-bus.
`Modems are the only other PC component that are still
`ISA-based. The Aureal Semiconductor AU8820 includes an
`interface to existing, Standard ISA modem chip Sets, Such as
`the latest 56 k modems from U.S. Robotics and Rockwell.
`This unique feature offers two key advantages to OEMs, the
`ability to build PCI based audio-telephony combo cards, and
`the design of a PC without an ISA bus.
`
`1O
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`15
`
`SUMMARY OF THE INVENTION
`It is therefore an object of the present invention to provide
`a System for Supporting ISA-bus applications Software on a
`PCI-based hardware system.
`It is a further object of the present invention to provide a
`direct memory access controller that accepts ISA-bus inter
`rupt controller commands and accesses and that translates
`these into PCI-bus equivalent interrupt controller commands
`and accesses.
`It is a still further object of the present invention to
`emulate an ISA-bus interrupt controller that accepts and
`responds to direct memory acceSS controller commands and
`accesses for execution by a PCI-bus interrupt controller
`mapped into a PCI-bus memory resource.
`Briefly, a transparent direct memory access method
`embodiment of the present invention comprises emulating
`an ISA-bus mapped direct memory access controller (ISA
`DMAC) with a PCI-bus mapped direct memory access
`controller (PCI-DMAC). The ISA-DMAC exists, but there
`may not actually be any resources mapped into the ISA-bus
`space. Write Snooping by the PCI-DMAC of a PCI-bus
`processor detects whenever an attempt is made to write the
`ISA-DMAC, and copies the data written into the ISA
`DWIAC registers into a corresponding register of the PCI
`DMAC. The direct memory access operation commanded
`by the PCI-bus processor of the ISA-DMAC is performed by
`the PCI-DMAC in the PCI-bus resource space. When the
`direct memory access operation is completed, the PCI
`DMAC updates its registers and does a write back to update
`the ISA-DMAC registers. The PCI-bus processor can then
`read the PCI-DMAC directly for status, or if legacy software
`is running the ISA-DMAC will respond with the appropriate
`register value.
`An advantage of the present invention is that a method is
`provided for running ISA game software on a PCI-based
`System.
`Another advantage of the present invention is a System is
`provided that does not require Sideband connections in order
`to run legacy audio programs.
`These and other objects and advantages of the present
`invention will no doubt become obvious to those of ordinary
`skill in the art after having read the following detailed
`description of the preferred embodiments which are illus
`trated in the various drawing figures.
`IN THE DRAWINGS
`FIG. 1 is a functional block diagram of a PC system
`embodiment of the present invention;
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`FIG. 2 is a block diagram of an audio accelerator embodi
`ment of the present invention such as included in FIG. 1; and
`FIG. 3 is a logical representation of the mapping of PCI
`resources and ISA resources as concerns the PCI-processor,
`PCI-DMAC, and ISA-DMAC discussed in connection with
`FIGS. 1 and 2.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`FIG. 1 illustrates a personal computer (PC) embodiment
`of the present invention, referred to herein by the general
`reference numeral 10. The PC 10 comprises a “socket-7”
`type microprocessor 12, a processor bus 14, a System
`controller 16, a memory bus 18, a dynamic random access
`memory (DRAM) 20, and a cache 22. All these drive a
`peripheral component interconnect (PCI) bus 24. A
`peripheral-bus controller 26 provides a bridge to Several
`buses including an X-buS 28, an industry Standard architec
`ture (ISA) bus 30, a universal serial bus (USB) 32, and an
`enhanced-IDE (EIDE) bus 34. A PCI-bus audio accelerator
`peripheral 36, a local area network (LAN) controller 38, and
`a small computer system interface (SCSI) controller 40 all
`connect to the PCI-bus 24. A basic input-output system
`(BIOS) bootup memory module 42 is resident on the ISA
`buS 30.
`In one embodiment, the System controller 16 comprises
`an Advanced Micro-Devices (Sunnyvale, Calif.) AMD-640
`system controller (“Northbridge'), has a 64-bit Socket-7
`interface, integrated writeback cache controller, System
`memory controller, and PCI bus controller. Such Socket-7
`interface is optimized for the AMD-K6 processor, providing
`3-1-1-1-1-1-1-1 transfer timing for both read and write
`transactions from PBSRAM at sixty-six MHz. (The number
`sequence refers to the CPU clock “t” cycles for each
`operation, i.e., 3-1-1-1 means the first data will be available
`at the third “t” when issue the operation, then the conse
`quence data only need additional one “t cycle, and So on.)
`The AMD-640's internal memory controller has a data
`buffering design that uses four cache lines, e.g., Sixteen
`quadwords, of processor-to-DRAM or cache-to-DRAM
`write buffering with concurrent writeback capability to
`accelerate writeback and write-miss cycles. The integrated
`PCI bus controller does concurrent processor and PCI opera
`tion with a five-doubleword posted write buffer. PCI con
`currency with DRAM or cache memory is achieved through
`a 48-doubleword post write buffer and 26-doubleword
`prefetch buffer. Byte-merging is used to optimize processor
`to-PCI throughput and reduce PCI bus traffic by converting
`consecutive processor addresses into burst PCI cycles. The
`AMD-640 system controller uses a variety of techniques to
`minimize PCI initiator read latency and DRAM access,
`including Snoop ahead, Snoop filtering, forwarding cache
`writebacks to the PCI initiator, and merging L1 writebacks
`into the PCI-posted write buffers to minimize PCI initiator
`read latency and DRAM utilization. To minimize Snoop
`overhead, the integrated PCI controller Supports enhanced
`PCI bus commands, Such as memory-read-line, memory
`read-multiple, and memory-write-invalidate. The combina
`tion allows a PCI initiator to achieve the full 133-Mbps burst
`transfer rate.
`In another embodiment, the peripheral-bus controller 26
`comprises an AMD-645 peripheral bus controller
`(“Southbridge”). The AMD-645 has an integrated ISA bus
`controller, enhanced master mode PCI EIDE controller with
`Ultra DMA/33 technology, an ACPI-compatible power man
`agement unit, a USB controller, a PS2-compatible keyboard/
`
`Ex. 1041, Page 6
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`

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`25
`
`S
`mouse controller, and a real-time clock (RTC) with extended
`256-byte CMOS RAM. The on-chip EIDE controller has a
`dual-channel DMA engine capable of interlaced dual
`channel commands. High-bandwidth PCI transfers are
`achieved by a sixteen double-word data FIFO with full
`scatter and gather capability. The integrated USB controller
`has a root hub with two ports having 18-level-deep data
`FIFOs and built-in physical layer transceivers.
`The USB controller also offers backward compatibility
`with legacy keyboard and PS/2 mouse Support.
`The AMD-645 peripheral bus controller is marketed as
`meeting Microsoft Windows(R 95 Plug-and-Play require
`ments with steerable PCI interrupts, ISA interrupts, and
`DMA channels. The integrated power management unit is
`compliant with ACPI and APM and provides dedicated input
`pins for external modem ring indication and power-on, five
`general-purpose I/O pins with option for I2C port, and
`Sixteen general-purpose pins that can be programmed as
`inputs or outputs. To manage power management events, the
`AMD-645 controller includes an ACPI power management
`timer, a GPO timer, a GP1 timer, a secondary event timer,
`and a conserve mode timer. Two types of Sleep States, e.g.,
`Soft-off and power-on Suspend, are Supported with hardware
`automatic wake-up. Additional functionality includes event
`monitoring, CPU clock throttling, hardware and Software
`based event handling, and multiple external SMI Sources.
`The PCI-bus audio accelerator peripheral 36 preferably
`comprises an ESS Technology (Fremont, Calif.) PCI audio
`accelerator chip, e.g., marketed as MAESTRO-1TM. At a
`minimum, the PCI-bus audio accelerator peripheral 36 is
`preferably compliant with major industry Standards includ
`ing the Audio Subsystem Specification of PC97, Windows
`95 DirectSoundTM, Windows Sound System, AC97
`CODEC Interface, and the PCI 2.1 Bus Specification.
`35
`The Maestro-1 is a dual audio-engine architecture that
`comprises of a 64-voice, pipelined, wavetable Synthesizer
`and a programmable audio signal processor that can Simul
`taneously handle multiple audio Streams of different data
`types, high-quality music Synthesis, and Voice compression
`and decompression.
`The PCI-bus audio accelerator peripheral 36 preferably
`comprises a high-performance PCI interface, that retains full
`compatibility to existing DOS games through hardware
`emulation. In general, the PCI bus is required for PC audio
`hardware to Smoothly reproduce high-fidelity audio from
`Internet, MIDI, wave, and conferencing sources. The PCI
`buS 24 enables the transfer of multiple, independent data
`streams. The PCI-standard improves data transfer efficiency
`by at least twenty times over the ISA-standard. This is
`crucial for low-latency audio applications, Such as Internet
`interactive audio.
`MicroSoft's DirectSound applications programming inter
`face (application programming interface) is accelerated by
`digitally mixing up to thirty-two PCM streams of any
`frequency down to a single output Stream of forty-eight kHz.
`Hardware acceleration frees the CPU to perform other tasks,
`Such as Video processing.
`The PCI-bus audio accelerator peripheral 36 preferably
`comprises a wave processor (WP) that provides high-quality
`wavetable Synthesis cost-effectively by Storing down load
`able table samples in system memory, e.g., DRAM 20.
`Samples are retrieved using the PCI bus 24 during playback.
`Each channel/stream preferably has an independent pan,
`tremolo, Vibrato and tone filter. A Synthesizer is also pref
`erably included for advanced audio effects Such as reverb,
`chorus, flange, echo and 3-D spatial enhancement.
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`The PCI-bus audio accelerator peripheral 36 preferably
`provides complete DOS game compatibility via PC/PCI
`DMA, distributed DMA, and transparent DMA. The trans
`parent DMA requires no Sideband Signals and is critically
`compatible with all Intel PENTIUM and PENTIUM-PRO
`chipsets with no constraints.
`Plug-and-play is an industry Standard whose specifica
`tions were developed by Intel Architecture Lab and
`MicroSoft to ensure long-term compatibility acroSS cards,
`Systems and Software. Plug-and-play acts as a configuration
`agent to take over and handle the configuration process
`internally. It automatically assigns resources Such as IRQS,
`I/O addresses and DMA channels. This makes installing
`add-on cards Simple, eliminating the trial-and-error guess
`work. All the user must do is plug in the plug-and-play
`enabled card.
`Under the DOS environment, to perform the plug-and
`play feature, the plug-and-play BIOS, ICU and plug-and
`play devices are required. In the Windows 95, the plug-and
`play function is controlled by the operation System, and the
`Windows 95 only takes the ESCD's information, that gen
`erated by plug-and-play BIOS, as reference.
`To have the plug-and-play function work, the Software
`and hardware must work together. The operating System,
`drivers and BIOS must support plug-and-play. The BIOS
`Searches for ISA plug-and-play cards in System slots. If any
`are found, the BIOS will read the configuration preference
`table Stored in the cards, and will assign proper, non-conflict
`resources. If users install legacy cards on the motherboard,
`then the IRQs and DMAS must be set manually in the BIOS
`Setup.
`The PCI-bus audio accelerator peripheral 36 provides
`DOS compatibility to protect the end-users' software invest
`ment. Existing software and games for the PC have been
`designed to run on ISA-based Sound cards that write directly
`to the inherently slow ISA hardware using Intel-type 8237
`DMAC interrupt controller (IRQ) and direct memory access
`(DMA) signals.
`Such IRQ and DMA signals are not present on the
`PCI-bus 24, but allows legacy software to function at the full
`speed of the PCI-bus 24 as if ISA signals were really being
`generated. Placing the PCI-bus audio accelerator peripheral
`36 on the PCI-bus 24 allows four to twenty times the speed
`over much slower DMA transfers on the ISA bus, and
`therefore reduces system overhead without PCI to ISA
`bridging.
`The PCI-bus audio accelerator peripheral 36 supports
`32-bit PCI-bus interfacing with 64-bit to 32-bit data con
`version. Five doubleword levels of post write buffers are
`included to allow for concurrent CPU and PCI operation.
`Consecutive CPU addresses are converted into burst PCI
`cycles with byte merging capability for optimal CPU to PCI
`throughput. For PCI master operation, sixty-four double
`word levels of post write buffers and thirty-two doubleword
`levels of prefetch buffers are included for concurrent PCI
`bus and DRAM/cache accesses. Enhanced PCI-bus 24 com
`mands are Supported, Such as memory-read-line, memory
`read-multiple and memory-write-invalid commands to mini
`mize Snoop overhead. Snoop ahead, Snoop filtering, L1
`write-back forward to PCI master and L1 write-back merged
`with PCI post write buffers are also preferably included to
`minimize PCI master read latency and DRAM utilization.
`The PCI-bus 24 is isolated from the processor bus 14 by
`a system controller 16. The processor 12 writes data to PCI
`peripherals and the System controller 16 Stores the data in its
`buffer, allowing the processor 12 go on to its next operation
`
`Ex. 1041, Page 7
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`6,138,183
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`rather than waiting for the transfer to complete. The buffer
`then feeds the data to the peripheral at the most efficient rate.
`PCI also Supports bus mastering by intelligent devices
`that can take control of the buS and perform tasks indepen
`dently of the processor 12. The processor 12 can run
`concurrently with the bus master peripheral and, because of
`its buffered design, can operate independently when a PCI
`peripheral is active.
`A Single PCI-buS 24 can only Support four expansion slots
`without violating the Specification's loading constraints,
`with one PCI device per expansion slot. High end system
`designers have recently begun to build Systems using a
`PCI-to-PCI bridge to provide more expansion slots on the
`motherboard. The PCI-bus Specification provides for an
`automatic configuration of any adapter or peripheral plugged
`into the bus, eliminating conflicts between boards in the
`System and the need for jumper headers on a board.
`FIG. 2 illustrates a PCI-bus audio accelerator peripheral
`50 that is similar to the audio accelerator peripheral 36 of
`FIG. 1. The PCI-bus audio accelerator peripheral 50 com
`prises a PCI-interface 52, a SOUNDBLASTER datapath 54,
`a wave processor 56, a 512x16 wave cache 58, an applica
`tion specific signal processor (ASSP) 60, a ring bus 62, an
`SIO-2 codec 64, an SIO-1 codec 66, and an I-S serial
`interface 68. A high-performance game port (HPGP) 70
`provides an interface for a joystick, and a general purpose
`input-output port (GPI/O) 72 provides connections to mul
`tiplexed buses.
`The wave processor 56 is a Sixty-four-channel, pipelined
`wave processor. The ASSP 60 is a programmable audio
`Signal processor. Together these provide Simultaneous Sup
`port for multiple audio streams of different types. Such
`architecture enables complex, three-dimension positional
`gaming Sound effects to be implemented while also Support
`ing Voice communications over the Internet from multiple
`Sources. Embodiments of the present invention preferably
`Support Sixty-four independently programmable wave pro
`cessor channels and provide for DIRECTSOUND(E) hard
`ware acceleration with digital mixing of up to thirty-two
`wave Streams. Audio Streams of any frequency are converted
`to forty-eight kHz. Each of the sixty-four channels can be
`assigned its own parameters to control panning, tremolo,
`Vibrato, and tone-filtering. The channels also Support inde
`pendently programmable Special effects, e.g., reverb,
`chorus, flange, echo, and three-dimension Spatial enhance
`ments to create positional Special effects. The high band
`width PCI-bus 24 is used to store MIDI-samples in main
`memory, DRAM 20. Downloadable sound samples relieve
`needing ROM-type memory to Store Sound fonts, a allow
`Software developers to control the sound PCI-bus audio
`accelerators.
`The original PC platform used the DOS operating system
`and had no Standard Software drivers for options Such as
`audio. Creative Labs' SOUNDBLASTER audio technology
`Successfully captured the market by persuading Software
`developers to write directly to their device's register Set.
`Other audio chip vendors began to support the SOUND
`BLASTER register interface so that existing software titles
`written to support the interface would work with their
`hardware devices.
`A de facto Standard was born that would Support one
`stereo or two mono audio streams on the low bandwidth ISA
`bus. Because of the huge library of games and other appli
`cations written to support the SOUNDBLASTER standard,
`it is not anticipated that SOUNDBLASTERISA bus support
`will Vanish Suddenly, but the market is clearly in transition
`to more Sophisticated PCI audio implementations.
`
`45
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`50
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`55
`
`60
`
`65
`
`8
`MicroSoft has also taken an active role in encouraging the
`move to PCI-based audio to expand the role of the PC in
`both the consumer and busineSS markets with enhanced
`Sound and communications capabilities. Microsoft's
`DIRECTSOUND and DIRECT3D application program
`ming interfaces Support multiple audio data Streams occur
`ring Simultaneously in real-time, allowing Software devel
`operS to use Surround Sound and 3D audio effects. In
`addition, Microsoft's DIRECTX application programming
`interfaces for interactive multimedia and ActiveX controls
`for Sharing information between applications both Support
`multiple audio Streams.
`However, the ISA bus SOUNDBLASTER standard is
`limited to one DMA channel providing direct access to a
`PCS memory for a single data Stream, and So is clearly
`inadequate for Supporting the advanced audio effects and
`capabilities that Microsoft's relatively new software drivers
`enable. The present invention preferably Supports Sixty-four
`bus mastering DMA channels to take advantage of the
`capabilities now Supported at the operating System level by
`Microsoft.
`Microsoft's Win32 Driver Model (WDM) encompasses
`DIRECTX and ActiveX application programming interfaces
`while also broadening their reach to Support advanced audio
`Streams management features Such as Synchronization of
`multiple Streams and Stream positioning. WDM also pre
`Sents developerS with a common application programming
`interface and device driver model for both Windows NT and
`Memphis, the next planned update to Windows 95.
`The continued reliance on ISA bus technology has also
`become a significant performance bottleneck for engineers
`designing Systems. Continued utilization of the
`SOUNDBLASTER-standard ISA bus means that the host
`CPU must be constantly interrupted to manage the task of
`audio data transfer. While the impact of the overhead of
`ISA-based audio Support has been reduced Somewhat
`through implementing techniques such as “F-Mode DMA”
`that consolidates Several transactions before initiating a CPU
`interrupt, the cost of maintaining Support for ISA-based
`solutions in CPU cycles is high.
`It is estimated that twenty percent of a modem CPU's
`capacity is wasted in producing 16-bit Stereo Sound at 44.1
`kHz with the ISAbus-based audio. In contrast, embodiments
`of the present invention need less than one percent of a
`CPU's maximum available resources to deliver the same
`level of performance. The elimination of the ISA system
`bottleneck enables CPU resources to be used for other
`activities, including the Support of graphics and audio pre
`processing by MMX-enabled applications.
`A more obvious advantage that the PCI bus brings to
`audio applications is sheer bandwidth. At 133 MB/second,
`the PCI bus represents a much larger “pipe” than the 7
`MB/second ISA bus. In addition to being able to move large
`amounts of data quickly through the bus, PCI accelerators
`are able to transfer multiple data streams with different
`destinations during a Single bus master cycle. Because PCI
`audio accelerators can Support multiple data Streams of
`different types, it can also reduce the latencies typically
`asSociated with Internet-based interactive audio, phone and
`conferencing applications.
`Originally, ISA-based SOUNDBLASTER standard solu
`tions supported 8-bit pulse code modulation (PCM) audio
`that created Sound by reproducing digitized Sound Sample
`files. Audio file sizes were large, So the number of Sounds
`that could be reproduced by a given Software application
`was minimal. Later, FM Synthesis capabilities were devel
`oped that allowed the creation of Sounds by Synthesizing
`Sine waves.
`
`Ex. 1041, Page 8
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`

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`15
`
`Most recently, MIDI wavetable synthesis techniques have
`been developed that enable the faithful reproduction of the
`Voice of musical instruments acroSS the full Sound Spectrum.
`Wavetable technology uses algorithms t