Intel Corporation v. ACQIS LLC
`Intel Corp.'s Exhibit 1042
`Ex. 1042, Page 1
`
`

`

`Attorney Docket No. ACQI—OIOFIOUS 310528—2052
`Page 2
`
`[X}
`
`[X}
`
`
`Please charge 32 160.00 to Deposit Account No. 501283 for the total fee.
`
`The Director is hereby authorized to charge any appropriate fees under 37
`CPR. §§I.16, 1.17, and 1.21 that maybe required by this paper, and to
`credit any overpayment, to Deposit Account No. 50-1283.
`
`3.
`
`Picase direct at} correspondence concerning this application to:
`
`CUSTOMER NUMBER:
`
`58249
`
`COOL-BY GODWARD KRONESH LLP
`
`ATTN: Patent Group
`777 6% Street NW, Suite 2100
`Washington, DC 20001
`Tel: (650) 853—5852
`Fax: (202) 842-3899
`
`DATE:M
`COOLEY GODWARD KRONESH LL?
`ATTN: Patent Group
`777 6th Street NW, Suite 1 E00
`Washington, DC 20001
`
`Tel: (650) 8536852
`Fax: (202) 8427899
`
`Respectfuily submitted,
`OLEY GODWARD
`N ' r LLP
`C0
`» KRO 15*
`
`,w =
`’
`__
`/‘~f-’ « W}
`Cliff Z: Lita"
`Reg. No. 50,834
`
`By:
`
`797663 vlz‘PA.
`
`Ex. 1042, Page 2
`
`Ex. 1042, Page 2
`
`

`

`ACQI-Ol 0/10US 3 10578-2052
`
`PATENT
`
`MULTIPLE MODULE COMPUTER SYSTEM AND METHOD INCLUDING
`DIFFERENTIAL SIGNAL CHANNEL COMPRISING UNDIRECTIONAL
`SERIAL BIT CHANNELS
`
`CROSS REFERENCE TO RELATED APPLICATIONS
`
`[0001} This application is a continuation of US Application No; 12/077,503 filed
`
`March 18, 2008, which is a continuation of US. nonprovisional Application No.
`
`11/166,656, filed June 24, 2005 (Now US. Patent No. 7,3 76,779), which is a
`
`continuation ofUS. nonprovisional Application No. l l/097,694, tiled March 31, 2005
`
`(New US. Patent No. 7,363,415), which is a continuation of US. nonprovisional
`
`Application No. 10/772,214, filed February 3, 2004 (New US. Patent No. 7,099,981),
`
`which is a continuation of US. nonprovisional Application No. 09/569,758, filed May 12,
`
`2000 (Now US. patent no. 6,718,415), and which claimed priority to US. Provisional
`
`Application No. 60/ 134,122 filed May 14, 1999. These applications are hereby
`
`incorporated by reference in their entirety.
`
`BACKGROUND OF THE INVENTION
`
`[0002} The present invention relates to computing devices. More particularly, the
`
`present invention provides a system including a piuraiity of computer moduies that can
`
`independentiy operate to provide backup capability, dual processing, and the like. Mereiy
`
`by way of exampie, the present invention is applied to a moduiar computing environment
`
`for desk top computers, but it wilt be recognized that the invention has a much wider
`
`range of applicability.
`
`It can be applied to a server as wet] as other portable or modular
`
`computing applications.
`
`[0003] Many desktop or personal computers, which are commonly termed PCs, have
`
`been around and used for over ten years. The PCs often come with state~of~art
`
`microprocessors such as the Intel PentiumTM microprocessor chips. They also include a
`
`hard or fixed disk drive such as memory in the gigaubit range. Additionally, the PCS often
`
`include a random access memory integrated circuit device such as a dynamic random
`
`access memory device, which is commonly termed DRAM. The DRAM devices now
`
`provide up to millions of memory cells (i.e., megabit) on a single siice of silicon. PCs
`
`also include a higti resolution display such as cathode ray tubes or CRTs.
`
`in most cases,
`
`797545 was
`
`1.
`
`Ex. 1042, Page 3
`
`Ex. 1042, Page 3
`
`

`

`the CRTs are at least IS inches or 17 inches or 20 inches in diameter. High resolution flat
`
`panel displays are also used with PCs.
`
`[0004] Many external or peripheral devices can be used with the PCS. Among others,
`
`these peripheral devices include mass storage devices such as a ZipTM Drive product sold
`
`by Iornega Corporation of Utah. Other storage devices include external hard drives, tape
`
`drives, and others. Additional devices include communication devices such as a modern,
`
`which can he used to link the PC to a wide area network of computers such as the Internet.
`
`Furthermore, the PC can include output devices such as a printer and other output means.
`
`Moreover, the PC can include speciai audio output devices such as speakers the like.
`
`{0095}
`
`PCs also have easy to use keyboards, mouse input devices, and the like. The
`
`keyboard is generaily cont] gured similar to a typewriter format. The keyboard also has
`
`the length and width for easily inputting intonnation by way of keys to the computer. The
`
`mouse also has a sufficient size and shape to easily move a curser on the display from one
`
`location to another location.
`
`[0006} Other types of computing devices include portable computing devices such as
`
`“laptop” computers and the like. Although somewhat successfill, Eaptop computers have
`
`many limitations. These computing devices have poor display technology.
`
`In fact, these
`
`devices otter: have a smaller flat panel display that has poor viewing characteristics.
`
`Additionally, these devices also have poor input devices such as smaller keyboards and
`
`the like. Furthermore.
`
`these devices have limited common platforms to transfer
`
`information to and from these devices and other devices such as PCS.
`
`£0097] Up to now, there has been little common ground between these platforms
`
`including the PCS and laptops in terms of upgrading, ease~of~use, cost, performance, and
`
`the like. Many differences between these platforms, probably somewhat intentionai, has
`
`benefited computer manufacturers at the cost of consumers. A drawback to having two
`
`separate computers is that the user must often purchase both the desktop and laptop to
`
`have “total” computing power, where the desktop serves as a “regular” computer and the
`
`laptop serves as a “portable” computer. Purchasing both computers is often costly and
`
`runs “thousands” of dollars. The user also wastes a significant amount of time
`
`transferring software and data between the two types of computers. For example, the user
`
`must often couple the portable computer to a local area network (i.e., LAN), to a serial
`
`797545 lerA
`
`2-
`
`Ex. 1042, Page 4
`
`Ex. 1042, Page 4
`
`

`

`port with a modem and then manually transfer over files and data between the desktop and
`
`the portable computer. Alternatively, the user often must use floppy disks to “Zip” up
`
`files and programs that exceed the storage capacity of conventionai floppy disks, and
`
`transfer the floppy disk data manually.
`
`{0068] Another drawback with the current model of separate portable and desktop
`
`computer is that the user has to spend money to buy components and pcriphcrais the are
`
`duplicated in at least one of these computers. For example, both the desktop and portabie
`
`computers typically include hard disk drives, floppy drives, CD-ROMS, computer
`
`memory, host processors, graphics accelerators, and the like. Because program software
`
`and supporting programs generally must be installed upon both hard drives in order for
`
`the user to operate programs on the road and in the office, hard disk space is often wasted.
`
`[0009} One approach to reduce some of these drawbacks has been the use of a docking
`
`station with a portable computer. Here, the user has the portable computer for “on the
`
`road” use and a docking station that houses the portabie computer for office use.
`
`{00] 0]
`
`Similar to separate desktop and portable computers, there is no commonality
`
`between two desktop computers. To date, most personal computers are constructed with a
`
`single motherboard that provides connection for CPU and other components in the
`
`computer. Dual CPU systems have been available through Intel’s siot 1 architecture. For
`
`example, two Pentium ll caitridges can. be plugged into two “slot 1” card slots on a
`
`motherboard to form a Dual-proCessor system. The two CPU’s share a common host bus
`
`that connects to the rest of the system, e. g. main memory, hard disk drive, graphics
`
`subsystem, and others. Dual CPU systems have the advantage of increased CPU
`
`performance for the whole system. Adding a CPU cartridge requires no change in
`
`operating systems and application software. However, dual CPU systems may suffer
`
`limited performance improvement if memory or disk drive bandwidth becomes the
`
`limiting factor. Also, dual Ci’U systems have to timemshare the processing unit in running
`
`mnltipie applications. CPU performance improvement efficiency also depends on
`
`software coding structure. Dual CPU systems provide no hardware redundancy to help
`
`fault tolerance.
`
`in running muitiple applications, memory and disk drive data throughput
`
`will become the limiting factor in improving performance with multi-processor systems.
`
`797545 vi/‘F‘A
`
`3.
`
`Ex. 1042, Page 5
`
`Ex. 1042, Page 5
`
`

`

`[0011} The present invention generally relates to computer interfaces. More
`
`specifically, the present invention relates to an interface channel that interfaces two
`
`computer interface buses that operate under protocols that are different from that used by
`
`the interface channel.
`
`[0032]
`
`interfaces coupling two independent computer buses are well known in the art.
`
`A block diagram of a computer system utilizing such a prior art interface is shown in Fig.
`
`5.
`
`In Fig. 5, a primary peripheral component interconnect (PCI) bus 505 of a notebook
`
`PC 500 is coupled to a secondary PCI bus 555 in a docking system 550 (also referred to as
`
`docking station 550) through high. pin count connectors 501 and 502, which are normally
`
`mating connectors. The high pin count connectors 501 and 502 contain a sufficiently
`
`large number of pins so as to carry PCI bus signals between the two PCI buses without
`
`any translation. The main purpose for interfacing the two independent PCl buses is to
`
`allow transactions to occur between a master on one PCI bus and a target on the other PCJ
`
`bus. The interface between these two independent PCI buses additionally includes an
`
`optional PCl to PCI bridge 560, located in the docking station 550, to expand the add on
`
`capability in docking station 550. The bridge 560 creates a new bus number for devices
`
`behind the bridge 560 so that they are not on the same bus number as other devices in the
`
`system thus increasing the add on capability in the docking station 550.
`
`{0013} An interface such as that shown in Fig. 5 provides an adequate interface between
`
`the primary and secondary PCl buses. However, the interface is limited in a number of
`
`ways. The interface transfers signals between the primary and secondary PCI buses using
`
`the protocols of a PCI bus. Consequently, the interface is subject to the limitations under
`
`which PCl hoses operate. One such limitation is the fact that PCI buses are not cable
`
`friendly. The cable friendliness of the interface was not a major concern in the prior art.
`
`However, in the context of the computer system of the present inventimi, which is
`
`described in the present inventor’s (William WY. Chu’s) application for “Personal
`
`Computer Peripheral Console With Attached. Computer Module” flied concurrently with
`
`the present application on Sep. 8, 1998 and incorporated herein by reference, a cable
`
`friendly interface is desired for interfacing an attached computer module (ACM) and a
`
`peripheral console of the present invention. Furthermore, as a result of operating by PCI
`
`protocols, the prior art interface includes a very large number of signal channels with a
`
`corresponding large number of conductive lines (and a similarly large number of pins in
`
`797545 vn'PA
`
`4.
`
`Ex. 1042, Page 6
`
`Ex. 1042, Page 6
`
`

`

`the connectors of the interface) that are commensurate in number with the number of
`
`signal lines in the ?CI buses which it interfaces. One disadvantage of an interface having
`
`a relatively large number of conductive lines and pins is that it costs more than one that
`
`uses 21 fewer number of conductive lines and pins. Additionally, an interface having a
`
`large number of conductive lines is bulkier and more cumbersome to handle. Finally, a
`
`relatively large number of signal channels in the interface renders the option of using
`
`differential voltage signals less viable because a differential voltage signal method would
`
`require duplicating a large number of signal lines. It is desirable to use a low voltage
`
`differential signal (LVDS) channel in the computer system ofthe present invention
`
`because an LVDS channel is more cable friendly, faster, consumes less power, and
`
`generates less noise, including electromagnetic interferences (Eh/ll), than a PCl channel.
`
`The term LVDS is herein used to generically refer to low voltage differential signals and
`
`is not intended to be limited to any particular type of LVDS technology.
`
`£0014]
`
`Thus, What is needed are computer systems that can have multiple computer
`
`modules. Each computer module has dedicated memory and disk drive, and can operate
`
`independently.
`
`BRIEF SUMMARY OF THE ENVENTION
`
`{0015! According to the present invention, a technique including a method and device
`
`for multi-module computing is provided.
`
`in an exemplary embodiment, the present
`
`invention provides a system including a plurality of computer modules that can
`
`independently operate to provide backup capability, dual processing, and the like.
`
`{0016]
`
`In a specific embodiment, the present invention provides a computer system for
`
`multi~processing purposes. The computer system has a console comprising a first
`
`coupling site and a second coupling site, e. g, computer module bay. Each coupling site
`
`comprises a connector. The console is an enclosure that is capable of housing each
`
`coupling site. The system also has a plurality of computer modules, where each of the
`
`computer modules is coupled to one of the connectors. Each of the computer modules has
`
`a processing unit, a main memory coupled to the processing unit, a graphics controller
`
`coupled to the processing unit, and a mass storage device coupled to the processing unit.
`
`Each of the computer modules is substantially similar in design to each other to provide
`
`independent processing of each of the computer modules in the computer system.
`
`797’545 Vl/PA
`
`5.
`
`Ex. 1042, Page 7
`
`Ex. 1042, Page 7
`
`

`

`[0017]
`
`in an alternative specific embodiment, the present invention provides a multi~
`
`processing computer system. The system has a console comprising a first coupling site
`
`and a second coupling site. Each coupiing site comprises a connector. The console is an
`
`enclosure that is capable of housing each coupling site. The system also has a plurality of
`
`computer modules, where each of the computer modules is coupled to one of the
`
`connectors. Each of the computer modules has a processing unit, a main memory ecu-pied
`
`to the processing unit, a graphics controller coupled to the processing unit, a mass storage
`
`device coupled to the processing unit, and a video output coupled to the processing unit.
`
`Each of the computer modules is substantially similar in design to each other to provide
`
`independent processing of each of the computer modules in the computer system. A
`
`video switch circuit is coupled to each of the computer modules through the video output.
`
`The video switch is configured to switch a video signal from any one of the computer
`
`modules to a display.
`
`[0018] Numerous benefits are achieved using the present invention over previously
`
`existing techniques.
`
`in one embodiment, the invention provides improved processing and
`
`maintenance features. The invention can also provide increased CPU performance for the
`
`whole system. The invention also can be implemented without changes in operating
`
`system and application software. The present invention is also implemented using
`
`conventional technologies that can be provided in the present computer system in an easy
`
`and efficient manner.
`
`[8019}
`
`In another embodiment, the invention provides at least two users to share the
`
`same modular desktop system. Each user operates on a different computer module. The
`
`other peripheral devices, i.e. CDROM, printer, DSL connection, etc. can be shared. This
`
`provides lower system cost, less desktop space and more efficiency. Depending upon the
`
`embodiment, one or more of these benefits can be available. These and other advantages
`
`or benefits are described throughout the present specification and are described more
`
`particularly below.
`
`{9029]
`
`In still further embodiments, the present inventiOn provides methods of using
`
`multiple computer modules.
`
`{0021] The present invention encompasses an apparatus for bridging a first computer
`
`interface bus and a second computer interface bus. where each of the first and second
`
`797545 vl.:“PA
`
`6.
`
`Ex. 1042, Page 8
`
`Ex. 1042, Page 8
`
`

`

`computer interface buses have a number of parallel multiplexed address/data bus lines and
`
`operate at a clock speed in a predetermined clock speed range having a minimum clock
`
`speed and a maximum clock speed. The apparatus comprises an interface channel having
`
`a clock line and a plurality of bit lines for transmitting bits; a first interface controller
`
`coupled to the first computer interface bus and to the interface channel to encode first
`
`control signals from the first computer interface bus into first control bits to be transmitted
`
`on the interface channel and to decode second control bits received From the interface
`
`channel into second control signals to be transmitted to the first computer interface bus;
`
`and a second interface controller coupled to the interface channel and the second
`
`computer interface bus to decode the first control bits from the interface channel into third
`
`control signals to be transmitted on the second computer interface bus and to encode
`
`fourth control signals from the second computer interface bus into the second control bits
`
`to be transmitted on the interface channel.
`
`{0022}
`
`In one embodiment, the first and second interface controllers comprise a host
`
`interface controller (PEG) and a peripheral interface controller (PIC), respectively, the first
`
`and second computer interface buses comprise a primary PCI and a secondary PCI bus,
`
`respectively, and the interface channel comprises an LVDS channel.
`
`[0023]
`
`The present invention overcomes the aforementioned disadvantages of the prior
`
`art by interfacing two PCl or PCLlike buses using a non-POI or non—PCl—like channel.
`
`In
`
`the present invention, PCI control signals are encoded into control bits and the control.
`
`bits, rather than the control signals that they represent, are transmitted on the interface
`
`channel. At the receiving end, the control bits representing control signals are decoded
`
`back into PCl control signals prior to being transmitted to the intended PCI bus.
`
`[0024]
`
`The fact that control bits rather than control signals are transmitted on the
`
`interface channel allows using a smaller number of signal channels and a correspondingly
`
`small number of conductive lines in the interface channel than would otherwise be
`
`possible. This is because the control bits can be more easily multiplexed at one end of the
`
`interface channel and recovered at the other end than control signals. This relatively small
`
`number of signal channels used in the interface channel allows using LVDS channels for
`
`the interface. As mentioned above, an LVDS channel is more cable friendly, faster,
`
`consumes less power, and generates less noise than a PCI bus channel, which is used in
`
`the prior art to interface two PCI buses. Therefore, the present invention advantageously
`
`797545 vl/PA
`
`7.
`
`Ex. 1042, Page 9
`
`Ex. 1042, Page 9
`
`

`

`uses an LVDS channel for the hereto unused purpose of interfacing PCE or PCLlike buses.
`
`The relatively smaller number of signal channets in the interface also allows using
`
`connectors having smaller pins counts. As mentioned above an interface having a smaller
`
`number of signal channels and, therefore, a smaller number of conductive lines is less
`
`bulky and less expensive than one having a larger number of signal channels. Similarly,
`
`cennectors having a smaller number of pins are also less expensive and less bulky than
`
`connectors having a larger number of pins.
`
`[0025}
`
`In one embodiment, the present invention encompasses an apparatus for bridging
`
`a first computer interface bus and a second computer interface bus, in a microprocessor
`
`based computer system where each of the first and second. computer interface buses have
`
`a number of parallel multiplexed address/data bus lines and operate at a clock speed in a
`
`predetermined clock speed range having a minimum clock speed and a maximum clock
`
`speed. The apparatus comprises an interface channel having a clock channel and a
`
`plurality of bit channels for transmitting hits; a first interface controller coupled to the first
`
`computer interface has and to the interface channel to encode first control signals from the
`
`first computer interface bus into first control bits to be transmitted on the interface
`
`channel and to decode second control bits received from the interface channel into second
`
`control signals to be transmitted to the first computer interface bus; and a second interface
`
`controller coupled to the interface channel and the second computer interface bus to
`
`decode the first control hits from the interface channel into third control signals to be
`
`transmitted on the second computer interface bus and to encode fourth control signals
`
`from the second computer interface bus into the second control bits to be transmitted on
`
`the interface channel.
`
`[0026]
`
`in one embodiment, the first and second interface controllers comprise a host
`
`interface controller (HIC) and a peripheral interface controller (PIC), respectively, the first
`
`and second computer interface buses comprise a primary PCI and a secondary PCI bus,
`
`respectively, and the interface channel comprises an LVDS channel.
`
`[0027]
`
`In a preferred embodiment, the interface channel has a plurality of seri at hit
`
`channets numbering fewer than the number of parallel bus lines in each of the PC} buses
`
`and operates at a clock speed higher than the clock speed at which any of the bus lines
`
`operates. More specifically, the interface channel includes two sets of unidirectional
`
`serial hit channels which transmit data in opposite directions such that one set of bit
`
`797545 vnPA
`
`8.
`
`Ex. 1042, Page 10
`
`Ex. 1042, Page 10
`
`

`

`channels transmits serial bits from the HIC to the PIC while the other set transmits serial
`
`bits from the PIC to the PRC. For each cycle of the PCl clock, each bit channel of the
`
`interface channel transmits a packet of serial bits.
`
`[0028]
`
`The HlC and PIC each include a bus controller to interface with the first and
`
`second computer interface buses, respectively, and to manage transactions that occur
`
`therewith. The EEG and PIC also include a translator coupled to the bus controller to
`
`encode control signals from the first and second computer interface buses, respectively,
`
`into control bits and to decode control bits from the interface channel into centrol signals.
`
`Additionally, the BIG and PIC each include a transmitter and a receiver coupled to the
`
`translator. The transmitter converts parallel bits into serial bits and transmits the serial
`
`bits to the interface channel. The receiver receives serial bits from the interface channel
`
`and converts them into parallel bits.
`
`[9029} According to the present invention, a technique including a method and device
`
`for securing a computer module using a pasaword in a computer system is provided.
`
`in an
`
`exemplary embodiment, the present invention provides a security system for an attached
`
`computer module {“ACM”).
`
`in an embodiment, the ACM inserts into a Computer
`
`Module Bay (CMB) within a peripheral console to form a functional computer.
`
`{0030]
`
`In a specific embodiment, the present invention provides a computer module.
`
`The computer module has an enclosure that is inseitable into a console. The module also
`
`has a central processing unit (i.e., integrated circuit chip) in the enclosure. The module
`
`has a hard disk. drive in the enclosure, where the hard disk drive is coupled to the central
`
`processing unit. The module further has a programmable memory device in the enclosure,
`
`where the programmable memory device can be configurable to store a password for
`
`preventing a possibility of unauthorized use of the hard disk drive and/or other module
`
`elements. The stored password can be any suitable key strokes that a user can change
`
`from time to time.
`
`In a further embodiment, the present invention provides a permanent
`
`password or user identification code stored in flash memory, which also can be in the
`
`processing unit, or other integrated circuit element, The permanent password or user
`
`identification code is designed to provide a permanent “fi ngcr print” on the attached
`
`computer module.
`
`797545 vaA
`
`9.
`
`Ex. 1042, Page 11
`
`Ex. 1042, Page 11
`
`

`

`[0031}
`
`In a specific embodiment, the present invention provides a variety of methods.
`
`In one embodiment, the present invention provides a method for operating a computer
`
`system such as a modular computer system and others. The method includes inserting an
`
`attached computer module (“ACM”) into a bay of a modular computer system. The ACM
`
`has a microprocessor unit (e.g.. microcontroller, microprocessor) coupled to a mass
`
`memory storage device (eg, hard disk). The method aiso includes applying power to the
`
`computer system and the ACM to execute a security program, which is stored in the mass
`
`memory storage device. The method atso includes prompting for a user password from a
`
`user on a display (e. g, flat panel, CRT).
`
`in a further embodiment, the present method.
`
`includes a step of reading a permanent password or user identification code stored in flash
`
`memory, or other integrated circuit element. The permanent password or user
`
`identification code provides a permanent finger print on the attached computer module.
`
`The present invention includes a variety of these methods that can be implemented in
`
`computer codes, for example, as well as hardware.
`
`[0932] Numerous benefits are achieved using the present invention over previously
`
`existing techniques. The present invention provides mechanical and electrical security
`
`systems to prevent theft or unauthorized use of the computer system in a specific
`
`embodiment. Additionally, the present invention substantially prevents accidental
`
`retrieval of the ACM from the console.
`
`In some embodiments, the present invention
`
`prevents illegal or unauthorized use during transit. The present invention is also
`
`implemented using conventionai technologies that can be provided in the present
`
`computer system in an easy and efficient manner. Depending upon the embodiment, one
`
`or more of these benefits can be available. These and other advantages or benefits are
`
`described throughout the present specification and are described more particularly below.
`
`{8833] These and other embodiments of the present invention, as welt as its advantages
`
`and features, are described in more detait in conjunction with the text below and attached
`
`Figs.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`{0034]
`
`Fig.
`
`i is a simpiified diagram of a computer system according to an embodiment
`
`of the present invention;
`
`797545 war/r».
`
`10.
`
`Ex. 1042, Page 12
`
`Ex. 1042, Page 12
`
`

`

`£0035]
`
`Fig. 2 is a simplified block diagram of a computer system according to an
`
`alternative embodiment of the present invention;
`
`[0036}
`
`Fig. 3 is a simplified block diagram of a compeer system according to a further
`
`alternative embodiment of the present invention, and
`
`[0037]
`
`Fig. 4 is a simplified flow diagram of a method according to an embodiment of
`
`the preSent invention.
`
`[0038}
`
`Fig. 5 is a block diagram of a computer system using a prior art interface
`
`between a primary and a secondary PCI bus.
`
`{0039]
`
`Fig. 6 is a biock diagram of one embodiment of a computer system using the
`
`interface of the present invention.
`
`[0040}
`
`Fig. 7 is a partial block diagram of a computer system using the interface of the
`
`present invention as a bridge between the north and south bridges of the computer system.
`
`[0041]
`
`fig. 8 is a partial block diagram of a computer system in which the north and
`
`south bridges are integrated with the host and peri pherai interface controllers,
`
`respectively.
`
`[0042]
`
`Fig. 9 is a block diagram of one embodiment of the host interface controiier and
`
`the peripheral} interface controller of the present invention.
`
`[0643
`
`Fig. i0 is a detaiied block diagram of one embodiment of the host interface
`
`controller of the present invention.
`
`[0044]
`
`Fig. 11 is a detailed block diagram of one embodiment of the PIC of the present
`
`invention.
`
`[9045}
`
`Fig. 12 is a table showing the symbols, signats, data rate and description of
`
`signais in a first embodiment of the XPan.
`
`{0046]
`
`Fig. 13 is a table showing the information transmitted on the XPBus during two
`
`clock cycles of the XPan in one embodiment of the present invention where 10 data bits
`
`transmitted in each ciock cycle of the XPBus.
`
`797545 VUPA
`
`1 3.
`
`Ex. 1042, Page 13
`
`Ex. 1042, Page 13
`
`

`

`[0047]
`
`Fig. 14 is a table showing information transmitted on the XPBas during four
`
`ciock cycles of the XPBus in another embodiment of the present invention where it) data
`
`bits are transmitted in each Clock cycle of the XPBus.
`
`[0048}
`
`Fig. 15 is a schematic diagram of the signed lines PCK, PDO to PD3, and PCN.
`
`£0049]
`
`Fig. 36 is a table showing the names, types, number of pins dedicated to, and the
`
`description of the primary bus PCI signals.
`
`[0050]
`
`PEG. i7 is a block diagram of one embodiment of a computer system employing
`
`the present invention.
`
`[0051]
`
`FIG. 18 is a block diagram of an attached computing moduie (ACM).
`
`[0952]
`
`FIG. 19 illustrates an external View of one embodiment of an ACM.
`
`10053] HO. 19b illustrates one possible embodiment of a computer bay.
`
`[0054}
`
`FIG. 20 illustrates the internal component layout for one embodiment of an
`
`ACM.
`
`{0055] HG. 21 is a block diagram of a peripheral console (PCON).
`
`[0056]
`
`FIG. 22 is a simplified layout diagram of a security system for a computer
`
`system according to an embodiment of the present invention; and
`
`[0037]
`
`FIG. 23 is a simpiified block diagam of a security system for a computer
`
`module according to an embodiment of the present invention.
`
`DETAILED DESCRIF’E‘ION OF THE INVENTION
`
`[0058] According to the present invention, a technique inciuding a method and device
`
`for muiti-moduie computing is provided.
`
`In an exemplary embodiment, the present
`
`invention provides a system including a plurality of computer modules that can
`
`independently operate to provide backup capabiiity, dual processing, and the like.
`
`[0059}
`
`Fig.
`
`i is a sirnpiified diagram of a computer system 100 according to an
`
`embodiment of the present invention. This diagram is mereiy an iliustration and should
`
`not limit the scope of the claims herein. One of ordinary skill in the art wouid recognize
`
`other variations, modifications, and alternatives. The computer system 100 includes an
`
`797545 vtfPA
`
`12.
`
`Ex. 1042, Page 14
`
`Ex. 1042, Page 14
`
`

`

`attached computer module (i.e., ACM) 113, a deskmp console 101, among other elements.
`
`The computer system also has another ACM module 1 17. Each ACM module has a
`
`respective slot 121, 1 l9, which mechanically houses and electrically couples each ACM
`
`to the computer console. Also shown is a display ll 1, which connects to the console.
`
`Additionally, keyboard 109 and mouse 115 are also shown. A second display 102,
`
`keyboard 105, and mouse l07 can be coupled to the console in some optional
`
`embodiments to allow more than one user to Operate the computer system. The computer
`
`system is modular and has a variety of components that. are removable. Some of these
`
`components (or modules) can be used in different computers, workstations, computerized
`
`television sets, and portable or laptop units.
`
`{9060]
`
`In the present embodiment, each. ACM 113 includes computer components. as
`
`will be described below, including a central processing unit (“CPU”).
`
`lDE controller,
`
`hard disk drive, computer memory, and the like. The computer module bay (i.e., CMB)
`
`121 is an opening or slot in the desktop console. The CMB houses the ACM and provides
`
`communication to and from the ACM. The CMB also provides mechanical protection
`
`and support to the ACM. The CMB has a mechanical alignment mechanism for mating a
`
`portion of the ACM to the console. The CMB further has thermal heat dissipation sinks,
`
`electrical connection mechanisms, and the like. Some details of the ACM can be found in
`
`co-pencling Patent Application Nos. 09/ 149,882 and 09/149,548 filed 9/8/98, commonly
`
`assigned, and hereby incorporated by reference for all purposes.
`
`{9061]
`
`In a specific embodiment, the present multiple computer module system has a
`
`peripheral console that has two or more computer bays that can receive a removable
`
`computer module or ACM. Multiple computer module system can function as a personal
`
`computer with only one A