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`- Micron Ex. 1040,p. 1
`Micron v. Vervain
`IPR2021-01548
`
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`
`Micron Ex. 1040, p. 1
`Micron v. Vervain
`IPR2021-01548
`
`

`

`Designing with
`Flash Memory
`
`The definitive guide to
`designing flash memory
`hardware and software
`for components and
`PCMCIA cards
`
`Micron Ex. 1040, p. 2
`Micron v. Vervain
`IPR2021-01548
`
`

`

`
`
`Micron Ex. 1040,p. 3
`Micron v. Vervain
`IPR2021-01548
`
`Micron Ex. 1040, p. 3
`Micron v. Vervain
`IPR2021-01548
`
`

`

`Designing with
`Flash Memory
`
`Brian Dipert & Markus Levy
`
`The definitive guide to
`designing flash memory
`hardware and software
`for components and
`PCMCIA cards
`
`Annabooks
`San Diego
`
`Micron Ex. 1040, p. 4
`Micron v. Vervain
`IPR2021-01548
`
`

`

`Designing with Flash Memory
`BY
`BRIAN DIPERT & MARKUS LEVY
`
`PUBLISHED BY
`
`Annabooks
`11848 Bernardo Plaza Ct., Suite 110
`San Diego, CA 92128
`USA
`
`619-673-0870
`
`Copyright© Annabooks 1993, 1994
`
`All rights reserved. No part of the contents of this book may be
`reproduced or transmitted in any form or by any means without the prior
`written permission of the publisher, except for the inclusion of brief
`quotations in a review.
`
`Printed in the United States of America
`
`ISBN 0-929392-17-5
`Second Printing April 1994
`
`Micron Ex. 1040, p. 5
`Micron v. Vervain
`IPR2021-01548
`
`

`

`Contents
`
`Chapter One: Introduction ........................................................................ 1
`Flash Memory Compared to Other Memories ............................. 3
`ROM (Read-Only-Memory) .......................................... .4
`RAM (Random-Access-Memory) ................................... 4
`EEPROM (Electrically-Eraseable-Programmable-Read-
`Only-Memory) ................................................................ 5
`Magnetic Mass Storage ................................................... 5
`An Emerging Alternative: Flash Memory ....................... 5
`A Preview of Chapters to Follow ................................................. 7
`Chapter Two: Flash Memory Applications ............................................. 11
`Data Accumulation ........................ ............................................ 12
`Medical Instrumentation ............................................... 12
`Flight Recorders ............................................................ 13
`More Data Accumulation Examples ............................. 13
`Why Flash Memory for Data Acquisition? ................... 14
`Data/Lookup Table Storage ....................................................... 14
`PBX Switcher ................................................................ 14
`Laser Printers ........................................................ , ....... 15
`Why Flash Memory For Data/Lookup Table Storage? .16
`Embedded Code Storage ............. .............. , .............. , ................. 16
`PC BIOS ........................................................................ 16
`Digital Cellular Phones ................................................. 18
`More Embedded Code Storage Applications ................ 18
`Why Flash Memory for Embedded Code Storage? ...... 18
`File Storage ....................................................................... , ........ 19
`Flash Memory Promotes Longer Battery Life .............. 19
`HDD Densities with FDD Interchange ......................... 20
`Summary .......... , .............................................. , .......................... 21
`Chapter Three: Flash Memory Technologies ......................................... 23
`NOR Flash Memory .. ....................... .......................................... 25
`Program ......................................................................... 27
`Erase ....................................................... ....................... 28
`Negative Gate Erase ............... ....................................... 29
`Overerase ...................... , ............. , .......................... : ...... 29
`NOR Flash Memory Specifications .............................. 30
`
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`IPR2021-01548
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`

`u Designing with Flash Memory
`
`Flash EEPROM ......................................................................... 32
`Erase ......................................... .................................... 33
`Programming ................................................................ 34
`Flash EEPROM Memory Specifications ...................... 35
`NAND Flash Memory ............................................................... 36
`Program and Erase ........................................................ 36
`NAND Flash Memory Specifications .......................... 36
`What's All This Cycling Stuff, Anyway? .................................. 38
`Failure Analysis ............................................................ 40
`Oxide Breakdown ......................................................... 40
`Electron Trapup ............................................................ 41
`Mean Time Before Failure ........................................... 41
`Extended Cycling-The Vendor's Options ..................... 42
`Extended Cycling-What Can You Do? ........................ 43
`Summary .................................................................................... 44
`Chapter Four: Packaging Options and Update Alternatives ................... 45
`Packaging Options ..................................................................... 46
`DIP (Dual In-Line Package) ......................................... 46
`LCC (Leaded/Leadless Chip Carrier) ........................... 49
`SOJ (Small-Outline J-Lead) ......................................... 52
`SOP(Small Outline Package) ...................................... 54
`TSOP (Thin Small Outline Package) ........................... 54
`SIMM (Single In-Line Leadless Memory Module) ..... 59
`PCM CIA Flash Memory Cards .................................... 62
`Flash Drives .................................................................. 66
`Update Options .......................................................................... 68
`Off-Board PROM Programming .................................. 68
`On-Board Update .......................................................... 69
`In-System Write ............................................................ 71
`Summary .................................................................................... 72
`Chapter Five: Hardware Interfacing to Flash Memory Components ..... 73
`Hardware Interfacing Fundamentals ..................................... .' ... 73
`Chip Enable .................................................................. 75
`Addresses ...................................................................... 7 5
`Data In/Out ................................................................... 76
`Output Enable ............................................................... 76
`Write Enable ................................................................. 77
`
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`IPR2021-01548
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`

`Contents
`
`iii
`
`WE-Less Flash Memories ............................................. 78
`The V PP Program/Erase Voltage ................................................ 79
`Switching Vpp ................................................................ 80
`V PP Feedback ................................................................. 81
`Advanced Hardware Interfacing ................................................ 82
`The PWD Input ............................................................. 82
`RY/BY Output .............................................................. 84
`Interpreting Datasheet AC Parameters ....................................... 85
`General Observations .................................................... 90
`Naming Conventions ..................................................... 91
`Capacitive Loading and Effects .................................... 92
`AC Read Characteristics ............................................... 93
`Read Specification Clarifications ................................. 94
`AC Write Characteristics .............................................. 95
`Write Specification Clarifications ................................ 96
`Performance Enhancements ....................................................... 98
`Caching ......................................................................... 9 8
`Shadowing ..................................................................... 98
`Hardware Interleaving ................................................... 99
`Summary .................................................................................. 104
`Chapter Six: Power Requirements and Design Techniques ................. 105
`The V cc Operating Voltage ..................................................... 106
`Read Mode (IccR) ........................................................ 108
`Standby Mode (Ices) ................................................... 109
`Deep Powerdown Mode (Icco) .................................... 110
`Program Mode (lccwllccP) ........................................... 111
`Erase Mode (Icc8 ) ....................................................... 112
`The Vpp Program/Erase Voltage .............................................. 113
`Read/Standby Mode (IPPR and lpps) ............................. 114
`Deep Powerdown Mode (IpPD) .................................... 114
`Program Mode (lppw/Ippp) ............................................ 115
`Erase Mode (Ipp8 ) ........................................................ 115
`V PP Generation Techniques ...................................................... 117
`Directly from a 12V Regulated Supply ....................... 117
`Converting from 12V Unregulated ............................. 118
`Converting from a Lower Voltage .............................. 118
`Converting from a Higher Voltage ............................. 120
`
`Micron Ex. 1040, p. 8
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`IPR2021-01548
`
`

`

`r~,,~,
`
`t-· ·.
`
`iv Designing with Flash Memory
`
`General Characteristics of Voltage Converters .......... 121
`Totally Modular Solutions ......................................... 122
`Bypass and Decoupling Capacitive Filtering .......................... 122
`Decoupling Capacitors-V cc ........................................ 123
`Bypass Capacitors-Vcc ............................................... 124
`Decoupling Capacitors-Vpp ........................................ 124
`Mixed-Voltage System Design ................................................ 125
`3.3 Volt to 5 Volt Interfaces ....................................... 125
`5V to 3.3V Interfaces ................................................. 127
`Bidirectional Bus Interface .................................. ....... 130
`Power Management Techniques .............................................. 130
`Summary ................................... ~.............................................. 13 2
`Chapter Seven: Software Interfacing to Flash Memory ....................... 133
`Why Is Flash Memory Controlled By System Software? ....... 134
`EPROM Programming Algorithm .............................. 134
`Flash Memory Programming ...................................... 136
`The NOR Bulk-Erase Flash Memory Algorithms ................... 139
`The Program Algorithm .............................................. 140
`The Chip Erase Algorithm .......................................... 143
`Summary of First-Generation Programming/Erase
`Characteristics ............................................................ 148
`The NOR Fully-Automated Flash Memory Algorithms ......... 149
`Intel Automated Program Algorithm .......................... 151
`Intel Automated Block Erase Algorithm .................... 156
`Intel Automated Erase Suspend/Resume Algorithrr1 .. 160
`Alternative Automated Algorithms ............................ 162
`General Automated Algorithm Techniques-Multiple
`Block Erase ................................................................. 168
`General Automated Algorithm Techniques-Page
`Programming .............................................................. 168
`General Automated Algorithm Techniques-Aborting
`Internal Automation .................................................... 168
`General Automated Algorithm Techniques-The
`RY/BY Output. ........................................................... 169
`Software Polling or Hardware Interrupt: Which Should
`You Use? ...... .............................................................. 169
`Update Routines ...................................................................... 170
`
`Micron Ex. 1040, p. 9
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`IPR2021-01548
`
`

`

`=
`
`Contents v
`
`Flexible Design Techniques ........................................ 172
`System Boot Code Contents .................................................... 173
`Software Interface to Flash Cards, SIMMs and Multi-
`Component Arrays ................................................................... 174
`Parallel Program of Non-Automated Flash
`Memories ................................................................... ,.176
`Parallel Erase of Non-Automated Flash Memories .... 179
`Parallel Program/Erase of Automated Flash
`Memories .................................................................... 183
`Summary ............ , ...................... ......... , ... , ........................ , ........ 184
`Eight: Hardware Interfacing Considerations for Flash Cards 187
`A Flash Memory Array Within a Card .................................... 187
`PCMCIA Flash Memory Cards ................................................ 188
`PCMCIA 1.0 ............................................................... 188
`PCMCIA 2.0 ............................................................... 189
`PCMCIA Signal Definitions ....................................... 193
`Host System Implementations ..................................... 211
`Implementing PCM CIA 2.0 Hardware .................................... 220
`Proprietary or Commercial Interface Controllers ....... 220
`Supporting Hardware for PCMCIA-Interface
`Controllers ................................................................... 220
`Accessing Flash Memory Cards with PCMCIA-
`Interface Controllers ................................................... 222
`More On Buffering ..................................................... 222
`Summary .................................................................................. 225
`Chapter Nine: Flash Memory File Systems .......................................... 227
`Introduction .............................................................................. 227
`Flash Memory Solid-State Drive Form Factors .......... 227
`Flash Memory Solid-State Drives Require Special
`Drivers ......................................................................... 228
`Disk-Drive Basics .................................................................... 229
`DOS Data Structures ................................................... 231
`Device Drivers .. .......................................................... 233
`Flash File System Designs ....................................................... 238
`Measuring Drive Usage .............................................. 239
`The Disk-Drive Emulators .......................................... 239
`Flash Optimized File Systems ..................................... 240
`
`Micron Ex. 1040, p. 10
`Micron v. Vervain
`IPR2021-01548
`
`

`

`Designing with Flash Memory
`
`The Disk-Drive Emulators ....................................................... 241
`Primitive Flash File Systems ...................................... 242
`Full-Featured Disk-Drive Emulators .......................... 247
`Flash Optimized FSSD1s .......................................................... 252
`Accessing the Flash-Optimized FSSD ....................... 253
`Microsoft's Flash File System Design Criteria ........... 253
`Functional Description ............................................... 256
`Flash File System Evaluation .................................................. 265
`Performance - File Transfer Rate ............................... 265
`Performance - Clean-Up Efficiency ........................... 267
`Performance - Hot and Cold File Management. ......... 268
`Reliability - Cycle Leveling ....................................... 268
`Reliability - Failure Recovery Modes ........................ 269
`System Level Issues - File System Overhead ............. 270
`System Level Issues - Ease of Use ............................. 270
`Summary .................................................................................. 271
`Chapter Ten: PCM CIA Software ......................................................... 273
`Introduction .................................................... , ........................ 273
`The Areas of Software Compatibility ..................................... 274
`The PCMCIA-ExCA Relationship .......................................... 277
`Flash File System Models ....................................................... 279
`The Original Flash File System Model ...................... 279
`What's Really Necessary? ........................................... 282
`Socket Services ........... ............................................................. 282
`Defining the Adapter Hardware ................................. 283
`Accessing Socket Services ......................................... 284
`Installing Socket Services ........................................... 286
`The Socket Services Functions, ................................... ,, .......... 287
`Non-Specific Functions .............................................. 289
`Adapter Functions .............. ........................................ 292
`Window Functions ..................................................... 304
`Fields In The I/0 Window Characteristics Table ....... 317
`Window Size .............................................................. 318
`Detecting Card Insertion ............................................. 347
`Error Detection and Correction Functions ................. 347
`Socket Service Design Considerations and Benefits ............... 348
`The Card Information Structure .............................................. 349
`
`Micron Ex. 1040, p. 11
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`IPR2021-01548
`
`

`

`Contents vu
`
`Accessing the Card Information Structure ................. 350
`The Device Information Tuple ................................... 356
`Card Services ........................................................................... 363
`What is Card Services? .............................................. 3 64
`Do You Need Card Services? .......... , .......................... 366
`Flash Card Memory Technology Drivers ............................... 366
`Why Support New Cards? .......................................... 367
`Flash Card Driver Functions ...................................... 367
`Interfacing to the Flash Card Driver .......................... 368
`Installing the Flash Card Drivers ............................... 368
`Summary ................................................................................. 371
`Appendix A: Flash Memory Component Vendors .............................. 373
`Appendix B: Flash Memory Card/Drive Vendors ............................... 375
`Appendix C: Flash Memory Component and Card Programmers ....... 379
`Appendix D: Component and Card Socket and Adapter Vendors ....... 383
`Appendix E: 12V Converters ............................................................... 387
`Appendix F: Flash Memory Card Readers and Writers ....................... 391
`Appendix G: Flash File Systems .......................................................... 395
`Appendix H: PCMCIA and Software Vendors .................................... 397
`Appendix I: PCMCIA Compliance Testing Facilities ......................... 399
`Appendix J: PCMCIA Card Types ....................................................... 401
`Appendix K: PCMCIA Controller Register Functions and Vendors ... 403
`Appendix L: INT 21H Standard Disk-Related Functions .................... 409
`Appendix M: Sample Flash File System Benchmarking Code ............ 411
`
`Micron Ex. 1040, p. 12
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`IPR2021-01548
`
`

`

`viii Designing with Flash Memory
`
`Figures
`
`1.1: The Exploding Flash Memory Market ............................................. 1
`1.2: Flash Memory Cell Simplicity Enables Cost-Effective
`Manufactming.~ .. ............. , ...................................................... , .......... 2
`1.3: Average Selling Price for 1 Mbyte of Flash Memory Storage ......... 3
`1.4: · Flash Memory Satisfies Many Ideal Memory Attributes ................. 7
`2.1: BIOS Glues Common Software to Unique Hardware .................... 17
`2.2: Energy Consumed During Various Acitivties ................................ 20
`2.3: Blan Flash Memory Card Reader/Writer ........................................ 21
`3.1: Dataquest 1992 Flash Memory Market Share (by company) ......... 24
`3.2: ETOX™ Flash Memory Cell Similarities Leverage EPROM
`Learning Curve .......... ..................................................................... 25
`3.3: ETOX™ Flash Memory Cell Being Read ...................................... 26
`3.4: NOR Flash Memory Array Interconnect.. ...................................... 26
`3.5: ETOX™ Flash Memory Cell Being Programmed ................. ........ 27
`3.6: EPROM Cell Being UV Erased ..................................................... 28
`3.7: ETOX™ Flash Memory Cell Being Erased ................................... 28
`3.8: Negative Gate Erase ..... ............................................................. ..... 30
`3.9: Iterative Basic Flash Memory Erase Algorithm ............................. 31
`3.10: EEPROM-Based Flash Memory Cell ........................................... 33
`3.11: EEPROM-Based Flash Memory Cell Being Erased .................... 34
`3.12: EEPROM-Based Flash Memory Cell Being Programmed ........... 35
`3.13: NAND Flash Memory Cell Being Read ....................................... 36
`3.14: NAND Flash Memory Array Interconnect.. ................................. 37
`3.15: NAND Flash Memory Cell Being Programmed .......................... 37
`3.16: NAND Flash Memory Cell Being Erased .................................... 38
`4.1: DIP (Dual In-Line) Package Dimensions ....................................... 47
`4.2: DIP/ TSOP Package Comparison (Actual Size) ............................ 48
`4.3: LCC (Leaded Chip Carrier) Package Dimensions ......................... 50
`4.4: Trace Layout Comparison: PSOP vs. PLCC .................................. 51
`4.5: Small Outline J-Lead (SOJ) Package Dimensions ......................... 53
`4.6: Small Outline Package (SOP) Dimensions .................................... 55
`4.7: TSOP (Thin Small Outline Package) Dimensions ......................... 56
`4.8: Standard and Reverse TSOP Packages ........................................... 57
`4.9: TSOP Serpentine Package Layout .................................................. 58
`4.10: SIMM Package Dimensions ......................................................... 60
`
`Micron Ex. 1040, p. 13
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`IPR2021-01548
`
`

`

`Contents
`
`ix
`
`4.11: SCM Microsystems Flash Memory SIMM Pinout ...................... 61
`4.12: PCMCIA / JEIDA Type 1 PC Card Package Dimensions ........... 64
`4.13: PCM CIA I JEIDA Type 2 PC Card Package Dimensions ........... 64
`4.14: Mass Storage Architecture ........................................................... 66
`4.15: Flash Drive Architecture .............................................................. 66
`4.16: Design Considerations During On-Board Update ........................ 69
`4.17: Key Elements of In-System Update ............................................. 70
`5 .1: Processor/Flash Memory Interface ( separate address and data
`buses, distinct read and write, one flash memory) ......................... 74
`5 .2: Processor/ Flash Memory Interface (multiplexed address/data
`lines, multiplexed read/write, two x8 flash memories) .................. 7 4
`5.3: Vpp Switch Circuit .......................................................................... 80
`5.4: Maxim MAX705, Used for Vee and Vpp Monitoring .................... 82
`5.5: Intel 28F001BX Boot Block Flash Memory Map .......................... 83
`5.6: Wired-OR RY/BY Implementation ............................................... 85
`5.7: Flash Memory Read Access Time Partitioning ............................. 86
`5.8: AC Input/Output Reference Waveform ......................................... 86
`5.9: AC Testing Load Circuit. ............................................................... 87
`5 .10: High Speed Input/ Output Reference Waveform ........................ 87
`5 .11: High Speed AC Testing Load Circuit .......................................... 87
`5.12: AC Waveforms for Read Operations ........................................... 88
`5.13: AC Waveforms for Write Operation .. ...................... .................... 89
`5.14: Example Ordering Information Table .......................................... 90
`5.15: Hardware Interleaving - Utilizes Common CE, Unique OE
`and WE ......................................................................................... 100
`5.16: Hardware Interleaving - State Transition Diagram .................... 103
`6.1: V cc Current (Typical) - Read Mode ............................................ 109
`6.2: V cc Current (Typical) - Program Mode ....................................... 111
`6 .3: V cc Current (Typical) - Erase Mode ............................................ 112
`6.4: Vpp Current (Typical) - Program Mode ....................................... 114
`6. 5: V PP Current (Typical) - Erase Mode ............................................ 115
`6.6: Vpp Current (Typical)- Beginning of an Erase Pulse .................. 116
`6.7: Linear Technology LTl 110 5V to 12V Converter ...................... 118
`6.8: Motorola MC34063A 5V to 12V Converter ................................ 119
`6.9: Maxim MAX732 3V to 12V Converter ....................................... 119
`6.10: Maxim MAX667 12V Linear Voltage Regulator ...................... 120
`6.11: Linear Technology LTll 11 Voltage Step Down Switcher ........ 120
`
`Micron Ex. 1040, p. 14
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`IPR2021-01548
`
`

`

`x Designing with Flash Memory
`
`6.12: Interfacing a 3.3V Device to a SV Device (TIL Inputs) .......... 126
`6.13: Interfacing a 3.3V Device to a SV Device (CMOS Inputs) ...... 127
`6.14: Interfacing a SV Device to a 3.3V Device ................................. 128
`6.15: SV to 3.3V Direct Interface. Overbiasing the ESD Input Diodel28
`6.16: Interfacing a SV Device to a 3.3V Device - Series Resistor
`Voltage Drop ................................................................................ 129
`6.17: Interfacing a SV Device to a 3.3V Device.- ............................... 129
`7.1: EPROM Programming Algorithm (Simplified Form) .................. 135
`7.2: Intel First Generation Flash Memory Non-Automated Programming
`Algorithm ............................................................... ....................... 137
`7.3: Intel First Generation Flash Memory Non-Automated Erase
`Algorithm ......... , ............................. ~ .............................................. 144
`7.4: Intel Automated Flash Memory Program Algorithm ................... 152
`7.5: Intel Automated Flash Memory Status Register .......................... 155
`7 .6: Intel Automated Flash Memory Block Erase Algorithm .............. 157
`7.7: Intel Automated Erase Suspend I Resume Algorithm .................. 161
`7.8: AMD SY-Only Automated Program Algorithm ........................... 165
`7.9: AMD 5V-Only Automated Erase Algorithm ............................... 166
`7.10: AMD 5V-Only Automated Data Polling and Toggle Bit
`Algorithm ...................................................................................... 167
`7 .11: Parallel Programming of Non-Automated Flash Memories ....... 177
`7.12: Parallel Erase of Non-Automated Flash Memories .................... 180
`7 .13: Parallel Program/ Erase of Automated Flash Memories ........... 184
`8.1: PCMCIA 1.0 Flash Memory Card ................................................ 190
`8.2: Intel Series 2 Flash Memory Card ................................................ 191
`8.3: PCMCIA Electrical Interface Categories ..................................... 193
`8.4: PCMCIA Read Timing Waveform ............................................... 195
`8.5: Aliasing Caused by Inadequate Address Line Decoding ............. 195
`8 .6: Internal Component Arrangement Dictated by Flash Memory
`Architecture .. .. .. .. . .. . .. .. . . .. . . . .. . . . . . . . .. . . . . . . . . . . . . . . . . .. . . .. . . . . . . . . .. . . . .. .. . . . . .. . . . 197
`8.7: Byte-Wide Access Mode Circuitry for 8-Bit Systems ................. 198
`8.8: RDY/BSY Background Sequence ................................................ 201
`8.9: Use of RDY/BSY in Multiple Device Operations ....................... 202
`8.10: Standard PCMCIA RDY/BSY Waveform ................................. 203
`8.11: High-Performance RDY/BSY Waveform for Multiple Device
`Operations ..................................................................................... 204
`
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`

`

`Contents Xl
`
`8.12: PCMCIA Pin Lengths Allow Proper Sequencing of Card
`Signals .......... ......... ....................... .................. .............................. 205
`8.13: Example Card Detection Circuitry ............................................. 206
`8.14: PCMCIA Controller Chip Controls Voltage Switching ............ 209
`8.15: Mapping Memory Through an 1/0 Port ..................................... 212
`8.16: The Data Bus Generates the Flash Memory Addresses ...... ....... 213
`8.17: Counters Enhance I/O-Mapped Read Access ............................ 213
`8.18: Linearly-Mapped Memory Addressing ... ................................... 215
`8.19: DOS Memory Map .............................. ....................................... 216
`8.20: Memory Paging Circuitry .......................................................... 217
`8.21: Implementing a PCMCIA 1.0 Interface in an Embedded
`Application ................................... .................. ......... ..................... 219
`8.22: The Intel 82365SL PCMCIA Interface Controller Requires a
`Minimal Amount of Support Circuitry ........................ ................. 221
`9 .1: Flash Memory Manager and Operating System Interface ........... 230
`9.2: Disk Drive Tracks and Sectors ..................................................... 230
`9 .3: File Directory and FAT Modification .......................................... 232
`9.4: New Device Drivers Supersede Default Drivers ......................... 234
`9.5: Using the Disk Service Interrupts to Access Disk Sectors .......... 236
`9.6: Accessing Devices Using File Handles, Not at the Sector Level 238
`9.7: Flash Memory Solid-State Drive System Layers ......................... 240
`9.8: Using an Interrupt Filter ............................................................... 242
`9.9: Creating a Disk Image in Flash Memory ..................................... 243
`9.10: A Flash Memory Array Pre-Formatted with a Blank FAT and
`Root Directory ................... ..................................... .... .................. 245
`9 .11: Sector-Level Modification Requires Considerable Overhead ... 246
`9.12: One-to-One Correspondence Between FAT Entries and
`Sectors ........ .... .............................................................................. 248
`9.13: Three-Step Cleanup Operation: Copy, Erase, and Block
`Renumbering .................................... ............. ............................... 250
`9.14: Defragmentation Utility Concatenates ....................................... 252
`9.15: Flash Memory Solid-State Drive Accessing Methods ...... ......... 254
`9.16: Microsoft's First FFS Functioned Like a WORM Drive ........... 255
`9.17: Files are Always Written to the Next Available Free Space ..... 257
`9.18: Linked List Pointers Locate Nest File in the Chain ................... 258
`9.19: Each Subdirectory has Its Own Linked List ................