United States Patent (19)
`Tobita et al.
`
`54 INFORMATION PROCESSING SYSTEM
`75 Inventors: Tsunehiro Tobita; Jun Kitahara, both
`f Yokohama: Takashi T.
`hi
`EEEN"
`Sr.'s Sh Hate Kawasaki;
`uKiniro Seki, Yokohama, Hajime
`Yamagami, Ebina; Takashi Totsuka,
`Machida; Takeshi Wada, Akishima;
`Yosio Takaya, Funabashi; Manabu
`Saito, Chiba-ken; Kenichi Kaki, Zama;
`Takao Okubo, Oume, Takashi
`Kikuchi, Sagamihara; Masamichi
`Kishi, Tachikawa, Takeshi Suzuki,
`Inagi: Shi
`Kadowaki. Akishi
`ss Star" aClOWak, AKIShima,
`
`73 Assignees: Hitachi, Ltd., Tokyo; Hitachi Keiyo
`Engineering Co., Ltd., Chiba-ken;
`Hitachi ULSI Engineering Corp.,
`Tokyo, all of Japan
`21 Appl. No.: 640,998
`22 Filed:
`Apr. 30, 1996
`O
`O
`Related U.S. Application Data
`62 Division of Ser. No. 225,313, Apr. 8, 1994, Pat. No. 5,530
`673
`. No. ZZS 313, Apr. 8,
`2 u. V-vu- i. w8 - 2- - - 2
`Foreign Application Priority Data
`
`30
`
`M", 1. E. E. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 5-81642
`E. 14, 1993
`|JP E. - - - -
`Jul. 15, 1993
`|JP EN r
`Oct. 1, 1993
`Pi Japan. S-246.520
`2
`(51) Int. Cl." ..................................................... G11C 16/06
`52 U.S. Cl. ................................ 365/185.09; 365/189.07;
`365/185.11; 365/185.22; 365/230.03
`58 Field of Search ......................... 365/185.01, 18907,
`365/185.09, 185.11, 185.22, 230.01, 230.03
`References Cited
`U.S. PATENT DOCUMENTS
`
`56)
`
`USOO5862083A
`Patent Number:
`11
`(45) Date of Patent:
`
`5,862,083
`Jan. 19, 1999
`
`4,563,752
`
`1/1986 Pelgrom et al. ........................ 364/900
`(List continued on next page.)
`FOREIGN PATENT DOCUMENTS
`0392895 10/1990 European Pat. Off..
`(List continued on next page.)
`OTHER PUBLICATIONS
`
`Patent Abstracts of Japan, vol. 16, No. 382, Aug. 14, 1992.
`
`ABSTRACT
`
`(List continued on next page.)
`Primary Examiner Viet Q. Nguyen
`Attorney, Agent, or Firm- Antonelli, Terry, Stout & Kraus,
`LLP
`57
`57
`A control method and System when a flash memory is used
`as a Semiconductor disk or a main memory in an information
`processing System. A Semiconductor file System comprises a
`first nonvolatile memory electrically erasable, a Second
`nonvolatile memory not electrically erasable, a volatile
`memory, a controller which controls the memories, and a
`control Section which controls the controller wherein a
`physical address corresponding to a logical address specified
`from an external System is accessed. The first nonvolatile
`memory Stores data for the external System to perform
`operations, first management information indicating the
`correspondence between physical addresses at which the
`
`data is Stored and logical addresses, and Second management
`information indicating a State of the first nonvolatile
`memory. The Second nonvolatile memory previously Stores
`interface information required for inputting and outputting
`the data from and to the external System and read-only data
`of the data. The controller comprises control means for
`determining a physical Sector address forming predeter
`mined high-order bits of the physical address when data is
`output from the first nonvolatile memory or when data is
`input to the volatile memory, means for Storing the deter
`mined physical Sector address, and means for consecutively
`generating addresses in a Sector determined by the physical
`Sector address.
`
`4,530,054 7/1985 Hamstra et al. ........................ 364/200
`
`15 Claims, 103 Drawing Sheets
`
`
`
`EDA
`NeFACE
`BUS
`
`? loos OCAL MEMORY
`
`NONVOLATILE MEMORY
`fostOREATTRIBUTE (MASK RM }
`
`NFORMATION
`OO3
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`
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`
`
`
`
`
`
`
`
`CONTROL
`MCROCOMPUTER
`
`HPE, Exh. 1010, p. 1
`
`

`

`
`
`5,862,083
`Page 2
`
`3200872 7/1983 Germany.
`1-235075 9/1989 Japan.
`2-189790 7/1990 Japan.
`2-292798 12/1990 Japan.
`3-25798 2/1991 Japan.
`3-30034 2/1991 Japan.
`3-283094 12/1991 Japan.
`4-243096 8/1992 Japan.
`5-027924 2/1993 Japan.
`5-028039 2/1993 Japan.
`5-204561
`8/1993 Japan.
`5-241741
`9/1993 Japan.
`2251323 7/1992 United Kingdom.
`2251324 7/1992 United Kingdom.
`WO92/18928 10/1992 WIPO.
`WO93/11491 6/1993 WIPO.
`
`OTHER PUBLICATIONS
`
`Patent Abstracts of Japan, vol. 10, No. 30, Feb. 5, 1986.
`Computer Technology Review, “Flash Memory for Top
`Speeds in Mobile Computing”, vol. 12, No. 7, Jun. 1992, pp.
`36-37.
`Communications of the ASSociation for Computing Machin
`ery, “Asymmetric Memory Hierarchies”, vol. 16, No. 4,
`Apr., 1973, pp. 213-222.
`
`U.S. PATENT DOCUMENTS
`4,899,272 2/1990 Fung et al. ......................... 365/230.03
`4.924,375
`5/1990 Fung et al. .............................. 364/200
`5,043,940 8/1991 Harari ............
`... 365/168
`5,053,990 10/1991 Kreifels et al.
`... 395/425
`5,065,364 11/1991 Atwood et al. ...
`... 36.5/218
`5.245,572 9/1993 Kosonocky et al.
`... 36.5/218
`5,263,003 11/1993 Cowles et al. ...
`... 36.5/900
`5,267,218 11/1993 Elbert ......
`... 36.5/900
`5,268.870 12/1993 Harari ........
`... 36.5/218
`5,280,447
`1/1994 Hazen et al. ...
`... 36.5/218
`5,295.255 3/1994 Malecek et al. ..
`... 395/425
`5,297,148 3/1994 Harari et al. ...
`... 371/102
`5,341,339 8/1994 Wells .............
`... 36.5/218
`5,341,489 8/1994 Heiberger et al.
`... 395/425
`5,359,569 10/1994 Fujita et al. ............................ 365/229
`5.530,673
`6/1996 Tobita et al. ...
`365/185.09
`5.535,328 7/1996 Harari et al.
`... 36.5/218
`5,671,229 9/1997 Harari .....
`... 365/200
`5,719,808 2/1998 Harari ................................ 365/185.33
`FOREIGN PATENT DOCUMENTS
`European Pat. Off..
`European Pat. Off..
`European Pat. Off..
`Germany.
`
`O492106
`O52278O
`O56904O
`2.840305
`
`7/1992
`1/1993
`11/1993
`3/1980
`
`HPE, Exh. 1010, p. 2
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 1 of 103
`
`5,862,083
`
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`HPE, Exh. 1010, p. 3
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 2 of 103
`
`5,862,083
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`HPE, Exh. 1010, p. 4
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 3 of 103
`
`5,862,083
`
`FIG. 3
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`HPE, Exh. 1010, p. 5
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 4 of 103
`
`5,862,083
`
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`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet S of 103
`
`5,862,083
`
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`HPE, Exh. 1010, p. 7
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 6 of 103
`
`5,862,083
`
`
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`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 7 of 103
`
`5,862,083
`
`FIG. 7
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`Jan. 19, 1999
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`5,862,083
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`

`U.S. Patent
`
`Jan. 19, 1999
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`Sheet 9 of 103
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`5,862,083
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`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 10 of 103
`
`5,862,083
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`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 11 of 103
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`5,862,083
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`U.S. Patent
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`Jan. 19, 1999
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`5,862,083
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`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 13 0f 103
`
`5,862,083
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`

`

`U.S. Patent
`
`Jan. 19, 1999
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`Sheet 14 of 103
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`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 16 of 103
`
`5,862,083
`
`FG 16
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`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 17 of 103
`
`5,862,083
`
`
`
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`HPE, Exh. 1010, p. 19
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`HPE, Exh. 1010, p. 19
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`

`

`
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`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 18 of 103
`
`5,862,083
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`HPE, Exh. 1010, p. 20
`
`HPE, Exh. 1010, p. 20
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 19 of 103
`
`5,862,083
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`HPE, Exh. 1010, p. 21
`
`HPE, Exh. 1010, p. 21
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 20 of 103
`
`5,862,083
`
`F G. 20
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`HPE, Exh. 1010, p. 22
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 21 of 103
`
`5,862,083
`
`F G. 2
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`8MB (512B/SECTOR
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`HPE, Exh. 1010, p. 23
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 22 of 103
`
`5,862,083
`
`F G. 22
`
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`HPE, Exh. 1010, p. 24
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 23 Of 103
`
`5,862,083
`
`F G. 23
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`
`HPE, Exh. 1010, p. 25
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 24 of 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 26
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 25 of 103
`
`5,862,083
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`

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`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 26 of 103
`
`5,862,083
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`HPE, Exh. 1010, p. 28
`
`HPE, Exh. 1010, p. 28
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 27 Of 103
`
`5,862,083
`
`F G. 27
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`HPE, Exh. 1010, p. 29
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 28 Of 103
`
`5,862,083
`
`SECTOR BUFFER
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`HPE, Exh. 1010, p. 30
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 29 of 103
`
`5,862,083
`
`F. G. 29
`
`ERASURE MANAGEMENT TABLE
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`
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`
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`
`HPE, Exh. 1010, p. 31
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 30 of 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 32
`
`HPE, Exh. 1010, p. 32
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 31 of 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 33
`
`HPE, Exh. 1010, p. 33
`
`
`
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`
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`
`
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 32 of 103
`
`5,862,083
`
`F G. 32A
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`HPE, Exh. 1010, p. 34
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 33 Of 103
`
`5,862,083
`
`FLASH
`
`
`
`F G. 33
`
`PSRAM
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`PHYSICAL
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`TABLE
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`LOGICAL
`SECTOR TABLE
`
`HPE, Exh. 1010, p. 35
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 34 of 103
`
`5,862,083
`
`FLASH
`
`
`
`F. G. 34
`
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`TABLE
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`
`HPE, Exh. 1010, p. 36
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 35 of 103
`
`5,862,083
`
`GeOld
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`HPE, Exh. 1010, p. 37
`
`HPE, Exh. 1010, p. 37
`
`
`
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`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 36 of 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 38
`
`HPE, Exh. 1010, p. 38
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 37 0f 103
`
`5,862,083
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`HPE, Exh. 1010, p. 39
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 38 of 103
`
`5,862,083
`
`8“Ols
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`HPE, Exh. 1010, p. 40
`
`HPE, Exh. 1010, p. 40
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 39 0f 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 41
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`LOL
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`Sheet 40 of 103
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`5,862,083
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`HPE, Exh. 1010, p. 42
`
`HPE, Exh. 1010, p. 42
`
`
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`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 41 of 103
`
`5,862,083
`
`
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`HPE, Exh. 1010, p. 43
`
`HPE, Exh. 1010, p. 43
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 42 of 103
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`cZb
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`HPE, Exh. 1010, p. 44
`
`HPE, Exh. 1010, p. 44
`
`
`
`
`
`
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 43 of 103
`
`5,862,083
`
`FIG. 43
`
`1175
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`DETERMINATION
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`
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`ACCESS SIGNAL
`
`BUS CYCLE
`EXTENSION
`SIGNAL
`
`REFRESHREOUEST SIGNAL
`
`118O
`
`10 CD CLOCK
`(FREQUENCY DIVISION
`BYSYSTEM)
`10 CD CLOCK
`(FREQUENCY DIVISION
`BY MICROCOMPUTER)
`
`
`
`
`
`
`
`
`
`
`
`1181
`
`
`
`
`
`
`
`
`
`
`
`
`
`REFRESH
`CONTROL
`COUNTER
`SECTION
`
`
`
`1176
`
`REFRESH
`REGUEST
`SIGNAL
`GENERATION
`SECTION
`
`
`
`f
`
`1177
`
`1178
`
`REFRESH
`STOOPSIGNAL MCROCOMPUTER
`PSRAMACCESS
`SIGNAL N
`
`PSRAM SECTOR
`TRANSFER SIGNAL
`N
`1188
`
`1187
`
`HPE, Exh. 1010, p. 45
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 44 of 103
`
`5,862,083
`
`FG. 44
`
`
`
`COMMAND
`REGISTER
`WRITE ENABLE
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`CONTROL
`SECTION
`IREO SET
`REGISTER
`
`SIGNAL
`GENERATION
`SECTION
`
`SECTOR
`TRANSFER
`TERMINATION
`COUNTER
`
`
`
`REGISTER SECTION
`
`CONFIGURATION BIT2
`
`STATUS Eiler
`DIGITAL OUTPUTBIT2
`REGISTER
`
`INTERRUPT SOURCE
`REGISTER
`
`MICROCOMPUTER
`
`HPE, Exh. 1010, p. 46
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 45 of 103
`
`5,862,083
`
`FIG. 45
`
`1023
`1021
`1020
`1022
`r MCC2 r MCCO
`MCC3 MCC1
`
`
`
`FIXED TO VCC OR GND
`
`1009
`
`CARD CONTROLLER
`
`CONTROL
`SECTION
`
`1050
`
`1196
`
`MEMORY SIZE REGISTER
`
`MASKROM-
`CEN
`DECODER /
`
`MASKROM
`-CEON-3N
`
`MICROCOMPUTER
`
`HPE, Exh. 1010, p. 47
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`Sheet 46 of 103
`FIG. 46
`
`5,862,083
`
`GENERATE OCFA
`INTERRUPT EVERY 1 OOms
`
`1197
`
`1198
`
`
`
`1 199
`
`CLEAR OCFA
`
`
`
`
`
`
`
`YES
`READ FLASH
`MEMORY STATUS
`IS
`2O3
`CERASURE COMPLETEc
`p
`NO
`
`1205
`
`NO
`
`YES
`REGISTER AS
`DESTRUCTION BLOCK
`
`12O7
`
`HPE, Exh. 1010, p. 48
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`Sheet 47 of 103
`FIG. 47
`
`5,862,083
`
`1208
`
`1209
`
`GENERATE CMFOA
`INTERRUPT EVERY 10.4 uS
`
`
`
`CLEAR CMFOA
`
`
`
`
`
`1211
`
`1213
`
`
`
`
`
`READ FLASH
`MEMORY STATUS
`1212
`IS
`WRITE C9MPLETE
`NO
`
`YES
`REGISTER AS
`DESTRUCTION BLOCK
`
`
`
`1216
`
`HPE, Exh. 1010, p. 49
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 48 of 103
`
`5,862,083
`
`FIG. 48
`
`CHP SELECT
`
`
`
`
`
`ADDRESS
`BUS
`
`
`
`
`
`BDIRECTIONAL
`DATABUS
`
`
`
`
`
`CONTROL SIGNAL
`
`
`
`-
`
`T
`
`OEN
`-
`WEN
`
`O
`
`HPE, Exh. 1010, p. 50
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 49 of 103
`
`5,862,083
`
`F. G. 49
`
`42
`
`TIMER
`
`CACHE MEMORY 4OO3
`
`4004
`
`42 2
`
`4OO O ADDRESS ARRAY
`
`C PU D
`OO
`4OO7 O
`O
`
`
`
`
`
`
`
`CONTROLLER
`
`N
`
`4OO5
`
`4OOS
`
`FLASH
`MEMORY
`
`4OO2
`
`
`
`
`
`
`
`HPE, Exh. 1010, p. 51
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 50 0f 103
`
`5,862,083
`
`F G. 5O
`
`HOST BUS
`
`2OO2
`
`2OO3
`
`D MAC
`
`2OO7
`
`2OO6
`
`WRITE
`BUFFER
`
`2OO4.
`
`2OO8
`
`n
`L
`d
`r
`2
`8
`
`
`
`2
`S
`5 CD
`ESP
`ZZ
`
`2OO5
`
`FLASH
`MEMORY
`
`2OOl
`
`HPE, Exh. 1010, p. 52
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 51 0f 103
`
`5,862,083
`
`FIG 51
`
`
`
`
`
`
`
`
`
`MAN ROUTINE
`
`2a
`
`S ACCESS
`REGUEST RECEIVED
`FROM HOST?
`
`
`
`
`
`DOSE DATA
`NOT YET STORED IN FLASH
`MEMORY EXIST?
`
`2C
`
`TRANSFER FROM WRITE
`BUFFER TO FLASH MEMORY
`
`
`
`ACCESS ROUTINE
`
`RESTORE TO STATE
`BEFORE INTERRUPT
`
`HPE, Exh. 1010, p. 53
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 52 of 103
`
`5,862,083
`
`FIG 52
`
`ACCESS ROUTINE
`
`RECORD STATUSAT
`INTERRUPT
`
`3
`3.
`
`3b
`
`READ
`
`WRITE
`
`TO WRITE ACCESS
`(FIGURE 53)
`
`LOOK UP IN ADDRESS
`TRANSLATION TABLE
`AND GRASP MEMORY ADDRESS
`
`3C
`
`SET AND START DMAC
`
`3d
`
`READ DATA AND TRANSFER
`IT TO HOST BUS
`
`3e
`
`RETURN TO MAIN ROUTINE
`
`HPE, Exh. 1010, p. 54
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 53 of 103
`
`5,862,083
`
`FIG 53
`
`WRITEACCESS
`
`4a
`
`
`
`NO
`
`REFERENCE TRANSLATION
`TABLE AND GRASP LOCATION
`
`4b.
`
`UPDATE TRANSLATION TABLE
`AND ERASE FLASH MEMORY
`
`SET STORAGE LOCATION
`AND REGISTER T IN
`TRANSLATION TABLE
`
`4C
`
`SET AND START DMAC
`
`4d
`
`STORE DATA FROM HOST
`NWRITE BUFFER
`
`4e
`
`RETURN TO MAN ROUTINE
`
`HPE, Exh. 1010, p. 55
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 54 of 103
`
`5,862,083
`
`F.G. 54
`
`MAN ROUTINE
`
`
`
`DOSE DATA
`NOT YET STORED IN FLASH
`MEMORY EXIST?
`
`TRANSFER FROM WRITE BUFFER
`TO FLASH MEMORY
`
`
`
`
`
`
`
`HPE, Exh. 1010, p. 56
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 55 of 103
`
`5,862,083
`
`FIG. 55
`
`MAIN ROUTINE
`
`
`
`
`
`
`
`
`
`IS ACCESS
`REGUEST RECEIVED
`FROM HOST?
`
`YES - ACCESS ROUTINE
`
`RESTORE TO STATE
`BEFORE INTERRUPT
`
`
`
`SPOWER OFF
`PROCESS RECURED?
`
`YES
`
`TRANSFER ALL, DATA
`FROM WRITE BUFFER
`TO FLASH MEMORY
`
`SAVE TRANSLATION
`TABLE
`
`
`
`
`
`NO
`
`
`
`
`
`DOSE DATA
`NOT YET STORED IN FLASH
`MEMORY EXIST?
`
`YES
`
`TRANSFER FROM WRITE
`BUFFER TO FLASH MEMORY
`
`HPE, Exh. 1010, p. 57
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 56 of 103
`
`5,862,083
`
`FIG. 56
`
`
`
`
`
`
`
`
`
`
`
`MAN ROUTINE
`
`S ACCESS
`REGUEST RECEIVED
`FROM HOST?
`
`YES ACCESS ROUTINE
`
`
`
`RESTORE TO STATE
`BEFORE INTERRUPT
`
`
`
`SAVE TRANSLATION
`TABLE
`
`
`
`IS ACCESS
`REGUEST RECEIVED
`ROM HOST2
`
`
`
`
`
`DOSE DATA
`NOT YET STORED IN FLASH
`MEMORY EXIST?
`
`
`
`TRANSFER FROM WRITE
`BUFFER TO FLASH MEMORY
`
`HPE, Exh. 1010, p. 58
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 57 Of 103
`
`5,862,083
`
`
`
`
`
`
`
`
`
`
`
`WRITE TIME
`MEASUREMENT
`
`WRITE
`CONTROL
`CIRCUIT
`
`F G. 57
`
`CONTROLLER
`
`2OO4
`
`TRANSLATION
`TABLE
`
`DEGRADATION
`DEGREE
`
`
`
`
`
`
`
`FLASH
`MEMORY
`
`R200
`
`HPE, Exh. 1010, p. 59
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`Sheet 58 of 103
`FIG. 58
`
`5,862,083
`
`FLASH MEMORY WRITE ROUTINE
`
`RETRIEVE LEAST DEGRADED
`BLOCK
`
`9a
`
`START WRITE TIME MEASUREMENTL9
`CIRCUIT AND START WRITE
`
`sc YES
`
`9C
`
`DAGNOSE DEGRADATION DEGREE
`FROM WRITE TIME
`
`9d
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`IS THE
`DEGRADATION DEGREE
`THE WORST VALUE
`No
`
`YES REWRITE DEGRADATION
`DEGREE INFORMATION
`TABLE
`
`HAVE ALL DATA
`BEEN WRITTENT
`
`NO
`
`YES
`
`END
`
`HPE, Exh. 1010, p. 60
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 59 of 103
`
`5,862,083
`
`FIG. 59
`
`WRITE ACCESS
`
`- sec
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`NVALIDATE
`DATAN
`BUFFER
`
`
`
`
`
`UNTRANSFERED
`DATA TO FLASH
`MEMORY?
`
`REFERENCE
`TRANSLATION
`TABLE AND GRASP
`LOCATION
`
`
`
`
`
`UPDATE
`TRANSLATION
`TABLE AND ERASE
`FLASH MEMORY
`
`SET STORAGE LOCATION
`AND REGISTER IT IN
`TRANSLATION TABLE
`
`SET AND START DMAC
`
`STORE DATA FROM HOST
`NWRITE BUFFER
`
`RETURN TO MAN ROUTINE
`
`HPE, Exh. 1010, p. 61
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 60 of 103
`
`5,862,083
`
`FIG 60
`
`TRANSLATION TABLE
`
`
`
`WRITE BUFFER
`LOGICAL | MEMORY
`ADDRESS
`
`BLOCKNO.
`
`FLASH MEMORY
`PHYSICAL SECTOR NO.)
`
`FLAG
`
`CHIP NO.
`
`SECTOR NO.
`
`2
`
`2
`
`3
`
`1
`
`2
`
`3
`
`2
`
`7
`
`HPE, Exh. 1010, p. 62
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 61 of 103
`
`5,862,083
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`K
`
`I/O BUS 3104
`
`-- 31 O1
`HOST SYSTEM
`
`
`
`- 31 O3 NTERRUPT
`SIGNAL
`
`3102 SEMCONDUCTOR
`DISK UNIT
`
`31 O6 SEMICONDUCTOR
`MEMORY
`
`
`
`ERROR INFORMATION
`REGISTER
`31 O5
`
`INTERFACE CIRCUIT
`31 O7
`
`
`
`3116
`INTERNAL
`BUS a
`
`
`
`BUFFER MEMORY
`311
`SEMCONDUCTOR
`DISKCONTROL CIRCUIT
`311 1
`
`31 13 ADDRESS
`BUS
`
`DATA MEMORY
`S ECTION
`
`31 O8
`
`
`
`31 14 DATABUS r
`
`311 O
`3117
`INTERNAL CONTROL
`BUS b
`SIGNAL
`
`MEMORY BLOCK
`MANAGEMENT TABLE
`3112
`
`--------------------------
`ALTERNATE MEMORY
`SECTION
`3109
`
`
`
`HPE, Exh. 1010, p. 63
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 62 of 103
`
`5,862,083
`
`G 62
`MEMORY ADDRESS
`F G.
`32o MAP
`N OOOOOOOH
`OOOO2OOH
`00004 OOH
`OOOO6OOH
`OOOOSOOH
`0000A00H
`
`OOOOOOOH
`
`
`
`
`
`32O2-
`
`
`
`
`
`DFFFFFH
`EOOOOOH
`
`32O3
`
`
`
`DATA
`MEMORY
`AREA
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`32 O
`
`ALTERNATE
`MEMORY
`AREA
`
`lEOOOOOH
`lEOO2OOH
`
`ALTERNATE BLOCK TO BLOCK2
`ALTERNATE BLOCK TO BLOCK 3
`
`
`
`
`
`FFFFFFH
`MEMORY BLOCK
`MANAGEMENT TABLE
`3 2
`N
`
`
`
`200000OH
`
`
`
`
`
`
`
`
`
`
`
`3
`
`r
`stru
`CSS
`ES
`
`
`
`32O5
`
`2OFFFFH
`
`202000OH
`
`32O6
`
`2021FFFH
`2022OOOH
`2022OFFH
`
`E00AOOH
`
`2000OOOH
`2000004H
`2000008H
`200000AH
`200000CH
`
`{-
`
`32 3
`
`3216
`
`0000000H (DATA AREA)
`
`
`
`
`
`-327
`
`32 8
`32 9
`-N- - - -
`322
`
`324
`
`O: UNUSED
`
`32 5
`
`MOST SIGNIFICANT LEAST SIGNIFICANT
`BIT
`BT
`
`HPE, Exh. 1010, p. 64
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 63 of 103
`
`5,862,083
`
`FIG. 63
`
`READ PROCESS
`
`RECEIVE READ INSTRUCTION FROM
`I/O INTERFACE CIRCUIT
`
`READ ADDRESS INFORMATION FROM
`BLOCK REGISTRATION TABLE
`
`33OO
`
`33O1
`
`READ DATA FROM DATA MEMORY SECTION
`BASED ON ADDRESS INFORMATION
`
`3302
`
`TRANSFER DATA TO BUFFER MEMORY
`
`3303
`
`TRANSFER DATA FROM BUFFER MEMORY
`TO /O BUS
`
`3304
`
`END
`
`HPE, Exh. 1010, p. 65
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`Sheet 64 of 103
`F.G. 64
`
`5,862,083
`
`WRITE PROCESS )-- 3400
`
`WRITE DATA INTO
`BUFFER MEMORY 31 15
`
`3401
`
`READ BLOCK ADDRESS
`OF BLOCK INTO WHICH
`DATA IS TO BE WRITTEN
`
`34O2
`
`WRITE BUFFER MEMORY
`CONTENTS INTO DATA
`MEMORY
`
`3403
`
`3404
`
`WRITE ERROR2
`
`YES
`
`NO
`
`FIND EMPTY ALTERNATE
`BLOCK FROM BLOCK
`MANAGEMENT TABLE
`
`3405
`
`YES
`
`
`
`3406
`
`DOES EMPTY
`ALTERNATE BLOCK
`
`NO
`
`3411
`
`WRITE ERROR CODE INTO
`ERROR INFORMATION
`REGISTER AND OUTPUT
`INTERRUPT SIGNAL
`
`REGISTER IN BLOCK
`REGISTRATION TABLE
`AND BLOCK USE TABLE
`
`
`
`PERFORMBLOCK ERASUER
`FOR ALTERNATE BLOCK
`
`WRITE BUFFER MEMORY
`CONTENTSNTO ALTERNATE
`BLOCK
`
`
`
`HPE, Exh. 1010, p. 66
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 65 of 103
`
`5,862,083
`
`FIG. 65
`
`WRITE PROCESS
`
`-u- 34OO
`
`WRITE DATA INTO
`BUFFER MEMORY 31 15
`
`3401
`
`READ BLOCK ADDRESS
`OF BLOCK INTO WHICH
`DATA IS TO BE WRITTEN
`
`3402
`
`WRITE BUFFER MEMORY
`CONTENTS INTO DATA
`MEMORY
`
`3403
`
`3404
`
`WRITE ERROR2
`
`YES
`
`NO
`
`FIND EMPTY ALTERNATE
`BLOCK FROM BLOCK
`MANAGEMENT TABLE
`34O6
`
`
`
`3405
`
`DOESEMPTY
`ALTERNATE BLOCK
`EXIST
`
`NO
`
`35O1
`
`REGISTER IN BLOCK
`REGISTRATION TABLE
`AND BLOCK USE TABLE
`
`34O7
`
`CHANGE EMPTY DATA
`BLOCK TO ALTERNATE
`BLOCK
`
`PERFORM BLOCK ERASON 3408
`FOR ALTERNATE BLOCK
`
`WRITE BUFFER MEMORY 34O9
`CONTENTSNTO ALTERNATE
`BLOCK
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`HPE, Exh. 1010, p. 67
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`Sheet 66 of 103
`FIG. 66
`
`5,862,083
`
`START
`
`FIND EMPTY DATA BLOCK FROM
`MEMORY BLOCK MANAGEMENT
`TABLE
`
`36O1
`
`3602
`
`DOES EMPTY
`DATA BLOCK EXIST
`?
`YES
`
`NO
`
`36O3
`
`3609
`
`SET THE CORRESPONDINGBT
`OF THE BLOCK USE TABLE TO 1
`(USED)
`
`WRITE ERROR INFORMATION
`NTO ERROR INFORMATION
`REGISTER
`
`REGISTER PHYSICAL ADDRESS
`OF THE EMPTY DATABLOCK IN
`BLOCK REGISTRATION TABLE
`
`3604
`
`PERFORMBLOCKERASURE FOR -- 3605
`THE EMATY BLOCK
`
`WRITE BUFFER MEMORY
`CONTENTS INTO THE EMPTY
`BLOCK
`
`3606
`
`WRITE BLOCKNUMBER OF THE
`USED EMPTY BLOCK INTO ERROR
`NFORMATION REGISTER
`
`36O7
`
`OUTPUT INTERRUPT SIGNAL
`
`3608
`
`END
`
`HPE, Exh. 1010, p. 68
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 67 of 103
`
`5,862,083
`
`FIG. 67
`
`INITIALIZATION PROCESS
`
`DETERMINE CAPACITES OF DATA
`MEMORY AREA AND ALTERNATE
`MEMORY AREA
`
`3701
`
`WRITE INITIALIZATION INFORMATION
`INTO INITIALIZATION INFORMATION
`AREA
`
`37O2
`
`INITIALIZE BLOCK REGISTRATION
`TABLE AND BLOCK USE TABLE
`
`3703
`
`3704
`
`
`
`
`
`
`
`HAVE ALL
`BLOCKS BEEN
`INITIALIZED?
`
`YES
`
`INTIALIZE BUFFER MEMORY AND
`ERROR INFORMATION REGISTER
`
`7
`3705
`
`HPE, Exh. 1010, p. 69
`
`

`

`U.S. Patent
`
`Jan. 19, 1999
`
`Sheet 68 0f 103
`
`5,862,083
`
`(
`
`I/O BUS 3104
`
`-- 31 O1
`HOST SYSTEM
`
`- 31 O3 NTERRUPT
`SIGNAL
`
`3102 SEMCONDUCTOR
`DSK UNIT
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ERROR INFORMATION
`REGISTER
`31 O5
`
`INTERFACE CIRCUIT
`31 O7
`
`31 16
`INTERNAL
`BUS a
`
`
`
`
`
`3106 SEMICONDUCTOR
`MEMORY I/O BUS
`
`31 13 ADDRESS
`BUS
`
`MIXED DATA
`MEMORY
`
`
`
`3801
`
`BUFFER MEMORY
`311
`SEMCONDUCTOR
`DISKCONTROL CIRgy, 31 14 DATABUS
`
`
`
`
`
`
`
`311 O
`31 17
`INTERNAL CONTROL
`BUS b
`SIGNAL
`
`MEMORY BLOCK
`MANAGEMENT TAB