United States Patent 15
`4,580,281
`{11] Patent Number:
`Carlton
`Apr. 1, 1986
`[45] Date of Patent:
`
`[54] SELF-ARMING, PRESCALING FREQUENCY
`COUNTER SYSTEM
`
`Inventor: Dale E. Carlton, Portland, Oreg.
`[75]
`[73] Assignee:
`Tektronix, Inc., Beaverton, Oreg.
`[21] Appl. No.: 660,756
`
`[22] Filed:
`
`Oct. 15, 1984
`
`Int. Chet oes HO3K 21/02; HO3K 21/40
`[51]
`[52] U.S. C1. coe cccecesssesscsssecssesesesees 377/31; 377/55;
`377/15; 377/10
`[58] Field of Search ...........ccc00 377/10, 15, 30, 31,
`377/111, 55; 307/200 A
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`3,906,346 9/1975 Hunter oo. csesecsseseneenn serene 377/55
`4,009,443
`2/1977 Coulter et al.
`...
`. 377/30
`4,110,604
`8/1978 Haynes et al. oes 377/10
`4,518,865
`
`5/1985 Iwasaki oo... 307/200 A
`
`Primary Examiner—John S. Heyman
`Attorney, Agent, or Firm—John P. Dellett
`
`[57]
`ABSTRACT
`A self-arming, prescaling frequency counter system
`comprises an armable frequency counter, an envelope
`detector, a prescaling pulse-shaper, and a delaying
`means. The envelope detector detects occurrence of an
`oscillating signal to be frequency measured and trans-
`mits an arming signal to arm the frequency counter for
`the duration of the oscillating signal. The prescaling
`puise-siaper is coupled to receive the oscillating signal
`burst and generate a pulsed test signal of frequency an
`integer fraction oftheoscillating signal frequency. The
`delaying means couples the test signal to the armable
`frequency counter input, delaying receipt of the pulsed
`signal burst until after the counter is armed, and delay-
`ing termination of the pulsed signal until after counteris
`disarmed. To minimize the width of the smallest signal
`burst which can be measured, the delay time is set ap-
`proximately equal
`to the sum of the counter arming
`delay time, the counter disarming delay time and one
`cycle period of the lowest frequency signal to be mea-
`sured by the counter.
`
`14 Claims, 2 Drawing Figures
`
`
` 500,
`
`No
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`~ 74
`-
`| DISPLAY |
`Le ae ae ed
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`Google Exhibit 1038
`Google Exhibit 1038
`Google v. Valtrus
`Google v. Valtrus
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`

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`U.S. Patent
`Vin /
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`610
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`.,600
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`_ Apr. 1, 1986
`
`4,580,281
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`REFERENCE CLOCK
`
`400
`
`
`
`Venin
`
`(
`
`i
`
`|
`
`N/Finn
`
`Ye FUL.PULA}
`|
`tore
`
`COUNTER +ARMEDLTARMING —!——__..
`Yor
`| = LF Ls
`Va to “1
`LSJ LI.
`j
`Ton
`i
`ie—tote
`|
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`N/Firn
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`|
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`
`
`TIME
`
`

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`1
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`4,580,281
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`2
`
`SELF-ARMING, PRESCALING FREQUENCY
`COUNTER SYSTEM
`
`BACKGROUNDOF THE INVENTION
`
`5
`
`The present invention relates in general to armable
`frequency counters for measuring the frequency of an
`oscillating electrical signal burst and in particular to a
`frequency counter system which generatesits own arm-
`ing signal derived from the signal burst being measured.
`Frequency counters typically determine the fre-
`quency of a pulsed signal
`in two ways. In the first
`method, the counter counts the numberof reference
`clock events (which maybe pulses) of known frequency
`that occur between successive input signal events. The
`signal frequency is then computed by dividing the
`knownfrequencyof the reference signal by the number
`of counted reference events. In the second method, the
`counter counts input signal events occurring during a
`known reference period. The frequency of the input
`signal
`is then computed by dividing the number of
`counted input events by the knownreference period. In
`either case the result may be used to drive a digital
`display, the display being updated at the end of each
`count cycle. In prescaled frequency counters, the signal
`to be measured is first applied to a frequency divider
`which outputs a pulse to the counter input upon receipt
`of every Nth signal event where N is a selected integer.
`Prescaling an input signal to a frequency counter per-
`mits higher frequency signal bursts to be measured by
`slower frequency counters.
`Armable frequency counters typically begin operat-
`ing only after receiving an arming signal from external
`circuits. As long as a counter is armedit will continue to
`count input or reference events, computing the signal
`frequency and updating the display at the end of each
`count cycle. After the arming signal is turned off, the
`counter will typically count until the next input signal
`event occurs and then stop counting until it is rearmed.
`To minimize the length of the shortest signal burst
`which can be measured by an armable frequency
`counter, the counter should be armedbefore the signal
`burst begins. It is also important that the arming signal
`end before occurrence of the last input signal event.
`This insures the frequency computed by the counter
`provides a true reading and is not altered by events
`occurring after the end of the signal burst. In the prior
`art, shortsignal bursts weredifficult to frequency mea-
`sure unless a variable width pulse properly synchro-
`nized with the signal burst happenedto be available for
`use as an arming signal. Howeversucha useful variable
`width pulse was not always present. If the signal burst
`occurred at regular intervals and wasof regular length,
`an arming signal of proper length and timing could
`sometimes be generated by adjusting a squarewave
`signal generator while comparing the signal burst and
`the arming signal on a dual trace oscilloscope. How-
`ever, this methodis difficult and time consuming. Fi-
`nally, the method of the prior art is of no use when a
`frequency counteris to be armedfor a single, non-reoc-
`curring signal burst of indeterminate starting and end-
`ing time.
`Therefore what is neededis a self-arming frequency
`counter system for measuring the frequency of a pres-
`caled or non-prescaled signal burst wherein counter
`arming and disarming anticipates the beginning and end
`of the signal being tested.
`
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`
`SUMMARYOF THE INVENTION
`
`The present invention comprises a prescaling,self-
`arming frequency counter including in part an armable
`frequency counter which may operate in either of two
`modes. In the first mode, the counter counts the number
`of reference clock events of known frequency occur-
`ting between successive input signal events, computing
`the signal frequency by dividing the known frequency
`of the reference signal by the reference event count. In
`the second mode, the counter counts inputsignal events
`occurring during a knownreference period, computing
`the signal frequency by dividing the number of counted
`input events by the knownreference period. In either
`case, counter operation begins on receipt of an arming
`signal and terminates with the first input event follow-
`ing termination of the arming signal.
`The present invention further comprises a buffer, a
`prescaling pulse-shaper, an envelope detector, and a
`delay line. The buffer is coupled to receive an oscillat-
`ing signal to be frequency measured and to generate a
`similaroscillating signal offset by an applied offset volt-
`age. The offset prevents low magnitude noise on the
`signal input from causing a false counter reading.
`The pulse-shaper converts the offset oscillating signal
`into a pulsed signal of the same frequency which can be
`measured by the armable frequency counter. Option-
`ally, the pulse-shaper may also prescale the pulsed sig-
`nal such that the frequencyof the oscillating input sig-
`nal is an integer multiple of the prescaled, pulsed output
`signal to permit measurement of higher frequency sig-
`nals by a slower operating frequency counter.
`The envelope detectoris coupled to detect the begin-
`ning and end ofthe oscillating signal burst to be fre-
`quency measured and to transmit an arming signal to
`the armable frequency counter. Actual counter arming
`begins shortly after the start of the oscillating signal
`burst and ends shortly after the end of the signal burst.
`The arming and disarming delays are due to the switch-
`ing times and the capacitor charging and discharging
`times of componentsin the armingcircuit, and to delays
`inherent in the armable counteritself.
`To insure that signals of the minimal burst width are
`frequency measured by the counter, a delay line, cou-
`pling the pulse signal output ofthe signal shaper to the
`input of the armable counter, delays the arrival of the
`pulsed signal to the counter until after the envelope
`detector has armed the counter. Morespecifically, the
`signal delay time associated with the delay line is set
`approximately equalto the sum ofthe prescaling integer
`divided by the frequency of the lowest frequency signal
`to be measured plus the counter arming on and off delay
`times. This signal delay time permits frequency mea-
`surement of signals of minimum burst width and pre-
`vents alteration of the frequency count by events fol-
`lowing the measured burst.
`It is therefore an object of the present invention to
`provide a new and improved self-arming frequency
`counter wherein counter arming is derived from the
`signal to be frequency measured.
`It is another object of the present invention to pro-
`vide such a new and improvedself-arming frequency
`counter as may be adjusted to minimize the burstwidth
`of an input signal of a given frequency which canstill be
`teliably measured by the frequency counter.
`It is another object of the present invention to pro-
`vide such a new andself-arming frequency counter as
`will frequency measure signal bursts of indeterminate
`
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`4,580,281
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`3
`beginning or ending time or of arbitrarily long burst
`width.
`It is another object of the present invention to pro-
`vide such a new and self-arming frequency counter
`wherein the signal input to the frequency counter is
`delayed to insure that the counter is armed prior to
`counter receipt of the input signal and disarmed prior to
`termination of the input signal.
`Still further objects of the present invention are to
`provide such a new and self-arming frequency counter
`wherein the signa! to be measured is buffered to avoid
`false measurement due to low level noise and prescaled
`to allow measurement of higher frequency signals by
`slower counting circuits.
`Theinvention resides in the combination, construc-
`tion, arrangementand disposition of the various compo-
`nent parts and elements incorporated in a self-arming
`frequency counter constructed in accordance with the
`principles of this invention. The present invention will
`be better understood and objects and important features
`other than those specifically enumerated above will
`become apparent when consideration is given to the
`following details and description, which when taken in
`conjunction with the annexed drawings describe, dis-
`close, illustrate, and show a preferred embodiment or
`modification of the present invention and whatis pres-
`ently considered and believed to be the best mode of
`practicing the principles thereof.
`DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a combination block and circuit diagram of
`the preferred embodimentof the present invention, and
`FIG. 2 is a diagram depicting timing relations be-
`tween signals appearing at various points in the circuit
`of FIG. 1 during an input signal burst of minimum fre-
`quency and burst width.
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`
`FIG.1 is a diagram of the present invention compris-
`ing a prescaling, self-arming frequency counter system
`generally noted by reference character 10, including
`prescaling pulse-shaper 100, delaying means 200, enve-
`lope detector 300, armable frequency counter 400 and
`input buffer 600.
`Buffer 600 is a differential amplifier for generating an
`output signal proportional to the difference between
`two input signals. The oscillating signal to be frequency
`measured Vin is applied to the non-inverting input of
`buffer 600 and a constant reference voltage Vinin is
`applied to the inverting input. The output of buffer 600,
`V;, is similar to Vin except that it has a negative offset
`equal to Vinin Wherein Vinin is selected to insure that low
`amplitude noise signals on input line 610 do not cause
`V;to rise above zero voltage and totrigger false counter
`operation.
`The V; signal output of buffer 600 is applied to the
`input of prescaling pulse-shaper 100. Prescaling pulse-
`shaper 100 is a “divide by N” type circuit wherein oscil-
`lating input signal V; of frequency F; results in a pulsed
`output signal V, of frequency F,/N where N is a se-
`lected integer. Devices suitable for use as buffer 600 and
`for use as prescaling pulse-shaper 100 are commonin
`the art and readily available and therefore detailed em-
`bodiments of these devices are not discussed herein.
`Pulse-shaper 100 output signal Vois applied to delay-
`ing means 200. Delaying means 200 is a circuit wherein
`a pulsed inputsignal, in this case Vo, results in an identi-
`
`4
`cal output signal, Vg, except that Vg lags Vo by a se-
`lected delay time. Delaying means 200 may comprise a
`network consisting of parallel capacitances and series
`inductors as commonly used to delay low frequency
`signals. For use with higher frequency signals, a length
`of conductor may be used as delaying means 200, the
`delay time being equal to the length of the line divided
`by the speed of propagation ofa signal in theline.
`The V;signal output of buffer 600 is also coupled to
`envelope detector 300 comprising rectifier 320, capaci-
`tor 330, resistor 340, and comparator 350. Rectifier 320
`rectifies V; and applies the rectified signal, Vs, to the
`input of comparator 350 and to the grounded parallel
`combination of capacitor 330 and resistor 340. When V;
`rises above zero, Vp rises above zero, charging capaci-
`tor 330. When Vz rises above bias voltage Vaies applied
`to the negative input of comparator 350, the comparator
`outputs counter arming signal Vy. When V;falls below
`the capacitor voltage, capacitor 330 discharges through
`resistor 340 and when the voltage on capacitor 330 falls
`below Vojias, comparator 350 terminates arming signal
`Va. However, if resistor 340 is suitably large, capacitor
`330 discharge time is slow. A subsequent V; pulse, oc-
`curring shortly after the first, will cause buffer 600 to
`recharge capacitor 330 before the capacitor voltage can
`fall below Voies. Thus comparator 350 output Vz will
`remain high during an oscillating V;signal burst as long
`as successive V;positive swings are of sufficient magni-
`tude and not too infrequent.
`Frequency counter 400 may determine the frequency
`of an input signal Vyin either of two ways. In a refer-
`ence count mode, the counter counts the number of
`reference Clock events of known frequency occurring
`between successive Vy signal pulses, computing the
`signal frequency by dividing the known frequency of
`the reference signal by the reference event count. In a
`signal count mode, the counter counts Vy signal pulses
`occurring during a knownreference period, computing
`the signal frequency by dividing the number of counted
`Vg pulses by the known reference period. Frequency
`counter 400 may include provisions for displaying the
`computed signal frequency on digital display 500, the
`display being updated at the end of each measurement
`cycle.
`Frequency counter 400 begins operating only after
`receiving arming signal V, and will continue to count
`input or reference events, computing the signal fre-
`quency and updating the display at the end of each
`count cycle as long as Vg remains high. After arming
`signal V, is turned off, counter 400,
`in the reference
`count mode, will continue to count reference events
`until the next signal pulse is received. In the signal count
`mode, counter 400 counts the first signal pulse after
`counter disarming and then stops counting. In either
`case if the end of a count cycle occurs after disarming
`but with or before receipt of the next Vg pulse, counter
`400 will compute the frequency associated with the last
`counting period and update the display. Otherwise the
`display will remain fixed at the frequency computed
`from the last full counting cycle. Devices suitable for
`use as armable frequency counter 400 are knownin the
`art and readily available and therefore a detailed em-
`bodiment of this component of the present invention is
`not discussed herein.
`Dueto the delays associated with the charging time
`of capacitor 330, with the switching time of comparator
`350 and with such delay mechanismsas may be inherent
`in the counter itself, arming of counter 400 will not
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`occur until some time after start of a V; signal burst.
`Likewise,after the V;signal burst ends, disarming of the
`counter is delayed by the capacitor 330 discharge time,
`by comparator 350 switching time, and by delays in
`counter 400 internal circuits. Thus the period during
`which frequency counter400is armedis delayedin time
`from the period during which thesignal burst V;actu-
`ally occurs. To operate in either the reference count
`mode or the signal count mode, counter 400 must re-
`ceive at least two pulses after arming begins. In order
`for frequency counter 400 to operate with the shortest
`V;signalburst possible for a given minimum inputsignal
`frequency, Fim, the first Vg pulse should not reach the
`counter prior to counter arming. Consequently, delay
`means 200 is provided andits delay time is adjusted to
`delay Vz so that it is properly synchronized with the
`arming signal generated by envelope detector 300.
`It is important in choosing the delay time associated
`with delaying means 200 that the last Vg pulse is de-
`layed until after termination of arming signal Vg, since
`the first Vq pulse occurring after disarming stops
`counter operation in either mode. If the last Vg pulse
`occurs before counter disarming, the counter may gen-
`erate incorrect frequency counts, improperly replacing
`the display of the frequency of the last correctly com-
`puted Vz burst count cycle. In the signal count mode,
`with nosignal pulses occurring after counter disarming,
`counter 400 will incorrectly set the displayed frequency
`to zero. In the reference count mode, the counter will
`continue to count reference clock pulses until a noise
`pulse or a subsequent signal burst pulse occurs at the
`counter input and the counter would then replace the
`displayed frequency with some nonmeaningful value.
`The most appropriate choice for the delay time asso-
`ciated with delaying means 200 depends on the fre-
`quency and the burst width of the signals to be mea-
`sured. A longer delay time permits measurement of
`lower frequency signals while a shorter delay time will
`decrease the width of the shortest signal burst which
`can be measured by the counter.
`FIG. 2 is a timing diagram showing pulse sequence
`relations for various signals in the circuit of FIG. 1. For
`simplicity, in the particular case shown, Vj, is depicted
`as a square-waveof frequency Fim. However, the cir-
`cuit of FIG. 1 will operate with other formsof oscillat-
`ing input signal. Assuming prescaling pulse-shaper 100
`divides Vj, input pulses by a factor of four (N=4), a Vo
`pulse will begin on every second Vj, pulse and will end
`on every fourth Vj, pulse.
`Counter 400 arming is delayed after the start of the
`Vin signal burst by ton, the sum of the delaysin envelope
`detector 300 and the arming delays internal to counter
`400. Counter disarmingis delayed by toy, the sum of the
`turn off delays in detector 300 and counter 400. In order
`for counter 400 to operate properly it must receive at
`least one Vg pulse leading edge (positive going) before
`disarming and one Vg pulse leading edge after disarm-
`ing. Thus the Vin signal burst must be long enough to
`generate at least two Vg pulses with the last Vz pulse
`beginning after counter arming ends.
`Vasignalpulses are delayed from V, signal pulses by
`tg, the delay time associated with delay line 200. Delay
`time ta is selected as follows:
`qa)
`td=tont+ N/Fim+tof
`With this selected delay time, as shown in FIG.2, the
`first leading edge of Vg can occur no later than the
`moment of counter disarming. In this “worst case”
`situation, prescaling pulse-shaper 100is initially in the
`state wherein Vois high and two Vin pulses are required
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`4,580,281
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`6
`to drive V, low. Also, in the particular case shown, Vin
`begins on a negative rather than a positive swing. If
`pulse shaper 100 had been in any other state when it
`received the first V;pulse, the first Vapulse would have
`occurred earlier, before counter disarming.If delay line
`200 delay time tg were longer than as shown,then it is
`possible that the first Vz leading edge could occurafter
`counter disarming. Also, if another V; signal burst of a
`lower frequency than Fj, as shown were to be mea-
`sured,it is possible that the first Vy leading edge would
`occur after counter disarming. However, the first lead-
`ing edge of a V;, signal burst of frequency higher than
`Fim would always occur before counter disarming.
`Also, with the delay time tgadjustedas in equation(1)
`above,thelast leading edge in the Vasignal must always
`occurafter counter disarming. The first Vzleading edge
`could occur as much as one Vg cycle earlier than de-
`picted in FIG. 2 if Viinitially includes a positive swing
`andif the first Vin leading edge forces prescaling pulse-
`shaper 100 to generate a Vo positive edge. In this situa-
`tion, the second leading edge of Vg would occur just as
`the counter disarms.If to, is very small compared to the
`period of Vo,then the second leading edge of Vg would
`be the last. Thusif tg were chosen smaller than as indi-
`cated in equation(1), the last Vzleading edge associated
`with a short signal burst could occur before counter
`disarming. Therefore, optimal measurement reliability
`for input signals of frequency Fj, or greateris obtained
`when the delay time of delay line 200 is adjusted ap-
`proximately as indicated in equation (1).
`In addition to the minimum frequency constraint on
`an input signal, to insure that counter disarming does
`not occur before the leading edge of the Vg signal, an
`input signal of any frequency must have a minimum
`burst width (MBW)asfollows:
`
`MBW =la+N/Fim=ton-+2N/Fimt tof
`
`(2)
`
`In the design of self-arming counter system 10 of the
`present invention, whereit is desirable to measuresig-
`nals of low frequency (Fi, small), delay line 200 may be
`made very long so that delay time ta is large, satisfying
`equation (1). However, in doing so, the minimum burst
`width forall input signals to be measured must be large,
`according to equation (2). Conversely whereit is desir-
`able to frequency measure very short signal bursts, a
`short delay line may be used to obtain a small delay tg
`and therefore a small MBW according to equation (2).
`However, according to equation (1), with such a small
`delay, only high frequency signals (Fy, large) can be
`reliably frequency measured. The delay time chosen
`therefore represents a tradeoff between minimum fre-
`quency and minimum bandwidth constraints on the
`signal to be measured.
`The self-arming frequency counter system. of the
`present invention thus anticipates the beginning and end
`of the signal to be measured to allow reliable measure-
`ment of signal bursts of minimal burstwidth and fre-
`quency, and of indeterminate beginning or ending
`times. The present invention also operates with a pres-
`caling pulse-shaper permitting measurement of high
`frequency signals with lower speed counters and incor-
`porates a buffer to prevent low magnitude input noise
`from causing false counter operation.
`While a preferred embodiment of the present inven-
`tion has been described,
`it will be apparent to those
`skilled in the art that many changes and modifications
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`4,580,281
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`b.
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`7
`may be made without departing from the invention in
`its broader aspects. The appended claims are therefore
`intended to coverall such changes and modificationsas
`fall within the true spirit and scope of the present inven-
`tion.
`T claim:
`1. A self-arming frequency counter system for mea-
`suring the frequency of an applied test signal compris-
`ing:
`means for measuring the frequency ofthetest signal
`when armed by an applied armingsignal,
`means for applying the arming signal to the measur-
`ing means on detection of the test signal commenc-
`ing followinginitiation of the test signal and ending
`following termination of the test signal, and
`meansfor delaying application of the test signal to the
`measuring means until the arming signal begins.
`2. A self-arming frequency counter system as in claim
`1 wherein,for a selected minimum test signal frequency,
`the delaying means also delays termination of the test
`signal at the measuring means until after termination of
`measuring means arming.
`3. A self-arming frequency counter system as in claim
`2 wherein the delaying means delays application of the
`test signal to the measuring means by a delay time ap-
`proximately equal to the sum ofthe following:
`a. the time difference betweeninitiation of the test
`signal and measuring means arming,
`the time delay between termination of the test
`signal and termination of measuring means arming,
`and
`c. the period of one cycle of the lowest frequencytest
`signal to be measured.
`4. A self-arming frequency counter system for mea-
`suring the frequencyofan oscillating signal comprising:
`a pulse-shaper coupled to receive the oscillating sig-
`nal and to generate a pulsed test signal output of the
`same frequency as the oscillating signal,
`means for measuring the frequency of the pulsed test
`signal when enabled by an applied arming signal,
`means for applying the arming signal to the measur-
`ing means on detection of the oscillating signal
`commencing following initiation of the oscillating
`signal and ending following termination of the
`oscillating signal, and
`meansfor delaying application ofthetest signal to the
`measuring means until the arming signal begins.
`5. A self-arming frequency counter system as in claim
`4 wherein the arming means comprises:
`meansfor rectifying the oscillating signal,
`a capacitor coupled for charging by the rectified
`oscillating signal to a voltage in excess ofa selected
`reference voltage,
`means coupled to generate the arming signal when-
`ever the capacitor voltage exceeds the reference
`voltage, and
`a resistor coupled and sized to discharge the capaci-
`tor below the reference voltage only after termina-
`tion of the rectified oscillating signal, thereby ter-
`minating the armingsignal.
`6. A self-arming frequency counter system as in claim
`4 wherein the delaying means comprises a conductor of
`length equal to the speed of propagation of the pulsed
`test signal in the conductor divided by the delay time.
`7. A self-arming frequency counter system as in claim
`4 wherein, for a selected minimum pulsed test signal
`frequency, the delaying means also delays termination
`
`8
`of the pulsed test signal at the measuring means until
`after termination of measuring means arming.
`8. A self-arming frequency counter system as in claim
`7 wherein the delaying means delays application of the
`pulsed test
`to the measuring means by a delay time
`approximately equal to the sum of the following:
`a. the time difference betweeninitiation of the pulsed
`test and measuring means arming,
`b. the time delay between termination of the pulsed
`test and termination of measuring means arming,
`and
`c. the period of one cycle of the lowest frequency
`pulsed test to be measured.
`9. A self-arming frequency counter system for mea-
`suring the frequencyofan oscillating signal comprising:
`a prescaling pulse-shaper coupled to receive the oscil-
`lating signal and to generate a pulsed test output,
`the frequency of the oscillating signal being an
`integer multiple of the frequency of the pulsed test
`signal,
`means for measuring the frequency of the pulsed test
`signal when armed byan applied armingsignal,
`means for applying the arming signal to the measur-
`ing means on detection of the oscillating signal
`commencing following initiation of the oscillating
`signal and ending following termination of the
`oscillating signal, and
`means for delaying application of the pulsedtest sig-
`nal to the measuring means until the arming signal
`begins.
`10. A self-arming frequency counter system as in
`claim 9 wherein, for a selected minimum pulsed test
`signal frequency, the delaying meansalso delays termi-
`nation of the pulsed test signal at the measuring means
`until after termination of measuring means arming.
`11. A self-arming frequency counter system as in
`claim 10 wherein the delaying means delays application
`of the pulsed test signal to the measuring means by a
`delay time approximately equal to the sum of the fol-
`lowing:
`a. the time difference betweeninitiation of the pulsed
`test signal and measuring means arming,
`b. the time delay between termination of the pulsed
`test signal and termination of measuring means
`arming, and
`,
`c. the period of one cycle of the lowest frequency
`pulsed test signal to be measured.
`12. A self-arming frequency counter system for mea-
`suring the frequencyofan oscillating signal comprising:
`a buffer coupled to negatively offset the oscillating
`signal by an amount equalto an applied offset volt-
`age,
`a prescaling pulse-shaper coupled to receive the off-
`set oscillating signal and to generate a pulsed test
`signal output, the frequencyofthe offset oscillating
`signal being an integer multiple of the frequency of
`the pulsed test signal,
`means for measuring the frequency of the pulsed test
`signal when armed by an applied armingsignal,
`means for applying the arming signal to the measur-
`ing means on detection of the offset oscillating
`signal commencing following initiation of the off-
`set oscillating signal and ending following termina-
`tion of the offset oscillating signal, and
`means for delaying application of the pulsed test sig-
`nal to the measuring meansuntil the arming signal
`begins.
`
`5
`
`20
`
`in3
`
`40
`
`45
`
`60
`
`65
`
`

`

`9
`13. A self-arming frequency counter system as in
`claim 12 wherein, for a selected minimum pulsedtest
`signal frequency, the delaying meansalso delays termi-
`nation ofthe pulsedtest signal at the measuring means
`until after termination of measuring means arming.
`14. A self-arming frequency counter system as in
`claim 12 wherein the delaying meansdelaysapplication
`of the pulsed test signal to the measuring means by a
`
`10
`delay time approximately equal to the sum ofthe fol-
`lowing:
`a. The time difference betweeninitiation of the pulsed
`test signal and measuring meansarming,
`b. the time delay between termination of the pulsed
`test signal and termination of measuring means
`arming, and
`c. the period of one cycle of the lowest frequency
`pulsed test signal to be measured.
`*x
`*
`*
`*
`*
`
`4,580,281
`
`5
`
`15
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`35
`
`60
`
`65
`
`