`of U.S. Patent No. RE42,534
`
`
`Filed on behalf of Dell Technologies Inc. and Dell Inc.
`By: Peter M. Dichiara, Reg. No. 38,005
`Yvonne S. Lee, Reg. No. 72,162
`Wilmer Cutler Pickering Hale and Dorr LLP
`60 State Street
`Boston, MA 02109
`Tel: (617) 526-6000
`Email: Peter.Dichiara@wilmerhale.com
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________________________
`
`DELL TECHNOLOGIES INC. AND DELL INC.
`Petitioner
`v.
`3D SURFACES, LLC
`Patent Owner.
`____________________________________________
`
`Case IPR2023-00005
`U.S. Patent RE42,534
`____________________________________________
`
`PETITION FOR INTER PARTES REVIEW
`OF CLAIMS 10-20
`
`
`
`
`
`
`TABLE OF CONTENTS
`
`INTRODUCTION ....................................................................................... 1
`
`GROUNDS FOR STANDING .................................................................... 1
`
`I.
`
`II.
`
`III.
`
`IDENTIFICATION OF CHALLENGE ...................................................... 1
`
`A. Prior Art .................................................................................................. 1
`B. Grounds for Challenge ........................................................................... 3
`IV. OVERVIEW ............................................................................................... 3
`
`A. The ’534 Reissue .................................................................................... 3
`1. Applicant Admitted Prior Art .......................................................... 3
`2. Method/System ................................................................................ 7
`a. The Tessellation Technique of the ’501 Patent ......................... 7
`b. Allegedly “improved architecture” ............................................ 9
`B. Prosecution History .............................................................................. 10
`C. Level of Ordinary Skill in the Art ........................................................ 13
`D. Claim Construction ............................................................................... 13
`1. Petitioner’s Constructions .............................................................. 13
`2. PO’s Constructions ........................................................................ 17
`V. GROUND 1: CLAIMS 10-19 WOULD HAVE BEEN
`OBVIOUS OVER THE COMBINATION OF ABI-EZZI AND
`FOLEY....................................................................................................... 18
`A. Overview of the Combination .............................................................. 18
`1. Abi-Ezzi ......................................................................................... 18
`a. Abi-Ezzi’s Coordinate Systems ............................................... 18
`i
`
`
`
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`b. Abi-Ezzi’s Object Rendering Process ..................................... 20
`c. Abi-Ezzi’s Object Rendering System ...................................... 22
`2. Foley ............................................................................................... 25
`a. Standard Conceptual Graphics Pipeline .................................. 26
`b. Graphics System Hardware Architecture ................................ 26
`3. Motivation to Combine .................................................................. 28
`a. A POSITA would have been motivated to perform
`steps 210-270 of Abi-Ezzi’s object rendering process
`in the graphics subsystem (co-processor). ............................... 29
`b. A POSITA would have been motivated to use
`Foley’s teaching of a pipelined architecture to
`implement Abi-Ezzi’s object rendering process. .................... 36
`Independent Claim 10 ........................................................................... 43
`1. Preamble [10P], limitations [10A]-[10D]. ..................................... 43
`2. GPU components ........................................................................... 48
`a. Petitioner’s Constructions ....................................................... 48
`(i)
`“Transform unit” [10E] .................................................... 48
`(a) Function: “transforming graphic objects.” .................. 49
`(b) Structure ....................................................................... 50
`“Tessellation Unit” [10F] ................................................ 51
`(a) Function 52
`(b) Structure of the “tessellation unit” ............................... 53
`
`(ii)
`
`B.
`
`
`
`
`ii
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`(c) “Tessellation unit … operatively coupled
`between said transform unit and a lighting
`unit”
`57
`“Lighting Unit” [10G] ...................................................... 58
`(iii)
`(a) Function: “lighting triangles” ...................................... 59
`(b) Structure ....................................................................... 61
`b. PO’s Constructions .................................................................. 62
`Independent Claim 15 ........................................................................... 63
`C.
`D. Dependent Claims ................................................................................ 64
`1. Claim 11 ......................................................................................... 64
`2. Claims 12, 16 and 17 ...................................................................... 65
`3. Claim 13 ......................................................................................... 67
`4. Claim 14 ......................................................................................... 69
`a. Petitioner’s Construction ......................................................... 69
`(i)
`Function: “rendering lighted, tessellated,
`transformed objects” ........................................................ 69
`Structure ........................................................................... 71
`(ii)
`“Operatively coupled to the lighting unit” ...................... 72
`(iii)
`b. PO’s Construction .................................................................... 73
`5. Claim 18 ......................................................................................... 74
`6. Claim 19 ......................................................................................... 74
`VI. GROUND 2: THE COMBINATION OF ABI-EZZI, FOLEY,
`AND FILIP RENDERS CLAIM 20 OBVIOUS. ...................................... 77
`
`
`
`
`iii
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`VII. DISCRETIONARY DENIAL IS NOT APPROPRIATE ......................... 80
`
`A. 35 U.S.C. §325(d) ................................................................................. 80
`B. 35 U.S.C. §314(a) ................................................................................. 82
`VIII. MANDATORY NOTICES ....................................................................... 83
`
`A. Real Party in Interest ............................................................................ 83
`B. Related Matters ..................................................................................... 83
`C. Notice of Counsel and Service Information ......................................... 84
`IX. CONCLUSION .......................................................................................... 84
`
`
`
`
`iv
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`
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`U.S. Patent RE42,534
`IPR2023-00005
`
`EXHIBIT LIST
`
`Reference
`
`Exhibit
`1001
`1002
`1003
`1004
`1005
`1006
`
`1007
`
`U.S. Patent RE42,534
`File History of U.S. Patent RE42,534
`Declaration of Dr. Bajaj in Support of Petition
`Chandrajit L. Bajaj CV
`U.S. Patent No. 5,261,029 to Abi-Ezzi (“Abi-Ezzi”)
`“Tessellation of Curved Surfaces under Highly Varying
`Transformations” by Abi-Ezzi, et al., (1991) (“Abi-Ezzi
`Paper”)
`“Computer Graphics: Principles and Practice”, 2nd Edition,
`1990 by Foley, et al. (“Foley”)
`1008 Möller, et al, “Real-Time Rendering” (1999) (“Möller”)
`1009
`RESERVED
`1010
`“Surface algorithms using bounds on derivatives,” by Filip, et
`al. (“Filip”)
`Declaration of Dr. Mary Bolin
`U.S. Application No. 10/436,698 (“the ’698 Application”)
`U.S. Patent 7,245,299 (“the ’299 patent”)
`U.S. Patent 6,563,501 (“the ’501 patent”)
`U.S. Patent 7,532,213 (“the ’213 patent”)
`File History of the ’213 patent
`File History of the ’299 patent
`USPTO Patent Center Continuity Data for
`U.S. Patent 7,245,299
`Plaintiff’s Preliminary Infringement Contentions and
`Identification of Priority Dates, 3D Surfaces, LLC v. Dell
`Technologies, Inc., 6:21-cv-1107, (W.D. Tex. Jan. 18, 2022)
`
`1011
`1012
`1013
`1014
`1015
`1016
`1017
`1018
`
`1019
`
`v
`
`
`
`
`
`
`
`
`U.S. Patent RE42,534
`IPR2023-00005
`
`Exhibit
`1020
`
`1021
`
`1022
`1023
`
`Reference
`Plaintiff’s Responsive Claim Construction Brief, 3D Surfaces,
`LLC v. Dell Technologies, Inc., 6:21-cv-1107 (W.D. Tex. May
`23, 2022), ECF No. 57
`Plaintiff’s Sur Reply Claim Construction Brief, 3D Surfaces,
`LLC v. Dell Technologies, Inc., 6:21-cv-1107 (W.D. Tex. June
`21, 2022), ECF No. 71
`“Computer Graphics: C Version,” by Hearn, et al. (“Hearn”)
`“OpenGL Programming Guide: The Official Guide to Learning
`OpenGL 1.1,” by Woo, et al. (1997) (“Woo”)
`1024 Mano, “Computer System Architecture”, 3d Ed. (1993)
`(“Mano”)
`“Curves and Surfaces for Computer Aided Geometric Design:
`A Practical Guide,” by Farin (“Farin Book”)
`“An Adaptive Subdivision Method with Crack Prevention for
`Rendering Beta-spline Objects,” by Barsky, et al. (“Barsky”)
`RESERVED
`RESERVED
`“Real-Time Rendering of Trimmed Surfaces,” Computer
`Graphics, Vol. 23, No. 3, July 1989, by Rockwood, et al.
`(“Rockwood”)
`“Mathematical Elements for Computer Graphics,” by Rogers,
`et al. (“Rogers”)
`U.S. Patent 5,377,320 (“’320 Patent”)
`U.S. Patent 6,057,848 to Goel (“Goel”)
`U.S. Patent 6,597,356 to Moreton (“Moreton”)
`Peddie, “Famous Graphics Chips: Nvidia’s GeForce 256”
`NVIDIA, “Introducing the World’s First GPU: GeForce 256”,
`retrieved from https://web.archive.org/
`RESERVED
`RESERVED
`
`1025
`
`1026
`
`1027
`1028
`1029
`
`1030
`
`1031
`1032
`1033
`1034
`1035
`
`1036
`1037
`
`vi
`
`
`
`
`
`
`
`
`U.S. Patent RE42,534
`IPR2023-00005
`
`Exhibit
`1038
`
`1039
`
`1040
`
`Reference
`United States District Court - National Judicial Caseload
`Profile
`Velho, et al “A Unified Approach for Hierarchical Adaptive
`Tesselation of Surfaces” (1999) (“Velho”)
`U.S. Patent Pub. 2003/0117405 to Hubrecht, et al (“Hubrecht”)
`
`vii
`
`
`
`
`
`
`
`
`
`I.
`
`Introduction
`Dell Technologies Inc. and Dell Inc. (“Dell” or “Petitioner”) petitions for
`
`U.S. Patent RE42,534
`IPR2023-00005
`
`inter partes review (“IPR”) of U.S. Patent RE42,534 (“the ’534 Reissue”; EX-
`
`1001) claims 10-20. The ’534 Reissue relates generally “to computer graphics.”
`
`(EX-1001, 1:28.) The purported novelty of the ’534 Reissue is a graphics processor
`
`with transformation, tessellation, and lighting units, in that order. However, as
`
`Petitioner establishes, Abi-Ezzi, filed in 1992, discloses this claimed order.
`
`Performance of these steps by separate dedicated processors in a graphics
`
`processing unit cannot salvage the challenged claims because this architecture was
`
`obvious based on the hardware pipelines disclosed by Foley a decade earlier.
`
`II. Grounds for Standing
`Petitioner certifies the ’534 Reissue is available for IPR and Petitioner is not
`
`barred or estopped from requesting IPR on the grounds herein.
`
`III. Identification of Challenge
`A. Prior Art
`The ’534 Reissue is a Reissue of U.S. Patent 7,532,213 (“’213 patent”; EX-
`
`1015) which is a continuation of U.S. Patent 7,245,299 (“the ’299 patent”) which
`
`on its face only claims priority as a continuation-in-part (“CIP”) of Application
`
`10/436,698 (“’698 application”), filed May 12, 2003 (abandoned). (See EX-1013
`
`(63); EX-1018 (USPTO record showing priority only to the ’698 application).)
`
`
`
`
`1
`
`
`
`The ’698 application is a CIP of U.S. Patent 6,563,501 (“the ’501 patent”), filed
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`U.S. Patent RE42,534
`IPR2023-00005
`
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`December 11, 2000, which claims priority to Provisional Application 60/222,105,
`
`filed July 28, 2000. Patent Owner (“PO”) recently attempted to claim priority to
`
`July 2000 for the challenged claims. (EX-1019, 3.) Petitioner disputes PO’s
`
`priority claim.1 Regardless, each applied reference, listed below, was published
`
`before July 28, 2000.
`
`1. U.S. Patent No. 5,261,029 to Abi-Ezzi et al. (“Abi-Ezzi”; EX-1005),
`
`issued November 9, 1993, is prior art under pre-AIA §102(b).
`
`2. James Foley et al., Computer Graphics: Principles and Practice (2d
`
`ed.) (“Foley”; EX-1007) is prior art under pre-AIA §102(b) because it was publicly
`
`available no later than January 1991. (See EX-1011, ¶¶22-26; see also, e.g., EX-
`
`1005, 12:50-52 (citing Foley).)
`
`3. Filip, et al., “Surface Algorithms Using Bounds on Derivates”
`
`(“Filip; EX-1010) is prior art under pre-AIA §102(b) because it was publicly
`
`
`1 Despite it being PO’s burden to show benefit to earlier filed CIPs,
`
`Petitioner establishes the challenged claims are not entitled to benefit of the ’501
`
`patent in concurrently-filed Petition, IPR2023-00006. See PowerOasis, Inc. v. T-
`
`Mobile USA, Inc., 522 F.3d 1299, 1305 (Fed. Cir. 2008).
`
`
`
`
`2
`
`
`
`available no later September 1990. (See EX-1011, ¶¶31-34; see also, e.g., EX-
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`U.S. Patent RE42,534
`IPR2023-00005
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`1005, 10:67-11:2 (citing Filip).)
`
`B. Grounds for Challenge
`
`Ground
`
`Claims
`
`Prior Art
`
`1
`
`2
`
`103
`
`103
`
`
`
`10-19
`
`Abi-Ezzi and Foley
`
`20
`
`Abi-Ezzi, Foley, and Filip
`
`IV. Overview
`A. The ’534 Reissue
`The ’534 Reissue relates “to computer graphics, and more specifically to a
`
`method and apparatus for rendering bicubic surfaces.” (EX-1001, 1:28-30.)
`
`1. Applicant Admitted Prior Art
`The ’534 Reissue provides an extensive discussion of known techniques,
`
`architectures, and implementations in computer graphics. Specifically, the ’534
`
`Reissue describes that the existing prior art “process of displaying [an] object
`
`(corresponding to the object model) generally requires rendering, which usually
`
`refers to mapping the object model onto a two dimensional surface.” (EX-1001,
`
`1:35-38.) When the surfaces representing the object are curved, “the surfaces are
`
`generally subdivided or decomposed into triangles in the process of rendering the
`
`images.” (EX-1001, 1:38-40, 1:34-35 (“Object models are often stored in computer
`
`
`
`
`3
`
`
`
`systems in the form of surfaces”).) An existing process for subdividing bicubic
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`surfaces, illustrated in Figures 1A and 1B of the ’534 Reissue below, repeatedly
`
`subdivides the “intervals that define the parameters s and t” until “the surfaces
`
`resulting from subdivision have a curvature, measured in WC [world coordinate]
`
`space that is below a predetermined threshold.” (EX-1001, 2:2-8; 1:49-50.) When
`
`“all resulting four sided surfaces (tiles) 12 is below a certain curvature threshold,
`
`each such resultant four-sided surface 12 is then divided into two triangles 14
`
`(because they are easily rendered by dedicated hardware)” as shown in Figure 1B.
`
`(EX-1001, 2:25-29.)
`
`’534 Reissue, Figures 1A-1B
`
`
`
`
`
`The ’534 Reissue describes “an architecture of a conventional graphics
`
`system, including the architecture of a graphics processing unit (GPU)” which it
`4
`
`
`
`
`
`
`calls the “current state of the art2 in the computer graphics industry.” (EX-1001,
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`U.S. Patent RE42,534
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`2:44-48; Figure 2 (below).) The ’534 Reissue contends that, in this existing
`
`architecture, “CPU 1, executes a software application in the form of a game play or
`
`a physical or chemical simulation, etc., in which objects to be rendered are
`
`represented as triangle meshes in an object database stored in memory.” (EX-1001,
`
`2:48-51.) The triangle meshes are then transmitted to GPU 5 which “includes a
`
`transform unit 2 [shaded blue], a lighting unit 3 [shaded green] and a renderer unit
`
`4 [shaded purple].” (EX-1001, 2:56-58.)
`
`’534 Reissue, Annotated Figure 2
`
`
`
`
`
`The ’534 Reissue recognized this pre-tessellation of objects into triangle
`
`meshes had disadvantages including negative impacts on the quality of object
`
`
`2 Emphasis added unless otherwise indicated.
`
`
`
`
`5
`
`
`
`appearance and unnecessary expenditure of processing resources. (See EX-1001,
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`3:1-22.) One prior art attempt to perform real-time tessellation, discussed in
`
`the ’534 Reissue’s background, is described in U.S. Patent 6,597,356 to Moreton
`
`(“Moreton”; EX-1033). (See EX-1001, 3:48-51.) Moreton disclosed a “single-chip
`
`implementation of a graphics processing pipeline which incorporates a tessellation
`
`module 51” feeding “a transform module 52 and lighting module 54” on the chip.
`
`(Moreton, 6:29-40; Figure 1A (below).) According to the ’534 Reissue, “Moreton's
`
`invention doesn’t directly tesselate patches in real-time, but rather uses triangle
`
`meshes pre-tessellated off-line.” (EX-1001, 3:51-58.)
`
`
`
`
`6
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`Moreton, Figure 1A
`
`
`
`PO (Applicant) admitted a graphics processing unit including separate
`
`hardware units for transformation, tessellation, lighting, and rendering was known
`
`before the ’534 Reissue.
`
`2. Method/System
`a. Tessellation Technique of the ’501 Patent
`The ’534 Reissue purportedly builds on the inventor’s earlier ’501 patent,
`
`summarizing the ’501 patent as providing a method “for rendering bicubic surfaces
`
`
`
`
`7
`
`
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`of an object” in which “[e]ach bicubic surface is defined by sixteen control points
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`and bounded by four boundary curves.” (EX-1001, 4:60-65.) After selecting a pair
`
`of boundary curves, each curve “is iteratively subdivided” until the “curves satisfy
`
`a flatness threshold expressed in screen coordinates, whereby the number of
`
`computations required to render the object is minimized.” (EX-1001, 5:2-8.)
`
`The ’501 patent explains “execution of both subdivision and rendering is
`
`made possible inside the [] graphics controller 160 [or, a]lternatively, the
`
`subdivision can be executed by the CPU 110 while the rendering is executed by the
`
`graphics controller 160.” (EX-1014, 6:47-51.) Beyond this high-level discussion,
`
`the ’501 patent provides no further detail regarding the graphic controller’s
`
`hardware architecture.
`
`
`
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`8
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`’501 patent, Figure 3
`
`
`
`b. Allegedly “improved architecture”
`The ’534 Reissue “utilizes the [’501 patent’s] method for minimizing the
`
`number of computations required for the subdivision of bicubic surfaces into
`
`triangles” but claims to “provide an improved architecture3 for the computer
`
`graphics pipeline hardware.” (EX-1001, 5:25-29.) The patent illustrates this
`
`allegedly “improved graphics system” in Figure 3, reproduced below. (See, e.g.,
`
`EX-1001, 7:5-9.) The system includes a CPU and a GPU having a “tessellate unit 9
`
`coupled between the transform unit 2 and the lighting unit 3” followed by a
`
`rendering unit 4. (EX-1001, 7:9-14.)
`
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`3 Unless otherwise noted, all emphasis added.
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`9
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`’534 Reissue, Figure 3
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`
`
`B. Prosecution History
`Applicant (PO) filed the ’534 Reissue application within one year of the
`
`issuance of the ’213 patent, alleging the “patentee claim[ed] more or less than he
`
`had the right to claim in the patent.” (EX-1002, 58.) Challenged claims 10-20 were
`
`added during prosecution of the ’534 Reissue. (EX-1002, 5-6.) The prosecution
`
`history of the Reissue application confirms the allegedly novel feature of the
`
`challenged claims is coupling a tessellation unit between the transform and lighting
`
`units.
`
`Originally filed independent Reissue claim 10 (corresponding to challenged
`
`claim 10) recited a “system” comprising “a central processing unit”, “a bus …”,
`
`and a “graphics processing unit” comprising only “a transform unit that transforms
`
`the graphic objects into transformed objects” and “a tessellation unit operatively
`
`coupled to said transform unit for tessellating the transformed objects.” (EX-1002,
`
`5.) Originally filed claim 16 (corresponding to challenged claim 15) was also
`
`
`
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`10
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`broad, reciting a “method” comprising “receiving graphic objects to be rendered by
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`a graphics processing unit; transforming the graphic objects into transformed
`
`objects; and tessellating the transformed objects.” (EX-1002, 6.)
`
`The Examiner rejected independent prosecution claims 10 and 16 under
`
`obviousness-type double patenting over issued claims 1-2 of the ’299 patent. (EX-
`
`1002, 77-79.) In response, Applicant filed a terminal disclaimer over the ’299
`
`patent to obviate the rejection. (EX-1002, 99.) However, to gain allowance of the
`
`claims, the Examiner proposed amendments to independent claims 10 and 16
`
`adding the limitation that “said tessellation unit is operatively coupled between
`
`said transform unit and a lighting unit” to claim 10 and the limitation of
`
`“providing a tessellation unit coupled between a transform unit and a lighting
`
`unit” to claim 16. (EX-1002, 116-117.) Applicant (PO) agreed to these
`
`amendments and the claims subsequently issued. (EX-1002, 116-117, 119.)
`
`Prosecution of the parent ’299 patent, which shares a common specification
`
`with the ’534 Reissue, further confirms the alleged novelty of the challenged
`
`claims is this specific ordering of hardware units added by Examiner’s amendment
`
`to the Reissue claims. During prosecution of the ’299 patent, the Examiner rejected
`
`prosecution claims under obviousness-type double patenting (“ODP”) over
`
`the ’501 patent and claims as obvious over prior art including Moreton and WO
`
`00/31690 to Larking (“Larking”). (EX-1017, 65-73.) In response, Applicant
`
`
`
`
`11
`
`
`
`amended independent prosecution claims 1 and 12 to recite “a tessellate unit
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`coupled between the transform unit and the lighting unit” and traversed both
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`rejections. (EX-1017, 127, 130.)
`
`To overcome ODP, Applicant argued its amended “claims are directed to a
`
`hardware unit having an internal tessellate unit coupled between the transform unit
`
`and the lighting unit, thereby providing a new type of a graphics processing
`
`unit.” (EX-1017, 138.) Applicant further contended its claims “are not obvious
`
`over patent 6,563,501 because patent 6,563,501 does not disclose such a
`
`tessellation unit or graphics processing unit incorporating the tessellation unit.”
`
`(Id.) Similarly, Applicant distinguished Moreton as “fail[ing] to teach that the
`
`tessellate unit is ‘coupled between the transform unit and the lighting unit.’” (EX-
`
`1017, 139.) Applicant argued Larking also did not “teach or suggest performing
`
`tessellation after transformation.” (EX-1017, 140.)
`
`The Examiner subsequently allowed independent claims 1 and 12 of
`
`the ’299 patent finding “though the prior art discloses tessellate, transform, and
`
`lighting units, the prior art fails to teach a tessellate unit coupled between the
`
`transform unit and the lighting unit for tessellating both rational and non-
`
`rational object surfaces in real-time.” (EX-1017, 177.)
`
`Graphics systems performing tessellation after transformation but before
`
`lighting were known and disclosed by Abi-Ezzi which was not applied by the
`
`
`
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`12
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`Examiner in a claim rejection during prosecution of the ’299 patent, ’213 patent, or
`
`the ’534 Reissue.
`
`C. Level of Ordinary Skill in the Art
`A person of ordinary skill in the art (“POSITA”) would have had at least a
`
`Bachelor’s degree in computer science, computer engineering, electrical
`
`engineering, or a related scientific field, and approximately two years of work
`
`experience in computer graphics or, alternatively, two years work towards a
`
`masters or doctorate degree in these scientific fields. (EX-1003, ¶99.)
`
`D. Claim Construction
`The terms “tessellation unit4”, “transform unit”, “lighting unit”, and
`
`“rendering unit” require construction in this proceeding.
`
`1. Petitioner’s Constructions
`Although these terms do not use the word “means,” they should be construed
`
`as means-plus-function terms because they do not “‘recite sufficiently definite
`
`structure’ or else recite[] ‘function without reciting sufficient structure for
`
`performing that function.’” Williamson v. Citrix Online, LLC, 792 F.3d 1339, 1349
`
`(Fed. Cir. 2015) (en banc) (internal citations omitted). The term “unit”, like the
`
`“nonce” terms in Williamson (“element”, “mechanism”, “module”) does not,
`
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`4 Claim language is indicated throughout with italics.
`
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`standing alone, connote any particular structure. See Williamson, 792 F.3d at 1350;
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`Diebold Nixdorf, Inc. v. Int’l Trade Comm’n, 899 F.3d 1291, 1301 (Fed. Cir.
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`2018); EX-1003, ¶105.
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`Transform Unit
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`Function (claims 10, 15):
`transforming graphic objects
`Function (claim 12):
`transforming spatial coordinates of graphic objects
`Structure: dedicated processor in a GPU programmed to transform control points
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`The transform unit transforms “the control points of the bicubic surfaces.” (EX-
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`1001, 7:19-20; see also, 1:34-35 (“Object models are often stored in computer
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`systems in the form of surfaces”), 1:46-65 (describing coordinates associated with
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`control points).) The specification confirms transform unit 2 in the GPU is coupled
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`to the tessellation unit and is separate from the tessellation, lighting, and rendering
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`units. (EX-1001, 7:10-15; EX-1003, ¶107.) The specification also confirms the
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`transform unit implements pseudo code/microcode described in step 0. (EX-1001,
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`5:63-6:3, 7:7-15, 7:40-42 (referring to the execution of “the microcode steps 0
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`through 4”).) The specification further teaches “[s]oftware written according to the
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`present invention … [is] executed by a processor.” (EX-1001, 12:49-52.) Because
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`the transform unit executing the “microcode” performs the transformation
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`function, it is a dedicated processor. (EX-1003, ¶¶106-07.) See also Univ.
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`Pittsburgh v. Varian Med. Syst., 561 Fed.Appx. 934, 941-42 (Fed. Cir. 2014)
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`(corresponding structure includes algorithm, but only portions of algorithm
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`“necessary to perform the claimed function”).
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`Tessellation Unit
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`Function (claims 10, 11, 15): tessellating transformed objects into a plurality of
`triangle vertices
`Structure: dedicated processor in a GPU programmed to tessellate transformed
`objects into triangles by subdividing patches until a termination criteria
`for flatness is met
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`The specification confirms tessellation unit 9 in the GPU is separate from the
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`transform, lighting, and rendering units and is “coupled between the transform unit
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`2 and the lighting unit 3.” (EX-1001, 7:10-15.) Tessellation unit 9 tessellates the
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`surfaces into triangles after the control points of the surfaces representing an object
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`have been transformed. (EX-1001, 7:19-21, 1:34-35.) The specification discloses
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`“tessellate unit 9 executes the microcode described above in the Step 1 through
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`Step 4.” (EX-1001, 7:21-23; 5:55-57 (confirming pseudo code describes steps of
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`‘present invention’); see also, 12:49-52.) Because the tessellation unit executes
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`microcode to perform the tessellation function, it is a dedicated processor. (EX-
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`1003, ¶¶108-09.) In the only disclosed structure in the ’534 Reissue, the
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`tessellation unit terminates subdivision “when the curves satisfy a flatness
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`15
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`threshold.” (EX-1001, 5:5-8); See also Univ. Pittsburgh, 561 Fed.Appx. at 941-
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`42.
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`Lighting Unit / “Means for Lighting Triangles”
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`Function-lighting unit (claim 10):
`lighting triangles
`Function-lighting unit (claim 13):
`lighting transformed objects
`Function-lighting unit (claim 15):
`lighting vertices of triangles
`Function-means for lighting triangles (claim 10): lighting triangles
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`Structure: dedicated processor in a GPU programmed to light vertices of
`triangles
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`After transformation of the control points of the surfaces representing an object,
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`“the surfaces are tessellated into triangles by the tessellate unit” and the “vertices
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`of the triangles are then lit by the lighting unit 3.” (EX-1001, 7:19-25.) The
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`specification confirms the lighting unit in the GPU is coupled to the tessellation
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`and rendering units and is separate from the transform, tessellation, and rendering
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`units. (EX-1001, 7:10-15; EX-1003, ¶110-11.) A POSITA would have understood
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`the lighting unit is a dedicated processor executing software to perform the lighting
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`function because the specification teaches “[s]oftware written according to the
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`present invention … [is] executed by a processor.” (EX-1003, ¶¶110-11; See EX-
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`1001, 12:49-52); See also Univ. Pittsburgh, 561 Fed.Appx. at 941-42.
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`Rendering Unit
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`Function (claim 14):
`rendering lighted, tessellated, transformed objects
`Structure: dedicated processor in a GPU programmed to render triangles
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`The specification confirms rendering unit 4 in the GPU is separate from the
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`transform, tessellation, and lighting units. (EX-1001, 7:10-15; EX-1003, ¶113.)
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`The specification further confirms the rendering unit implements pseudo code for
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`rendering triangles (step 7). (EX-1001, 5:55-57, 7:1-4, 7:24-26.) A POSITA would
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`have understood that the pseudo code for the rendering unit is implemented using
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`software which the ’534 Reissue teaches is “executed by a processor.” (EX-1003,
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`¶¶113; EX-1001, 12:49-52.) Because the rendering unit executes pseudo code
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`(software), it is a dedicated processor. (EX-1003, ¶¶112-13); See also Univ.
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`Pittsburgh, 561 Fed.Appx. at 941-42.
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`2. PO’s Constructions
`In a co-pending district court litigation, PO contends no construction is
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`necessary for the transform unit, tessellation unit, lighting unit, and rendering unit
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`terms. (See EX-1020, 3, 11, 13-14.) PO alternatively contends if these terms are
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`found to be subject to 35 U.S.C. §112, ¶6, the function for each is the function
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`“recited in the claims” and the structure is the specific unit “and equivalents
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`thereof.” (Id.)
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`PO’s positions universally represent broader constructions than Petitioner’s
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`constructions. Under PO’s constructions, each recited unit is any “hardware and/or
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`software” in a GPU performing the transformation, lighting, tessellation, or
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`triangle rendering functions respectively. (EX-1003, ¶¶199-201, 224; see EX-1021,
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`5.) The combination of Abi-Ezzi and Foley teaches the “unit” terms under PO’s
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`broad constructions, as established in §V.B.2.b.
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`V. GROUND 1: Claims 10-19 Would Have Been Obvious Over the
`Combination of Abi-Ezzi and Foley.
`A. Overview of the Combination
`1. Abi-Ezzi
`A computer graphics scene includes objects represented by one or more
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`curved surfaces. (EX-1003, ¶114, see also, EX-1005, 2:18-35.) Abi-Ezzi describes
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`tessellation of these “curved surfaces into triangles for display.” (EX-1005, 1:10-
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`13.)
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`a. Abi-Ezzi’s Coordinate Systems
`In computer graphics, “graphical objects” to be displayed “are defined in an
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`object coordinate or modeling coordinate (MC) system.” (EX-1005, 4:8-10; EX-
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`1003, ¶117.) After specification of individual object shapes, the objects are placed
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`into position within a scene using a coordinate system called the “world coordinate
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`(WC) system.” (Id., citing EX-1022, 76; EX-1005, 4:10-15.) This placement is
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`performed “by a modeling transformation” that uses each object’s modeling
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`transformation matrix (the “M” matrix in Abi-Ezzi) to transform the object’s
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`coordinates from MC to WC space. (EX-1005, 4:10-12; EX-1003, ¶117.) Thus,
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`during transformation, each object in a scene is transformed from its personal MC
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`space to common WC space using the object’s M matrix. (EX-1003, ¶117.)
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`After placement in the common WC space, objects are transformed to device
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`coordinates (DC) for a 2-dimensional display (also referred to as screen
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`coordinates). (EX-1003, ¶117; EX-1005, 4:15-18.) The placement of the objects in
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`DC space is performed by a viewing transformation (commonly referred to as
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`projection) that uses a view transformation matrix (the “V” matrix in Abi-Ezzi).
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`(EX-1005, 4:15-18; EX-1003, ¶117, citing EX-1007, 869.)
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`As shown in Figure 2 below, Abi



