`
`Trials@uspto.gov
`571-272-7822
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`APPLE INC.,
`Petitioner,
`
`v.
`
`ZENTIAN LIMITED,
`Patent Owner.
`
`
` IPR2023-00036
`Patent 10,839,789 B2
`
`
`Record of Oral Hearing
`Held: March 12, 2024
`
`
`
`
`
`Before: KEVIN F. TURNER, JEFFREY S. SMITH, and
`CHRISTOPHER L. OGDEN, Administrative Patent Judges.
`
`
`
`
`
`
`
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`
`
`
`APPEARANCES:
`
`ON BEHALF OF THE PETITIONER:
`
`
`JENNIFER BAILEY, ESQUIRE
`Erise IP
`7015 College Blvd. Ste. 700
`Overland Park, KS 66211
`Jennifer.bailey@eriseip.com
`(913) 777-5600
`
`
`ON BEHALF OF THE PATENT OWNER:
`
`
`KAYVAN NOROOZI, ESQUIRE
`Noroozi PC
`11601 Wilshire Blvd., Ste. 2170
`Los Angeles, CA 90025
`Kayvan@noroozipc.com
`(310) 972-7074
`
`PETER KNOPS, ESQUIRE
`peter@noroozipc.com
`
`
`The above-entitled matter came on for hearing on March 12, 2024,
`commencing at 4:25 p.m., via video teleconference.
`
`
`
`
`
`
`
`
`
`
`2
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`
`
`P R O C E E D I N G S
`- - - - -
`JUDGE TURNER: Good afternoon. This is an oral hearing for
`IPR2023-00036 involving U.S. Patent 10839789. I am Judge Turner, joined
`by Judges Ogden and Smith. All the provisos that I provided in the earlier
`hearings still apply to this hearing. Petitioner will have a total of 45 minutes
`to present its argument, and Patent Owner will have 45 minutes to present its
`opposition. Petitioner will go first to present its case. Thereafter, Patent
`Owner will present its opposition to Petitioner’s case.
`If there’s any rebuttal from Petitioner, we will hear it after Patent
`Owner’s opposition, and finally we will hear Patent Owner’s surrebuttal, if
`requested. Petitioner, if you’d please -- if you will go to the podium,
`indicate your appearances, and also provide a time for rebuttal you may wish
`to reserve?
` MS. BAILEY: Good afternoon, Your Honors. My name is
`Jennifer Bailey from the law firm of Erise IP, representing Petitioner, Apple,
`Inc. Here with me today is my co-counsel, Cristina Canino, and in-house
`counsel from Apple, Jenny Liu.
`
`JUDGE TURNER: And did you want to reserve any time?
` MS. BAILEY: So sorry, Your Honors. I reserve 15 minutes.
`Thank you.
`JUDGE TURNER: Patent Owner’s counsel, please?
`
` MR. NOROOZI: Yes, Your Honors. Kayvon Noroozi from
`Noroozi PC for Patent Owner, Zentian. Along with me, Mr. Peter Knops, as
`well as Ms. Jessica Bernhardt, from the law firm of Bartlit Beck.
`3
`
`
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`
`JUDGE TURNER: And did you want to indicate if you wanted
`to reserve any time?
` MR. NOROOZI: Yes, Your Honor. Fifteen minutes as well.
`Thank you.
`JUDGE TURNER: Understood. And last but not least?
`
` MR. CHURNET: Hello, Your Honors. Dargaye Churnet from
`Fenwick & West, representing Amazon.
`
`JUDGE TURNER: Thank you very much. We are fully on the
`record. Please, Petitioner, you may start whenever you wish.
` MS. BAILEY: May it please the Board. Thank you, Your
`Honors. Let’s turn first to Petitioner’s demonstratives, DX2. So the claims
`for the `789 Patent, and specifically Claim 1, are quite broad here. We
`simply recite a -- excuse me. The claim simply recites a calculating
`apparatus which calculates the distances and the acoustic model memory,
`and both are fabricated in a single integrated circuit. Turning to DX3, ICs,
`at the time of the `789 Patent, were extremely well known and ubiquitous. I
`refer the Board to our Petitioner reply, pages 2, citing Exhibit #1003,
`paragraph 70 through 76, and the petition, pages 42 through 44. I’ve listed
`here a couple of the references that were discussed, specifically at Exhibit
`#1003, paragraphs 70 through 76.
`Turning to DX4, I want to talk about the motivations to combine.
`So once again, Zentian does not dispute that the combination of
`Smyth/Mozer teaches all of the limitations. There is overwhelming evidence
`of the benefits of a single integrated circuit having a processor and memory,
`and Zentian does not actually dispute this, either. First of all, we have a
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`4
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`known technique, which under the Intel v. Pact case, a known technique and
`a suitable option is sufficient for a motivation to combine. And the known
`technique, just for clarity, is a processor and a memory on a single IC. And
`here the memory is simply an acoustic model memory, so it’s storing a
`particular type of data.
`Zentian’s rebuttal is that none of the art shows an acoustic model
`memory and a processor on a single IC, and this is incorrect. Mozer of
`course discloses it on the basis of the combination, but there are background
`references of record that also disclose it. Specifically, Dr. Anderson actually
`admits that Nguyen, which is Exhibit #1047, teaches an integrated circuit
`that has an acoustic model memory, storing part of the acoustic model and a
`processor.
`I’ll refer the Board to the sur reply, Zentian’s sur reply, page 11,
`citing Exhibit #1069, which is page 92, lines 12 through 21. Also, the
`Toyoda reference discussed at Exhibit #1003, paragraphs 73 through 74,
`also disclosed an acoustic model memory, and an acoustic processor or a
`calculating apparatus on the same IC.
`
`JUDGE SMITH: For the Toyoda reference, I think Patent
`Owner’s point is that it’s not an IC. Toyoda doesn’t say it’s an IC. How are
`you coming to the conclusion that it’s on an IC?
` MS. BAILEY: Mr. Schmandt, in his declaration at paragraphs
`73 and 74, opined that he would understand as a skilled person that it was on
`a single IC, and Zentian does not provide any rebuttal evidence to that.
`Turning to DX5, Dr. Anderson admitted the known advantages of a memory
`and a processor on a single IC. Dr. Anderson admitted that the Motorola
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`5
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`DSP that’s discussed in Smyth had memory on chip, “so could do operations
`more quickly.” And we have the citation from his transcript there on DX5.
`
`JUDGE SMITH: I think just a couple of points. Just real
`quickly, for the testimony about Toyoda.
` MS. BAILEY: Yes?
`
`JUDGE SMITH: I’m looking at paragraph 74 of the
`declaration, and I see where he’s quoting from Toyoda, and then I see where
`he comes to the conclusion. He basically quotes what Toyoda says. Toyoda
`has the memory and the processor, and then he says Figure 7 shows this.
`And then he just comes to this conclusion, therefore it’s on an integrated
`circuit. But looking at his testimony, I’m not clear how, you know, just
`Figure 7 of Toyoda means it’s on an integrated -- I mean, Toyoda itself
`doesn’t say it’s on an integrated circuit, and the evidence that he’s relying on
`doesn’t -- at least in my mind, doesn’t show it’s on an integrated circuit.
`Can you help me out here?
` MS. BAILEY: Sure. So Toyoda discloses the sensor signal
`processor 31, and from that -- which, by the way has -- excuse me --
`includes the processor for performing the distance calculations, along with
`the acoustic model memory. Toyoda does teach that. And from that, Mr.
`Schmandt opined that he would understand that the sensor signal processor,
`because it includes both the memory and the, well, processor, that it would
`be on a single IC. And Judge Smith, I appreciate your questions. I do
`remind the Board that they can take into account the opinions of a skilled
`person.
`
`
`
`JUDGE SMITH: Okay. So I guess you’re basing it on the fact
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`6
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`that it’s called a signal processor, and so signal processor means an
`integrated circuit? Can you have a signal processor in an integrated circuit?
` MS. BAILEY: In addition to the fact that the single processor
`includes the memory, so at that point it would be more akin to a DSP
`processor, where you have both the memory and the processor on a single
`IC.
`
`JUDGE SMITH: Okay. Thank you. And then I guess to the
`
`point about, you know, Mr. Anderson’s, or Dr. Anderson’s testimony, you
`know, Patent Owner is saying Dr. Anderson is getting these advantages from
`the challenged Patent. You know, to the extent that the motivation to
`combine comes from the challenged Patent, that’s not something that we can
`really rely on. Is there evidence of these increased efficiencies that come
`from somewhere other than the challenged Patent?
` MS. BAILEY: Yes, Your Honor, and yes, I would agree that
`you can’t get the motivations from the challenged Patent itself. I want to
`address Dr. Anderson’s testimony, and then I also want to point you again to
`Exhibit #1003, paragraphs 70 through 76, that discuss ICs, and then I’m
`going to also bring up some additional. But going back to Dr. Anderson’s
`testimony itself, both on DX5 and DX6, we have his admissions about the
`advantages.
`Now, Zentian’s rebuttal to Dr. Anderson’s testimony is that he was
`referring to the challenged Patent, but if you look at DX6, you will see that
`the lead up to the questioning, Dr. Anderson actually said himself in his own
`answer that he was referring to the prior art. So referring to DX6, he was
`asked, was it known to make more efficient, having an on-chip memory for
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`7
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`memory transfers? And he says, so in the prior art that I’ve seen presented
`here and goes on to talk about that we just have to make a distance calculator
`that has all the memory on chip. And then he has the last paragraph, where
`he makes the admission that it was more efficient to reduce the off chip
`memory access, so Dr. Anderson in this admission was discussing the prior
`art.
`
`I want to now move to DX7, and I want to discuss the ground of
`Smyth and Mozer, specifically the Claim 1E limitation that is in dispute. So
`the petition presented two mappings for Claim 1E. The first was that Smyth
`alone teaches or renders obvious Claim 1E limitation, and the second was
`that Smyth, in combination with Mozer, renders obvious, and I’ll refer -- go
`ahead, Your Honor. Oh. Sorry. And I refer the Board to Exhibit #1003,
`paragraphs 167 through 168.
`So in Mozer -- and we have Figure 4 from Mozer -- Mozer teaches
`an audio recognition peripheral IC 400. That’s the big orange box on Fig 4.
`This audio peripheral IC includes the vector processor 423, which would be
`akin to the calculating apparatus as recited in the claims, and vector
`processor 423 calculates the distances. There’s also an on chip acoustic
`model memory 460, that stores a portion of the acoustic model.
`So in the mapping, Mozer is only used to show having a
`calculating apparatus and an acoustic model fabricated on an IC, and the
`mapping says that it would be obvious to fabricate Smyth’s vector processor,
`or processor 341 -- Smyth refers to it as a classifying processor, to be
`precise. It would be obvious to fabricate Smyth’s classifying processor 341
`and acoustic model memory 342 on a single IC. And this is discussed at the
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`8
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`petition, pages 41 through 44.
`
`JUDGE SMITH: I want to ask you about the memory in
`Mozer. So you’re calling it an acoustic model memory, but the claim itself
`says that the acoustic model memory defines the plurality of acoustic states.
`In Mozer, the memory in Mozer, it just loads -- it’s loading a first vector
`representing the audio signal, and a second vector representing the template
`into the memory. So I mean, to the extent that the claim says a plurality of
`acoustic states, in the memory of Mozer, there are two vectors. One is from
`the input speech, and the other is from the model memory.
` MS. BAILEY: Yes, Your Honor.
`
`JUDGE SMITH: How does the one vector from the model
`meet the limitation of a plurality of acoustic states?
` MS. BAILEY: Yes, Your Honor. We are not relying on
`Mozer’s acoustic model memory to teach Claim 1B of an acoustic model
`memory for storing an acoustic model. The petition makes clear that it is
`relying on Smith’s memory 342 to teach the acoustic model memory. As I
`previously said, we are only relying on Mozer for the obviousness of putting
`an acoustic processor, or a calculating apparatus and an acoustic model
`memory on a single IC.
`
`JUDGE SMITH: But I guess it doesn’t have an acoustic model
`memory, according to the claim. I guess that’s what I’m struggling with.
`Where is the acoustic model memory, if the acoustic model memory requires
`a plurality of acoustic states?
` MS. BAILEY: I think --
`
`JUDGE SMITH: Mozer doesn’t have that.
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`9
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
` MS. BAILEY: Mozer does have an acoustic model memory.
`
`JUDGE SMITH: Where?
` MS. BAILEY: A plurality of states are not stored on it. I agree
`with that. But that’s where --
`
`JUDGE SMITH: Okay. Okay.
` MS. BAILEY: -- Smyth comes in. Smyth does have an
`acoustic model memory that has a plurality of states. And so that is why the
`combination relies on Smyth’s acoustic model memory to be stored on a
`single IC, per Mozer’s teachings.
`
`JUDGE SMITH: But for Mozer’s teachings --
` MS. BAILEY: (CROSSTALK) -- oh, I’m so sorry.
`
`JUDGE SMITH: Oh, go ahead. Go ahead. Go ahead.
` MS. BAILEY: Because if Mozer taught an acoustic model
`memory that stored the entirety of the acoustic model or a plurality of states,
`then Mozer would be an anticipating reference.
`
`JUDGE SMITH: Okay. So --
` MS. BAILEY: And this is an obviousness combination.
`
`JUDGE SMITH: I understand. So what is the teaching of
`Mozer that suggests putting the entire memory of -- the entire acoustic
`model memory of Smyth on to the chip?
` MS. BAILEY: Do you want to -- are you asking what is the
`motivation to combine? Because I can move to that, if that would be
`helpful. I’m sorry.
`
`JUDGE SMITH: If you’re going to get to it later -- if you’re
`going to get to it later, that’s fine. I’ll wait.
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`10
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
` MS. BAILEY: I do plan on -- I’m actually getting to it in the
`next slide.
`JUDGE SMITH: Okay.
`
` MS. BAILEY: So how about we move to that? Okay. So
`moving to DX8, let’s talk about the motivations to combine of Smyth and
`Mozer. So in Mozer, the audio recognition peripheral 400 includes the
`acoustic model memory on the embodiment -- excuse me. Includes an
`acoustic model memory on chip in the embodiments at Figs 3 and 4. At the
`top of column 9, which is at the top of our DX8 slide, Mozer says that the
`embodiments are illustrative of advantages of providing the audio
`recognition peripheral on one IC, so on one integrated circuit. And
`remember, the audio recognition peripheral includes both the calculating
`apparatus, which Mozer calls a vector processor, and the acoustic model
`memory.
`
`Mozer also teaches -- and this is the second section of text on
`DX8 -- of offloading burdensome vector processing as another stated
`advantage, and this was relied on in the petition and the declaration. Now,
`with respect to this particular advantage, Zentian has argued that Smyth
`already achieves offloading of burdensome vector processing, because
`Smyth already has a separate DSP 341 for performing distance calculations.
`So I have two responses to that. First, we actually addressed this
`in the petition somewhat, at page 42. We said the combination would have
`likewise captured the advantages stated in Mozer. Specifically, having a
`distinct processor perform the distance calculations achieves a benefit of
`offloading burdensome vector processing, in the same way as the benefits of
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`11
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`Mozer. But in addition, having the processor and the memory on chip
`achieves the known technique with a predictable solution of more efficient
`memory transfers.
`So we have a second benefit of being able to offload burdensome
`vector processing when you have the memory and the process on chip. And
`I again refer back to Mozer’s -- the two Zs caught me -- Mozer’s teaching at
`column 9, line 15 through 21, that the embodiments, which includes the
`embodiments of the processor and memory on a single IC, of providing a
`recognition peripheral system.
`Additionally, Mozer talks about the advantage of avoiding a CPU
`hold, and this is at DX9. Mozer teaches that there is an advantage of
`avoiding a CPU hold when the memory and the processor are on a single IC.
`In response to the petitioner reply arguments, which were provided at pages
`17 through 19, Zentian is not responding to those arguments. And I kind of
`want to go through this, because Zentian is responding to a different
`architecture than what we are discussing relative to the no CPU hold
`advantage.
`So Zentian argues that there needs to be a CPU hold when there’s
`two processors accessing a single memory, which is what the architecture is
`of Mozer. And we agree with that, but that’s not the only architecture in
`which a CPU hold, or avoiding a CPU hold would be advantageous. A CPU
`hold would also be advantageous -- I should say a no CPU hold would also
`be advantageous when a first processor is accessing two memories, and then
`you have a second processor pulling data and instructing the first processor
`and pulling from a second memory.
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`12
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`So here we have the figures of Smyth to show the Smyth
`architecture, and why the Smyth architecture would benefit from avoiding a
`CPU hold. Looking on the left, the distance calculations are performed at
`the processor 341, and then we have the acoustic model memory at 342.
`The parsing processor, which is in the right hand fig 351, is mapped as a
`CPU, per Claim 6 -- excuse me, per Claim 9, and the parsing processor
`instructs processor 341. The parsing processor is sending instructions to
`341, which is a DSP, to write distance calculations to memory 353. So DSP
`341 is handling a lot of tasks. It’s pulling from acoustic model memory. It’s
`writing to memory 353. It’s performing distance calculations, and it’s
`responding to the instructions from 351.
`DSP 341 will face a resource contention issue, given all of those
`steps that it must perform, and we don’t want a situation where DSP 341 is
`interrupted in the middle of a memory operation by CPU 351. Otherwise,
`the system ends up with a half-completed operation and a potentially
`unstable condition. So DSP 341 needs to be able to tell CPU 351 that 351
`cannot write to memory 353 while it is accessing from memory 342 or
`performing distance calculations. In contrast, when memory 342 is on chip,
`then we only have processor 341 accessing one memory, and therefore a
`CPU hold would not be needed.
`And I want to also turn to DX10 and note testimony by Mr.
`Schmandt during his deposition where he pointed out that there’s only one
`set of memory lines. And as discussed in our Petitioner reply and the
`briefing, we also discuss that there is a bus in between 341 and 351. So I’m
`going to pause there. I know I just went through a lot of numbers. The
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`13
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`takeaway from the Smyth architecture is that there would be an advantage of
`avoiding a CPU hold given the Smyth architecture, if memory 342 was on
`chip with 341, the DSP.
`
`JUDGE SMITH: And just real quickly again, I know you
`mentioned offloading. Can you explain one more time real quickly why the
`advantage of offloading from Mozer would apply to Smyth, given that
`Smyth already offloads the --
` MS. BAILEY: Yes, Your Honor. You would have the
`additional advantage that when the acoustic model memory of Smyth 342 is
`on chip with DSP 341, that you then avoid the memory transfers or memory
`access that you would need to have from 341 to memory 342. It is well
`known that on chip memory access is going to be more efficient than having
`to go off chip for memory access.
`
`JUDGE SMITH: Okay. Thank you.
` MS. BAILEY: I want to next turn to DX11, and let’s talk about
`the Smyth alone teaching or rendering obvious Limitation 1E. So Zentian’s
`argument is that Smyth alone cannot render obvious Claim 1E, because
`Smyth’s memory size for the Motorola DSP is not large enough to store a
`large vocabulary model. So Smyth teaches that processor 341 can be a
`specific Motorola DSP that was commercially available at the time.
`So if you would like, we can turn back to DX2 with the claim
`language. Claim 1 only recites an acoustic model defining a plurality of the
`acoustic space, which Judge Smith, you just discussed is arguably met by
`two states. There is no memory size required in this limitation. There’s no
`boundaries or definition for the size of the acoustic model being stored. And
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`14
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`Dr. Anderson, turning back to DX11, admitted that the claims do not recite a
`minimum memory size for the acoustic model.
`
`JUDGE SMITH: Just real quickly, to the point about its met by
`two states, two acoustic states, I actually put that in the decision institute.
`But from reading the subsequent briefing from the parties, it seemed like
`neither party actually said one way or the other whether they agree with that.
`It seems like the Patent Owner, from what I understand, is saying that the
`acoustic memory has to store a large model memory, and from what I
`understand, your briefs, the acoustic model memory has to store maybe a
`limited vocabulary to recognize digits. You know, what we said in the DI
`about these two states, did either party address that, or agree with it or
`disagree with it?
` MS. BAILEY: Your Honor, neither party addressed it. And
`the fact of whether plurality is met by two states or requires three states or
`four states is really not at issue here, because of the preface to your question,
`and it’s what I’m going to get to with the memory size. Smyth teaches --
`and I think my answer will answer your question, but please, Judge Smith,
`let me know if it does not.
`Smyth teaches a digit’s recognizer that’s recognizing digits like
`one, two, three, four. Dr. Anderson admitted that he assumed the claims
`recite a large language model. That’s how he based his opinions. But then
`he also admitted on DX12 that Smyth had an abbreviated model. I would
`also point out that Counsel just admitted in the last IPR that we had a
`hearing on for the `277, that Smyth has an “extremely small vocabulary,”
`and “not much computation to run.” And that’s because it’s a digit’s
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`15
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`recognizer. So to Zentian’s argument that the Motorola DSP would not have
`a sufficient memory size to hold an acoustic model of a digit’s recognizer,
`Zentian has no support for that.
`
`JUDGE SMITH: But I think it’s important that the available
`memory is about one and a half kilobytes, and the minimum memory
`needed, even accepting that Mr. Schmandt’s testimony is somewhere on the
`order of four or five kilobytes.
` MS. BAILEY: Yes, but that four or five kilobytes by Mr.
`Schmandt was for a large vocabulary model. It was not for a digit’s
`recognizer. And we disagree -- oh, sorry. Go ahead.
`
`JUDGE SMITH: Did Mr. Schmandt provide testimony about
`the memory requirements of a digit’s recognizer?
` MS. BAILEY: Mr. Schmandt did testify that it would be far
`less, I believe, in his deposition, and I can get you that citation on rebuttal.
`
`JUDGE SMITH: Okay.
` MS. BAILEY: Far less than would be for a large vocabulary
`language model. But then I will say, Your Honors, if we start talking about
`the memory size of the acoustic model, then we’re starting to import
`limitations into the claim, because the claim simply recites a plurality of
`states.
`
`JUDGE SMITH: Well, I mean, I think it’s significant to the
`
`extent that the memory has to store a plurality of states, and even Mozer
`itself is only storing one vector, and Mozer is using 4K to do it. So I mean,
`it’s relevant, to the extent that the memory -- I understand your point about
`importing limitations into the claim, but the on chip memory has to be big
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`16
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`enough to store at least two states.
` MS. BAILEY: And Zentian has not disputed that 1.5 kilobytes
`would not be large enough to store a digit’s recognizer. It cannot, Your
`Honor. That would be an absurd assertion by Zentian. I would like to use
`the remaining time for my rebuttal, please, if there are no further questions.
`Thank you, Your Honors.
`
`JUDGE TURNER: Okay. You will have 19 minutes.
` MR. NOROOZI: Thank you, Your Honors. Kayvon Noroozi
`for Patent Owner and may it please the Board. I just want to state at the
`outset that there was a motivation articulated, it seemed based on an alleged
`memory contention problem that would arise in Smyth, as well as due to the
`bus placement in Smyth. Both of those are new arguments, and they were
`not raised before, and they did not appear in the briefing.
`With respect to the bus, the bus that was shown -- if we could pull
`up the figure from Smyth? It’s in our slides at Slide 4. The bus -- oh, I’m
`sorry. We’re waiting for the audio visual to become available. But I’ll note
`it for the record, the bus will be in the same place, regardless of the
`combination that they’re proposing. They’re proposing to put the memory
`342 and the processor 341 on a single IC. That won’t affect the bus. The
`bus is external. It’s next to the processor, I think as you can see from the
`figure.
`
`With respect to where we just left off in Petitioner’s argument
`regarding Smyth itself, Judge Smith, to your questions, if we could pull up --
`you’re exactly right about the point of the one and a half kilobytes versus the
`minimum memory requirement that Mr. Schmandt himself articulated for
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`17
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`what would need to be put into the memory, and he said that it would require
`at least four to five kilobytes, which obviously would not fit.
`But Counsel for Petitioner said, well, Mr. Schmandt was just
`talking about a large vocabulary model, not Smyth’s really simple, really
`small, digit-based model. That’s inaccurate, Your Honors. So we can look
`at Mr. Schmandt’s second declaration at paragraph seven, and right there,
`we can see right there, it says in the first sentence regarding the memory size
`requirements for Smyth’s tristate allophone model. Right?
`And then he does say if the model were for large vocabulary
`speech recognition, but if we keep going, we see that his analysis, at the end
`of the day, the number that he gives us is based off of Smyth’s model. And
`he never provides any other acoustic model size that would be adequate to
`meet the claim limitations, and would also be small enough to fit into the
`memory, the one and a half kilobytes in Kloker. So there is just no evidence
`to support Petitioner’s assertion that surely there would be something that
`would be small enough to meet the claims and fit into the one and a half
`kilobytes, and I think Judge Smith, as you pointed out, even Mozer teaches
`that a single vector is four kilobytes.
`So with respect to Smyth alone, if we look at our slide four here,
`the evidence establishes that Smyth’s memory 342 simply cannot be already
`on board the processor 341, because if processor 341 is the Motorola
`DSP56000, it only has one and a half kilobytes of memory that could even
`theoretically be used for storing data structures. And Mr. Schmandt himself
`says that the acoustic model of Smyth would require 4,800 bytes to 5,500
`bytes, which would not fit. And then if we move on --
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`18
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`
`JUDGE TURNER: Counsel, just a quick question. Does
`Smyth say that the processor 341 is limited to only that particular model?
` MR. NOROOZI: That’s an interesting question, Your Honor.
`
`JUDGE TURNER: Thank you.
` MR. NOROOZI: Because I say that in the sense that no one
`has -- that Petitioner has not argued that Smyth could be used to run a
`different model, so there’s no evidence to suggest that Smyth is useful for
`some other model besides what’s been discussed in Smyth.
`
`JUDGE TURNER: No, I understand, but you’re making the
`calculations on that basis, so I’m trying to -- my own recollection of whether
`it’s limited for the disclosure of Smyth, and therefore -- but if it’s not, if it’s
`just exemplary, then in theory, we could have an updated DSP to serve as --
`in 341, that maybe has an extended memory. So I’m trying to tease out if
`it’s limited, you can make the assertion that it’s limited, but I wanted to --
`you’re more than welcome to say it’s beyond what’s been discussed, and it’s
`not in the record, and you don’t want to respond. That’s fine.
` MR. NOROOZI: No. Of course, I always want to respond if I
`can, Your Honors, especially based on the record and evidence. What I
`don’t want to do is speculate.
`
`JUDGE TURNER: Mm-hmm.
` MR. NOROOZI: I misunderstood your question initially, and I
`think I understand it now. I think your question is could the processor 341
`be something different than the Motorola DSP56000? Is that the question?
`
`JUDGE TURNER: Yes, that’s my question.
` MR. NOROOZI: Okay. And the answer to that is I’m not
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`
`
`
`19
`
`(404) 684-6008
`
`Jamison Professional Services
`East Pointe, GA
`
`www.jps-online.com
`
`
`
`IPR2023-00036
`Patent 10,839,789 B2
`completely sure, but I will say that Petitioner itself relied on the document
`Kloker, Exhibit I think #1011, as the evidence for the capabilities of