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`Comprehensive study of rapid, low-cost silicon surface passivation technologies | IEEE Journals & Magazine | IEEE Xplore
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`Journals & Magazines > IEEE Transactions on Electron... > Volume: 47 Issue: 5 
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`Comprehensive study of rapid, low-cost silicon surface passivation technologies
`Publisher: IEEE
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`A. Rohatgi ; P. Doshi ; J. Moschner ; T. Lauinger ; A.G. Aberle ; D.S. Ruby All Authors 
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`Abstract:
`A comprehensive and systematic investigation of low-cost surface passivation technologies is presented for achieving
`high-performance silicon devices such as solar cells.... View more
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`Abstract:
`A comprehensive and systematic investigation of low-cost surface passivation technologies is presented for achieving
`high-performance silicon devices such as solar cells. Most commercial solar cells today lack adequate surface
`passivation, while laboratory cells use conventional furnace oxides (CFO) for high-quality surface passivation involving
`an expensive and lengthy high-temperature step. This investigation tries to bridge the gap between commercial and
`laboratory cells by providing fast, low-cost methods for effective surface passivation. This paper demonstrates for the
`first time, the efficacy of TiO/sub 2/, thin (<10 nm) rapid thermal oxide (RTO), and PECVD SiN individually and in
`combination for (phosphorus diffused) emitter and (undiffused) back surface passivation. The effects of emitter sheet
`resistance, surface texture, and three different SiN depositions (two direct PECVD systems and one remote plasma
`system) were investigated. The effects of post-growth/deposition treatments such as forming gas anneal (FGA) and
`firing of screen printed contacts were also examined. This study reveals that the optimum passivation scheme
`consisting of a thin RTO with a SiN cap followed by a very short 730/spl deg/C anneal can 1) reduce the emitter
`saturation current density, J/sub 0e/, by a factor of >15 for a 90 /spl Omega//sq. emitter, 2) reduce J/sub 0e/ by a factor
`of >3 for a 40 /spl Omega//sq, emitter, and 3) reduce S/sub back/ below 20 cm/s on 1.3 /spl Omega/cm p-Si.
`Furthermore, this double-layer RTO+SiN passivation is relatively independent of the deposition conditions (direct or
`remote) of the SiN film and is more stable under heat treatment than SiN or RTO alone. Model calculations are also
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`6/22/24, 3:38 PM
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`Comprehensive study of rapid, low-cost silicon surface passivation technologies | IEEE Journals & Magazine | IEEE Xplore
`performed to show that the RTO+SiN surface passivation scheme may lead to 17%-efficient thin screen-printed cells
`even with a low bulk lifetime of 20 /spl mu/s.
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`Published in: IEEE Transactions on Electron Devices ( Volume: 47 , Issue: 5, May 2000)
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`Page(s): 987 - 993
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`Date of Publication: May 2000 
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` ISSN Information:
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`References is not available for this document.
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`DOI: 10.1109/16.841230
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`Publisher: IEEE
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`6/22/24, 3:38 PM
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`Comprehensive study of rapid, low-cost silicon surface passivation technologies | IEEE Journals & Magazine | IEEE Xplore
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`Comprehensive study of rapid, low-cost silicon surface passivation technologies | IEEE Journals & Magazine | IEEE Xplore
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