`(12) Patent Application Publication (10) Pub. No.: US 2011/0141655 A1
`Jeongetal
`(m)Pub.Daux
`Jun.16,2011
`
`US 201 10141655A1
`
`(54) MULTILAYER CERAMIC CAPACITOR
`
`(52) U.S. Cl. ..................... .. 361/303; 361/306.3; 361/313
`
`(75)
`
`Inventors:
`
`(73) Assignee;
`
`Ji Hun Jeong, Suwon (KR); Hyo
`Jung Kim, Suwon (KR); Hyo Jung
`Kim, Seoul (KR); Dong Ik Chang,
`Suwon (KR); Doo Young Kim,
`Yongm (KR)
`SAMSUNG
`ELECTRO-MECHAN1Cs C0,,
`LTD,
`
`(21) APP1~ N05
`(22)
`Filed:
`
`12/768-1993
`Apt 28, 2010
`
`(30)
`
`Foreign Application Priority Data
`
`Dec. 10, 2009
`
`(KR) ...................... .. 10-2009-0122195
`
`Publication Classification
`
`(51)
`
`Int, Cl,
`H01G 4/12
`H01G 4/005
`
`(2006.01)
`(2006.01)
`
`(57)
`
`ABSTRACT
`
`Disclosed is multilayer ceramic capacitor. The multilayer
`ceramic capacitor includes a capacitive part including dielec-
`tric layers and first and second internal electrodes alternately
`laminated therein, wherein the dielectric layers include first
`ceramic particles having an average particle size of 0.1 um to
`0.3 pm, and one set of ends of the first internal electrodes and
`one set of ends oi“ thesecond internal electrodes are exposed
`in a lamination direction of the dielectric layers, a protective
`layer formed on at least one of top and bottom surfaces of the
`capacitive part, including second ceramic particles and hav-
`ing a porosity of 2% to 4%, wherein an average particle size
`ratio of the second ceramic particles to the first ceramic par-
`ticles ranges from 1.1 to 1.3; and first and second external
`electrodes electrically connected to the first and second inter-
`nal electrodes exposed in the lamination direction of the
`dielectric layers.
`
`120a
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`Exhibit 1005
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`Exhibit 1005
`PGR2017-00010
`PGR201 7-0001 0
`AVX CORPORATION
`AVX CORPORATION
`
`000001
`
`
`
`Patent Application Publication
`
`Jun. 16, 2011 Sheet 1 of 2
`
`US 2011/0141655 A1
`
`II
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`FIG.
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`Patent Application Publication
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`Jun. 16, 2011 Sheet 2 of 2
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`US 2011/0141655 A1
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`US 2011/0141655 A1
`
`Jun. 16, 2011
`
`MULTILAYER CERAMIC CAPACITOR
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`[0001] This application claims the priority ofKorean Patent
`Application No. 10-2009-0122195 filed on Dec. 10, 2009, in
`the Korean Intellectual Property Office, the disclosure of
`which is incorporated herein by reference.
`
`capacitor. Such thermal impact and shear stress may cause
`cracks in the multilayer ceramic capacitor.
`[0012] As the multilayer ceramic capacitor has recently
`become smaller in size and higher in capacitance, many
`attempts have been made to manufacture a thinner and mul-
`tilayer ceramic body. However, as the ceramic body has
`become thinner and multilayered, a crack occurrence rate has
`increased. Therefore, there is an increasing need for prevent-
`ing this increase in the crack occurrence rate therein.
`
`BACKGROUND OF THE INVENTION
`
`SUMMARY OF THE INVENTION
`
`1. Field of the Invention
`[0002]
`[0003] The present invention relates to a multilayer ceramic
`capacitor, and more particularly,
`to a multilayer ceramic
`capacitor having a high level of reliability and a low crack
`occurrence rate by reducing stress acting on the multilayer
`ceramic capacitor.
`[0004]
`2. Description of the Related Art
`[0005]
`In general, electronic components using a ceramic
`material, such as capacitors, inductors, piezoelectric devices,
`varistors or thermistors, include a ceramic body formed of a
`ceramic material,
`internal electrodes provided inside the
`ceramic body, and external electrodes installed on the surface
`of the ceramic body.
`[0006] Multilayer ceramic capacitors among such ceramic
`electronic components include a plurality of laminated
`dielectric layers,
`internal electrodes interleaved with the
`dielectric layers, and external electrodes electrically con-
`nected to the internal electrodes.
`
`[0007] Multilayer ceramic capacitors are being widely used
`as a part of mobile communications devices, such as comput-
`ers, personal digital assistants (PDA) and mobile phones, due
`to their small size, high capacity and ease of mounting.
`[0008] Recently, as electronic products have become com-
`pact and multi-functional, chip components have also tended
`to become compact and highly functional. Following this
`trend, a multilayer ceramic capacitor is required to be smaller
`than ever before, but to have a high capacity.
`[0009] As for a general method of manufacturing a multi-
`layer ceramic capacitor, ceramic green sheets are manufac-
`tured and a conductive paste is printed on the ceramic green
`sheets to thereby form internal electrode layers. Tens to hun-
`dreds of such ceramic green sheets, provided with the internal
`electrode layers, are then laminated to thereby produce a
`green ceramic laminate. Thereafter, the green ceramic lami-
`nate is pressed at high pressure and high temperature and
`subsequently cut into green chips. Thereafter, the green chip
`is subjected to plasticizing, firing and polishing processes,
`and external electrodes are then formed thereon, thereby
`completing a multilayer ceramic capacitor.
`[0010] Typically, the internal electrodes, formed of metal,
`shrink and expand easily as compared to ceramic materials.
`Thus, stress caused by this difference in thermal expansion
`coefiicient may act on the ceramic laminate, thereby causing
`cracks.
`
`[0011] The multilayer ceramic capacitor is used while
`mounted on a wiring board. In this case, the external elec-
`trodes of the multilayer ceramic capacitor are electrically
`connected to the wiring board by soldering and a conductive
`land on the wiring board. When the multilayer ceramic
`capacitor is mounted on the wiring board by using soldering,
`or when the wiring board mounted with the multilayer
`ceramic capacitor undergoes a cutting process,
`thermal
`impact and shear stress are applied to the multilayer ceramic
`
`[0013] An aspect of the present invention provides a mul-
`tilayer ceramic capacitor capable of achieving a high level of
`reliability and a low crack occurrence rate by reducing stress
`acting on the multilayer ceramic capacitor.
`[0014] According to an aspect of the present invention,
`there is provided a multilayer ceramic capacitor including: a
`capacitive part including dielectric layers and first and second
`internal electrodes alternately laminated therein, wherein the
`dielectric layers include first ceramic particles having an aver-
`age particle size of0.1 um to 0.3 pm, and one set ofends ofthe
`first internal electrodes and one set of ends of the second
`
`internal electrodes are exposed in a lamination direction of
`the dielectric layers; a protective layer formed on at least one
`of top and bottom surfaces of the capacitive part, including
`second ceramic particles and having a porosity of 2% to 4%,
`wherein an average particle size ratio of the second ceramic
`particles to the first ceramic particles ranges from 1.1 to 1.3;
`and first and second external electrodes electrically con-
`nected to the first and second internal electrodes exposed in
`the lamination direction of the dielectric layers.
`[0015] The first ceramic particles may include barium titan-
`ate (BaTiO3)-based ceramics, lead complex perovskite-based
`ceramics, or strontium titanate (SrTiO3)-based ceramics. The
`second ceramic particles may include barium titanate (Ba-
`TiO3)-based ceramics,
`lead complex perovskite-based
`ceramics, or strontium titanate (SrTiO3)-based ceramics.
`[0016] The dielectric layers of the capacitive part may have
`a porosity of 1% or less.
`[0017] The capacitive part may have a thickness of 50 um to
`2000 um, and the protective layer may have a thickness of 10
`um to 100 um.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0018] The above and other aspects, features and other
`advantages of the present invention will be more clearly
`understood from the following detailed description taken in
`conjunction with the accompanying drawings, in which:
`[0019]
`FIG. 1 is a schematic perspective view illustrating a
`multilayer ceramic capacitor according to an exemplary
`embodiment of the present invention; and
`[0020]
`FIG. 2 is a schematic cross-sectional view taken
`along line I-I‘ of FIG. 1, illustrating the multilayer ceramic
`capacitor.
`
`DETAILED DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`
`[0021] Exemplary embodiments of the present invention
`will now be described in detail with reference to the accom-
`
`panying drawings.
`[0022] The invention may, however, be embodied in many
`different forms and should not be construed as being limited
`to the embodiments set forth herein. Rather, these embodi-
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`US 2011/0141655 A1
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`Jun. 16, 2011
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`ments are provided so that this disclosure will be thorough
`and complete, and will fully convey the scope ofthe invention
`to those skilled in the art. In the drawings, the thicknesses of
`layers and regions are exaggerated for clarity. Like reference
`numerals in the drawings denote like elements.
`[0023]
`FIG. 1 is a schematic perspective View illustrating a
`multilayer ceramic capacitor according to an exemplary
`embodiment of the present invention. FIG. 2 is a schematic
`cross-sectional view taken along line I-I‘ of FIG. 1, illustrat-
`ing the multilayer ceramic capacitor.
`[0024] Referring to FIGS. 1 and 2, a multilayer ceramic
`capacitor, according to this exemplary embodiment, includes
`a sintered ceramic body 110, first and second internal elec-
`trodes 130a and 130b formed inside the sintered ceramic
`
`body 110, and first and second external electrodes 120a and
`120b electrically connected to the first and second internal
`electrodes 130a and 130b.
`
`In FIG. 2, the sintered ceramic body 110 includes a
`[0025]
`capacitive part 110A, and protective layers 110B formed on
`the top and bottom surfaces of the capacitive part 110A.
`[0026] The protective layer 110B may be formed on at least
`one of the top and bottom surfaces of the capacitive part
`110A. The protective layers 110B, when formed on both the
`top and bottom surfaces of the capacitive part 110A, have
`excellent influence in lowering a crack occurrence rate.
`[0027] The capacitive part 110A is obtained by laminating
`a plurality of ceramic dielectric layers 111 and the first and
`second internal electrodes 130a and 130b in an alternating
`manner. The first and second internal electrodes 130a and
`
`130b are paired as having opposite polarities. These first and
`second internal electrodes 130a and 130b oppose each other
`in a lamination direction of the ceramic dielectric layers 111,
`and are electrically insulated from each other by the ceramic
`dielectric layers 111. One set of ends of the first internal
`electrodes 130a and the other set of ends of the second inter-
`
`nal electrodes 130b are exposed in the lamination direction of
`the ceramic dielectric layers 11 1. The exposed ends ofthe first
`and second internal electrodes 130a and 130b are electrically
`connected to the first and second external electrodes 120a and
`
`120b, respectively.
`[0028] When a predetermined voltage is applied to the first
`and second external electrodes 120a and 120b, electric
`charges are accumulated between the opposing first and sec-
`ond internal electrodes 130a and 130b. Here, the capacitance
`ofthe multilayer ceramic capacitor is in proportion to the area
`of the opposing first and second internal electrodes 130a and
`130b.
`
`The protective layer 110B is formed of a ceramic material,
`and contains second ceramic particles whose average particle
`size ratio to the first ceramic particles 110a ranges from 1.1 to
`1.3.
`
`[0033] The second ceramic particles 110b are not specifi-
`cally limited, provided that they have a high dielectric con-
`stant. For example, the first ceramic particles 110a may uti-
`lize barium titanate (BaTiO3)-based ceramics, lead complex
`perovskite-based ceramics,
`strontium titanate (SrTiO3)-
`based ceramics or the like.
`
`[0034] Typically, a thermal expansion coefiicient of a
`ceramic material reaches approximately 8 to 9><10’6/° C., and
`internal electrodes, formed of nickel, have a thermal expan-
`sion coefiicient of approximately 13><10‘6/° C. Thus, tensile
`and compressive stress acts on dielectric layers having a
`relatively small thermal expansion coefficient. Since the ther-
`mal expansion stress due to the thermal impact has its greatest
`influence on the interface between the protective layer 110B
`and the capacitive part 110A, a ceramic laminate having high
`brittleness may be cracked.
`[0035] According to this exemplary embodiment of the
`present invention, the protective layer 110B includes the sec-
`ond ceramic particles 110B having a greater particle size than
`the first ceramic particles 11011. The second ceramic particles
`110b, having a greater particle size than the first ceramic
`particles 11011, are slow in shrinkage behavior as compared to
`the first ceramic particles 11011. This alleviates a stress differ-
`ence occurring at the time ofthe thermal expansion of internal
`electrodes.
`
`[0036] An average particle size ratio (D2/D1, where D1
`denotes the average particle size of the first ceramic particles
`110a and D2 denotes the average particle size of the second
`ceramic particles 110b) of the second ceramic particles 110b
`to the first ceramic particles 110a ranges from 1.1 to 1.3. An
`average particle size ratio (D2/D1) of less than 1.1 fails to
`alleviate thermal impact occurring during the thermal expan-
`sion of internal electrode layers. This results in a high crack
`occurrence rate. An average particle size ratio exceeding 1.3
`may cause non-firing or increase a crack occurrence rate.
`[0037]
`Furthermore, the protective layer 110B includes a
`plurality of pores P, and the porosity thereof ranges from 2%
`to 4%. The protective layer 110B is formed by sintering a
`slurry which is a mixture of the second ceramic particles
`110b, an organic binder and a solvent. The porosity of the
`protective layer 110B can be controlled by controlling the
`content ofthe second ceramic particles 110b, and the kind and
`amount of organic binder. The content of the second ceramic
`particles 110b may range from 15% to 40%.
`[0038] The above-mentioned porosity range may enable
`the absorption of stress generated during the thermal expan-
`sion, thereby reducing a crack occurrence rate at the interface
`between the capacitive part 110A and the protective layer
`110B.
`
`[0039] A plurality of pores also exist in the capacitive part
`1 10A, and the porosity ofthe capacitive part 11 0A may be 1%
`or less.
`
`[0029] The ceramic dielectric layers 111 of the capacitive
`part 110A contain first ceramic particles having an average
`particle size D1 of 0.1 pm to 0.3 pm. The first ceramic par-
`ticles 110a are not specifically limited, provided that they
`have a high dielectric constant. For example, the first ceramic
`particles 110a may utilize barium titanate (BaTiO3)-based
`ceramics, lead complex perovskite-based ceramics, stron-
`tium titanate (SrTiO3)-based ceramics or the like.
`[0030] The first and second internal electrodes 130a and
`130b are formed of a conductive metal, which may utilize, for
`example, Ni or a Ni alloy. The Ni alloy may contain Mn, Cr,
`Co or Al as well as Ni.
`
`[0031] The first and second external electrodes 120a and
`120b are formed of a conductive metal, and may contain, for
`example, copper.
`[0032] The protective layer 110B is formed on at least one
`of the top and bottom surfaces of the capacitive part 110A.
`
`[0040] The protective layer 110B may be thicker than a
`single dielectric layer within the capacitive part 110A. For
`example, the single dielectric layer 111 of the capacitive part
`110A may have a thickness of2 pm or less. As 25 or more of
`such dielectric layers 111 are laminated, the thickness of the
`capacitive part 110A may range from 50 um to 2000 pm. The
`protective layer 110B may have a thickness of 10 pm to 100
`um.
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`US 2011/0141655 A1
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`Jun. 16, 2011
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`[0041] Hereinafter, a method ofmanufacturing a multilayer
`ceramic capacitor according to an exemplary embodiment of
`the present invention will be described.
`[0042]
`First, a plurality of ceramic green sheets, which are
`to be laminated in a capacitance part, are prepared. The
`ceramic green sheets are manufactured by mixing first
`ceramic particles having an average particle size of 0.1 um to
`0.3 pm, a binder and a solvent to thereby produce a slurry and
`making this slurry into sheets having a thickness of a few
`micrometers by using a doctor blade method.
`[0043] An internal electrode paste (i.e., a paste for the for-
`mation of an internal electrode) is applied to the surfaces of
`the ceramic green sheets to thereby form first and second
`internal electrode patterns. The first and second internal elec-
`trode patterns may be formed by using a screen printing
`method. The internal electrode paste is obtained by dispersing
`Ni or a Ni alloy powder in an organic binder and an organic
`solvent and making it into a paste state. The Ni alloy may
`contain Mn, Cr, Co or Al as well as Ni.
`[0044] The organic binder utilized may be one that is
`known in the art. For example, the organic binder may utilize,
`but is not limited to, a binder such as a cellulose-based resin,
`an epoxy-based resin, an aryl resin, an acryl resin, a phenol-
`formaldehyde resin, an unsaturated polyester resin, a poly-
`carbonate resin, a polyarnide resin, a polyimide resin, an
`alkyde resin, a rosin ester or the like.
`[0045] The utilized organic solvent may also be one that is
`known in the art. For example, the organic solvent may uti-
`lize, but is not limited to, a solvent such as butyl carbitol, butyl
`carbitol acetate,
`turpentine, ot-terpineol, ethyl cellosolve,
`butyl phthalate or the like.
`[0046] Thereafter, the ceramic green sheets provided with
`the first and second internal electrode patterns are laminated
`and pressurized in the lamination direction. Thus, the lami-
`nated ceramic green sheets and internal electrode paste are
`pressed with each other. In such a manner, a capacitive part,
`including the alternately laminated ceramic green sheets and
`internal electrode paste, is manufactured.
`[0047]
`Subsequently, a plurality of ceramic green sheets,
`which are to be laminated on the top and bottom surfaces of
`the capacitive part, are prepared. These ceramic green sheets
`are manufactured by mixing second ceramic particles that are
`1.1 to 1.3 times greater in average particle size than the first
`ceramic particles constituting the capacitive part, a binder and
`a solvent to thereby produce a slurry, and making this slurry
`into sheets having a thickness of a few micrometers by using
`a doctor blade method. Thereafter, the ceramic green sheets
`are laminated on the capacitive part to thereby form a protec-
`tive layer. The porosity of the protective layer may be con-
`trolled by controlling the content of the second ceramic par-
`ticles and the kind and amount of organic binder, and the
`porosity of the protective layer may range from 2% to 4%.
`The content of the second ceramic particles in the ceramic
`slurry may range from 15% to 40%.
`[0048] Thereafter, a resultant ceramic laminate is cut into
`chips in units of one capacitor. At this time, the cutting is
`performed such that one set of ends of the first internal elec-
`trode patterns and the other set of ends of the second internal
`electrode patterns are exposed to the side surfaces thereof.
`[0049] Thereafter, the laminate chip is fired at a tempera-
`ture of 1200° C. for example, thereby manufacturing a sin-
`tered ceramic body.
`[0050] At this time, since the second ceramic particles,
`having a greater particle size than the first ceramic particles,
`
`are slow in terms of shrinkage behavior, a difference in stress
`caused during the thermal expansion of the internal elec-
`trodes is alleviated.
`
`[0051] Thereafter, first and second external electrodes are
`formed to cover the side surfaces ofthe sintered ceramic body
`and to be electrically connected to the first and second internal
`electrodes exposed to the side surfaces ofthe sintered ceramic
`body.
`Subsequently, the surface of those external elec-
`[0052]
`trodes may be plated with nickel, tin or the like.
`[0053] Multilayer ceramic capacitors were manufactured
`under conditions shown in Table 1 below. After the manufac-
`
`tured multilayer ceramic capacitors were subjected to thermal
`impact testing (dipping in a lead pot at 320 degrees Celsius for
`two seconds), the occurrence of cracks was evaluated using a
`microscope of 50 to 1,000 magnification.
`
`TABLE 1
`
`Average
`particle
`size ratio
`(D2/D1)
`1.1
`
`Porosity
`(%) of
`protective
`layer
`2.0
`
`1.2
`
`1.3
`
`0.8
`
`0.9
`
`1.0
`
`1.4
`
`1.5
`
`3.2
`
`4.0
`
`0.8
`
`1.0
`
`1.4
`
`5.7
`
`6.3
`
`Crack
`occurrence
`rate
`1/300
`
`0/300
`
`1/300
`
`17/300
`
`10/300
`
`17/300
`
`5/300
`
`15/300
`
`Sinter-
`ability
`Sin ere
`
`Sin ere
`
`Sin ere
`
`Sin ere
`
`Sin ere
`
`Sin ere
`
`Sin ere
`
`Non-
`sin ere
`
`Inven ive
`exam ale 1
`Inven ive
`exam ale 2
`Inven ive
`exam ale 3
`Comparative
`exam ale 1
`Comparative
`exam ale 2
`Comparative
`exam ale 3
`Comparative
`exam ale 4
`Comparative
`exam ale 5
`
`[0054] Referring to Table 1, comparative examples 1 to 3
`show high crack occurrence rates since they fail to alleviate
`thermal impact occurring in the thermal expansion of internal
`electrodes. When the average particle size ratio of second
`ceramic particles to first ceramic particles exceeds 1.3 as in
`comparative example 4 and 5, a protective layer is not fired to
`thereby experience cracking or fails to alleviate thermal
`impact, thereby resulting in a high crack occurrence rate.
`[0055]
`Inventive examples 1 to 3 show lower crack occur-
`rence rates as compared to comparative examples 1 to 5.
`[0056] Asset forth above, in the multilayer ceramic capaci-
`tor according to exemplary embodiments ofthe invention, the
`protective layer includes second ceramic particles having a
`greater particle size than first ceramic particles constituting
`the dielectric layers of the capacitive part. The second
`ceramic particles are slower in terms of shrinkage behavior
`than the first ceramic particles. Accordingly, a stress differ-
`ence caused in the thermal expansion of internal electrodes is
`reduced. Furthermore, the porosity of the protective layer
`ranges from 2% to 4% and thus the protective layer has a
`lower density than the capacitive part.
`[0057] According to exemplary embodiments of the inven-
`tion, the multilayer ceramic capacitor reduces thermal impact
`and shear stress applied thereto when the multilayer ceramic
`capacitor is mounted on the wiring board by using soldering
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`US 2011/0141655 A1
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`Jun. 16, 2011
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`or when the wiring board mounted with the multilayer
`ceramic capacitor is cut. Thus, a crack occurrence rate can be
`lowered.
`
`[0058] While the present invention has been shown and
`described in connection with the exemplary embodiments, it
`will be apparent to those skilled in the art that modifications
`and variations can be made without departing from the spirit
`and scope ofthe invention as defined by the appended claims.
`
`What is claimed is:
`
`1. A multilayer ceramic capacitor comprising:
`a capacitive part including dielectric layers and first and
`second internal electrodes alternately laminated therein,
`wherein the dielectric layers include first ceramic par-
`ticles having an average particle size of0. 1 pm to 0.3 pm,
`and one set ofends ofthe first internal electrodes and one
`
`set of ends of the second internal electrodes are exposed
`in a lamination direction of the dielectric layers;
`a protective layer formed on at least one of top and bottom
`surfaces ofthe capacitive part, including second ceramic
`particles and having a porosity of 2% to 4%, wherein an
`
`average particle size ratio of the second ceramic par-
`ticles to the first ceramic particles ranges from 1.1 to 1.3;
`and
`first and second external electrodes electrically connected
`to the first and second internal electrodes exposed in the
`lamination direction of the dielectric layers.
`2. The multilayer ceramic capacitor of claim 1, wherein the
`first ceramic particles comprise barium titanate (BaTiO3)-
`based ceramics, lead complex perovskite-based ceramics, or
`strontium titanate (SrTiO3)-based ceramics.
`3. The multilayer ceramic capacitor of claim 1, wherein the
`second ceramic particles comprise barium titanate (BaTiO3)-
`based ceramics, lead complex perovskite-based ceramics, or
`strontium titanate (SrTiO3)-based ceramics.
`4. The multilayer ceramic capacitor of claim 1, wherein the
`dielectric layers ofthe capacitive part have a porosity of 1% or
`less.
`
`5. The multilayer ceramic capacitor of claim 1, wherein the
`capacitive part has a thickness of 50 pm to 2000 um, and the
`protective layer has a thickness of 10 um to 100 um.
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